Claims
- 1. A method for fabricating a capacitor for an integrated circuit comprising the steps of:forming an adhesion layer of a metal and a diffusion barrier layer of a compound of said metal and a non-metal over a substrate by sputtering said metal continuously by using a target of said metal wherein a gas of said non-metal is induced at the time when a thickness of said adhesion layer reaches to a predetermined thickness; forming a bottom electrode layer of a noble metal on said diffusion barrier layer; forming a dielectric layer of a metal oxide on said bottom electrode layer; forming a top electrode layer of a conductive metal on said dielectric layer; etching said top electrode layer and dielectric layer selectively; etching said bottom electrode layer selectively; and etching said diffusion barrier layer and adhesion layer selectively.
- 2. The method of claim 1, wherein said sputtering is performed with changing an inducing amount of said gas.
- 3. The method of claim 1, wherein said gas comprises one selected from the group consisting of oxygen gas, nitrogen gas and a mixture of them.
- 4. The method of claim 1, wherein said adhesion layer comprises one of titanium and tantalum.
Priority Claims (2)
Number |
Date |
Country |
Kind |
6-327818 |
Dec 1994 |
JP |
|
7-194578 |
Jul 1995 |
JP |
|
Parent Case Info
This patent application is a 37 C.F.R. §1.53(b) Continuation-In-Part of U.S. patent application Ser. No. 08/573,134, filed Dec. 15, 1995.
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Non-Patent Literature Citations (2)
Entry |
Patent Abstracts of Japan, vol. 13, No. 218 (E-761) May 22, 1989. |
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Continuation in Parts (1)
|
Number |
Date |
Country |
Parent |
08/573134 |
Dec 1995 |
US |
Child |
09/238157 |
|
US |