Patent Application
20070030733
1. Field of the Invention
The present invention relates to computer system technologies, and more particularly, to a faulty storage area marking and accessing method and system, for use with a data storage unit having a plurality of storage areas so as to inspect and identify faulty storage areas and operable storage areas of the data storage unit such that only the operable storage areas are allowed to be accessed.
2. Description of Related Art
A system on chip (SoC) is a full functional chip module, which integrates all functional components, such as a central processing unit (CPU), a memory unit, an input/output interface unit and other auxiliary circuit units, of a microcomputer system into a single chip. The SoC allows various operations of the microcomputer system to be accomplished by the single chip. The functional components integrated in the SoC are referred to as embedded components, for example, a memory in the SoC is named an embedded memory.
However, some of storage areas of the embedded memory in the SoC may become 4 faulty and can no longer store data, thereby leading to a reliability issue if data access is performed through the faulty storage areas of the embedded memory. As the embedded memory is integrated in the SoC, it cannot be easily replaced if having any faulty storage areas. Therefore, if any storage area of the embedded memory is faulty, the entire chip has to be replaced even though other components such as CPU, input/output interface unit and auxiliary circuit units still function properly, thereby not favorable for the economical concern.
To address the aforementioned problem, a circuit technology for self-repairing faulty storage areas of a memory has been proposed in U.S. Patent Publication Nos. 20040225912 and 20030196143.
However, implementation of the above circuit technology for self-repairing faulty storage areas requires complicated circuits and additional circuit layout space and is not cost-effective.
Moreover, as the Deep Sub-Micron (DSM) technology is being rapidly developed, more and more electronic circuits are allowed to be integrated in a single integrated circuit. The size of embedded memory integrated in an SoC becomes larger and larger and the chance to have faulty storage area in the embedded memory in the SoC is also increasing.
Therefore, the problem to be solved here is to provide a faulty storage area marking and accessing method and system, which can overcome the foregoing drawbacks.
In light of the above-mentioned drawbacks of the prior art, it is a primary objective of the present invention to provide a faulty storage area marking and accessing method and system, which can automatically inspect and mark faulty storage areas of a data storage unit e.g. an embedded memory integrated in a SoC, such that the faulty storage areas are avoided being accessed, and only operable storage areas of the embedded memory are accessed, thereby allowing the SoC to still operate properly even if the embedded memory has the faulty storage areas, without having to replace the entire SoC.
It is another objective of the present invention to provide a faulty storage area marking and accessing method and system, which can be implemented without using complicated circuits and additional circuit layout space, thereby more cost-effective than the prior art.
In order to achieve the above and other objectives, the present invention proposes a faulty storage area marking and accessing method and system for use with a data storage unit having a plurality of storage areas, such as an embedded memory integrated in a SoC (e.g. a cache memory), an external memory (e.g. a flash memory) or any other data storage device. The faulty storage area marking and accessing method and system provide the data storage unit with an automatic faulty storage area marking function for access control, such that when a client unit (e.g. an internal microprocessor) wishes to access the data storage unit, any inspected and marked faulty storage areas are avoided being accesses, and only operable storage areas of the data storage unit are accessed.
The faulty storage area marking and accessing method of the present invention includes the steps of: (1) performing a storage area inspecting process on the data storage unit to inspect whether each of the storage areas is in an operable or faulty status to identify operable storage areas and faulty storage areas of the data storage unit in response to receiving an inspecting startup event; (2) recording the inspected operable or faulty status of the storage areas of the data storage unit, and assigning addresses of the faulty storage areas to addresses of the operable storage areas of the data storage unit in accordance with a predefined address assigning rule; (3) inspecting whether access addresses contained in a request message issued by a client unit to the data storage unit match any address corresponding to the faulty storage areas when the client unit issues the request message to the data storage unit, and if at least one of the access addresses is inspected to correspond to the faulty storage areas, changing at least one access address to at least one of the addresses of the operable storage areas in accordance with the predefined address assigning rule; and (4) accessing the operable storage areas of the data storage unit in place of the faulty storage areas.
The faulty storage area marking and accessing system of the present invention includes: a storage area inspecting module for performing a storage area inspecting process on the data storage unit to inspect whether each of the storage areas is in an operable or faulty status to identify faulty storage areas and operable storage areas of the data storage unit in response to an inspecting startup event; a storage area recording module for recording the inspected operable or faulty status of the storage areas of the data storage unit, and assigning addresses of the faulty storage areas to addresses of the operable storage areas in accordance with a predefined address assigning rule; and an access managing and controlling module for receiving a request message containing access addresses issued by a client unit to the data storage unit and inspecting whether the access addresses of the request message match any address corresponding to the faulty storage areas, wherein if at least one of the access addresses is inspected to correspond to the faulty storage areas, the access managing and controlling module changes the at least one access address to at least one of the addresses of the operable storage areas in accordance with the predefined address assigning rule, so as to allow the operable storage areas of the data storage unit to be accessed in place of the faulty storage areas.
By applying the faulty storage area marking and accessing method and system of the present invention to the data storage unit (such as an embedded memory integrated in a SoC), the storage area inspecting process is performed on the data storage unit to identify the operable storage areas and faulty storage areas of the data storage unit. Thereby, when a client unit wishes to access the data storage unit, the faulty storage areas are avoided being accessed and only the operable storage areas are accessed. This feature allows the SoC to still operate properly even if the embedded memory thereof has faulty storage areas, without having to replace the entire SoC.
The invention can be more filly understood by reading the following detailed description of the preferred embodiments, with reference made to the accompanying drawings, wherein:
As shown in
The storage area inspecting module 110 is used to respond to an inspecting startup event 201 and perform a storage area inspecting process on all the storage areas of the data storage unit 20 so as to inspect whether each of the storage areas is in an operable or faulty status, that is, to identify faulty storage areas and operable storage areas of the data storage unit 20 and acquire addresses of the faulty storage areas. In the present embodiment, the inspecting startup event 201 can be induced by a power-on event of the SoC 10, a reset event of the SoC 10, or a predefined startup signal of the SoC 10 issued after the SoC 10 is idle for a predefined time, etc.
The storage area recording module 120 is used to record the operable or faulty status of each of the storage areas of the data storage unit 20 as inspected by the storage area inspecting module 110 and set up a predefined address assigning rule for assigning an address of each of the faulty storage areas to one of addresses of the operable storage areas. The predefined address assigning rule comprises an address mapping table 121 as shown in
In addition to an embedded memory, the data storage unit can further comprise an external memory. Accordingly, the predefined address assigning rule can further be used for assigning the addresses of the faulty storage areas of the embedded memory to the addresses of the operable storage areas of the external memory.
The access managing and controlling module 130 is used to receive a request message containing access addresses issued by an external client unit or an internal client unit (e.g. a microprocessor 30 in the SoC 10) to the data storage unit 20, and inspect whether the access addresses of the request message match any address corresponding to the faulty storage areas. If no, that is, all the access addresses of the request message correspond to the operable storage areas, the access managing and controlling module 130 allows the storage area unit 20 to be accessed according to the received access addresses. If yes, that is, at least one of the access addresses corresponds to the faulty storage areas, the access managing and controlling module 130 changes the at least one access address to at least one of the addresses of the operable storage areas in accordance with the address mapping table 121 of the storage area recording module 120, such that the operable storage areas of the data storage unit 20 can be accessed according to the at least one changed address and the other access addresses corresponding to the operable storage areas. If the data storage unit 20 is a cache memory and the access addresses of the request message include at least one address corresponding to the faulty storage areas, the access managing and controlling module 130 responsively issues a miss signal. For example, if the access addresses requested by the microprocessor 30 include an address [1000] corresponding to one of the faulty storage areas, the access managing and controlling module 130 changes the address [1000] to an address [1001] according to the address mapping table 121 in
Referring to
When an external client unit or an internal client unit such as an internal microprocessor 30 wishes to access the data storage unit 20, access addresses requested by the microprocessor 30 are firstly transmitted to the access managing and controlling module 130 where the access addresses are inspected to match any address corresponding to the faulty storage areas or not. If no, the access managing and controlling module 130 allows the microprocessor 30 to access the data storage unit 20 according to the requested access addresses. If yes, for example, the access addresses include an address [ 1000] corresponding to the faulty storage area, the access managing and controlling module 130 changes the address [1000] to an address [1001] of the operable storage area according to the address mapping table 121 (the predefined address assigning rule) in
Therefore, by applying the faulty storage area marking and accessing method and system to the data storage unit (such as an embedded memory of a SoC), the automatic faulty storage area marking function for access control is provided for the data storage unit. The storage area inspecting process is performed on the data storage unit to inspect the operable or faulty status of each of the storage areas in the data storage unit to identify operable storage areas and faulty storage areas of the data storage unit. Thereby, when a client unit wishes to access the data storage unit, the faulty storage areas are avoided being accessed and only the operable storage areas are accessed. This feature allows the SoC to still operate properly even if the embedded memory thereof has faulty storage areas, without having to replace the entire SoC. Therefore, the present invention overcomes the drawbacks in the prior art without causing a cost issue. Furthermore, the predefined address assigning rule is further a cache miss response to CPU if the embedded memory is a cache memory.
The foregoing descriptions are only the preferred embodiment and not restrictive of the technical scope of the present invention. The essential technical contents of the present invention are widely defined in the appended claims. All embodiments or methods accomplished by others which are the same as the definitions of the following claims or other equivalents should be considered as falling within the scope of the claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 094126687 | Aug 2005 | TW | national |
This application is a continuation-in-part of copending application Ser. No. 11/267,115 filed on Nov. 3, 2005, the disclosure of which is expressly incorporated herein by reference.
| Number | Date | Country | |
|---|---|---|---|
| Parent | 11267115 | Nov 2005 | US |
| Child | 11500574 | Aug 2006 | US |
