1. Field of the Invention
The present invention relates to a semiconductor component, e.g., a power MOS field-effect transistor having an integrated trench junction barrier Schottky (TJBS) diode, which power semiconductor component can be used, for example, in synchronous rectifiers for generators in motor vehicles.
2. Description of Related Art
Power MOS field-effect transistors have been used for decades as fast switches for applications in power electronics. In addition to planar, double-diffused structures (DMOS), power MOSFETs having trench structures (trench MOS) are also used. However, in applications having very fast switching processes, in which current also briefly flows via the body diode of the MOSFET, e.g. in synchronous rectifiers, DC-DC converters, etc., on-state power losses and switching losses of the pn body diode have a disadvantageous effect. As a possible remedy, a parallel circuit of the MOSFET is proposed, e.g. with its integrated pn body diode and a Schottky diode.
Thus, from U.S. Pat. No. 5,111,253 combination of a DMOS and an integrated Schottky barrier diode (SBD) is known. In Schottky diodes, the advantage of low forward voltage and low turn-off losses has to be weighed against the disadvantage of a higher reverse current. In addition to the reverse current, caused in principle by the barrier of the metal-semiconductor transition, there is also a reverse voltage-dependent portion caused by the so-called barrier lowering (BL). In published U.S. Patent application US-2005/0199918, a combination of a trench MOS with an integrated trench MOS barrier Schottky diode (TMBS) is proposed. In this way, the disadvantageous BL effect can largely be suppressed.
Highly n+-doped regions 8 (source) and highly p+-doped regions 7 (for connecting the p-well) are made on the surface of this p-doped layer. The surface of the overall structure is coated with a suitable conductive layer 9, e.g. with Ti or titanium silicide. In the regions in which a contact exists with p+-doped or n+-doped layers 7 and 8, conductive layer 9 acts as an ohmic contact. In the regions between the trenches that are not embedded in a p-doped layer 6, conductive layer 9 acts as a Schottky contact with n-doped regions 2 situated under it. Over conductive layer 9 there is generally situated another thicker conductive metallic layer, or a layer system made up of a plurality of metallic layers. This metallic layer 10, acting as a source contact, can be an aluminum alloy, standard in silicon technology, having copper and/or silicon portions, or can be some other metallic system. On the rear side, there is applied a standard solderable metallic system 11, e.g. made up of a layer sequence of Cr, NiV, and Ag. Metallic system 11 acts as drain contact. Polysilicon layers 5 are galvanically connected to one another and to a gate contact (not shown).
Electrically, the Schottky diode is thus the regions in which metallic layer 9 contacts n-doped silicon 2, connected in parallel to the body diode of the MOSFET, i.e. p-doped layer 6 and n-doped layer 2. If reverse voltage is applied, space charge zones form between the trench structures adjacent to the Schottky contacts, and shield the electrical field from the actual Schottky contacts, i.e. transition 9-2. Due to the lower field at the Schottky contact, the BL effect is reduced, i.e. an increase in reverse current with increasing reverse voltage is prevented. Due to the lower forward voltage of the Schottky diode, the pn body diode is not operated in the forward direction. Therefore, Schottky diode 9-2 acts as an inverse diode of the MOSFET.
Because in a Schottky diode no stored charge of minority bearers has to be cleared out, in the ideal case only the capacitance of the space charge zone is to be charged. The high reverse current peaks that occur in a pn diode due to the clearing out do not occur. With the integration of a Schottky diode, the switching behavior of the MOSFET is improved, and switching time and switching losses are lower.
For many applications, it is advantageous to be able to operate the MOSFET also in avalanche breakdown mode. Voltage peaks can be limited by the body diode. As a result of the parasitic NPN transistor that is always present in MOSFETs, undesired destructive breakdowns of the NPN structure may occur. Therefore, this operation should in general not be permitted. In the case of the integrated TMBS diode, such operation is possible in principle, but is not recommended for reasons of quality, due to the charge bearer injection that then occurs into the MOS structure of the TMBS.
In published U.S. Patent application US 2006/0202264, it is proposed to additionally integrate so-called junction barrier Schottky diodes into a trench MOS. Junction barrier Schottky diodes are planar Schottky diodes in whose flat regions diffusion has taken place with a conductivity type opposite to that of the substrate doping, e.g. p-doped regions in an n-doped substrate. When a reverse voltage is applied, the space charge zones between the p-doped regions grow together and shield the electrical field to some extent from the Schottky contact. This reduces the BL effect somewhat, but the effect is significantly less than in a TMBS structure. With such a system, it is possible to operate the MOSFET in avalanche breakdown mode without the danger of triggering and destroying the parasitic NPN transistor.
With the power semiconductor component according to the present invention, in an advantageous manner the barrier lowering effect (BL effect) that occurs in conventional components is effectively suppressed. For this purpose, it is proposed to additionally integrate TJBS diodes (trench MOS barrier Schottky diodes) into a power MOSFET. The breakdown voltage of the TJBS structure can be selected to be larger or smaller than the breakdown voltage of the additionally present pn body diode. In the case in which the avalanche breakdown voltage (Z voltage) of the TJBS structure is smaller than the breakdown voltage of the NPN transistor or of the pn body diode, the component can even be operated at higher currents in breakdown mode.
Between these trenches there is situated a p-doped layer (p-well) 6. On the surface of this p-doped layer there are formed highly n+-doped regions 8 (source) and highly p+-doped regions 7, for the connection of the p-well. In some regions of the component, there is no p-doped layer (p-well) 6 between the trenches, but only n-doped epi layer 2. These trenches are also not provided with a silicon dioxide layer 4, but rather are filled with p-doped silicon or polysilicon 12.
The trenches are either completely filled, as shown in
At the points in the trenches that are filled with p-doped silicon, epi layer 2 is contacted with a Schottky metal 9, e.g. titanium silicide. Transition 9-2 forms the actual Schottky diode. When reverse voltage is applied, space charge zones are formed between the trench structures that are adjacent to the Schottky contacts and are filled with p-silicon, and shield the electrical field from the actual Schottky contacts (transition 9-2). Due to the lower field at the Schottky contact, the BL effect is reduced, i.e. an increase in reverse current with increasing reverse voltage is prevented.
Region I is a so-called trench junction barrier Schottky diode (TJBS). The doping of p-layer 12 is selected such that breakdown voltage UZ_TJBS between p-layer 12 and n-doped epi layer 2 (TJBS) is smaller than breakdown voltage UZ_SBD of Schottky diode 9-2. Standardly, the breakdown voltage is also smaller than the breakdown voltage of pn inverse diode 6-2, or the breakdown voltage of the parasitic NPN transistor formed from regions 8, (7, 6) and 2.
Analogous to a known system according to
Regions 13 can be produced e.g. using a diborane gas phase occupation with a subsequent diffusion or heating step, e.g. rapid thermal annealing RTP. The doping and the diffusion or heating step are selected such that the corresponding breakdown voltage UZ_TJBS is achieved. All further variants of the systems according to the present invention can optionally be realized with trenches 12 filled with p-doped silicon or polysilicon.
In the exemplary embodiments shown in
The semiconductor materials and dopings selected in the description of the solutions according to the present invention are presented as examples. In each case, instead of n-doping p-doping could be chosen, and instead of p-doping n-doping could be chosen.
Number | Date | Country | Kind |
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10 2009 028 240.8 | Aug 2009 | DE | national |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/EP2010/058166 | 6/10/2010 | WO | 00 | 4/12/2012 |