The present disclosure relates generally to imprint lithography techniques and in particular to a stamp that is used in UV-micro/nanoimprint lithography processes or thermal micro/nanoimprint lithography processes and a method for manufacturing the stamp.
As circuit densities increase and device sizes decrease for next generation semiconductor devices, providing the external connections, such as wiring, to these devices involves advanced packaging technologies. One such packaging technology is wafer level packaging.
Wafer level packaging streamlines the manufacturing and packaging processes of semiconductor devices by integrating device manufacturing, package assembly (packaging), electrical testing, and reliability testing (burn-in) at wafer level, where forming of the top and bottom layers of the packaging, creating the I/O connections, and testing the packaged device are all performed before the devices are singulated into individual packaged components. The advantages of wafer level packaging include reduced overall manufacturing costs of the resulting device, reduced package size, and improved electrical and thermal performance. However, typical wafer level packaging schemes limit the number of I/O connections that can be made to the semiconductor device to the number of I/O terminals that can be spread over the surface of the die. Fan-out wafer level packaging retains the advantages of wafer level packaging while increasing the area available for I/O terminals by redistributing the I/O terminals to areas exterior of the surface of the die, using one or more redistribution layers (RDL).
Fan-out wafer level packaging processes entail that the surface area of the I/O terminal redistribution layer for each individual die be larger than the surface area of the individual die itself. However, maximizing the number of devices (dies) on a wafer minimizes costs during manufacturing of the device, and thus the spaces between individual devices (dice lines) are usually only large enough to accommodate the width of the dicing saw used to dice the wafer into its individual dies. One method of creating the additional surface area external of the die surface is to form a new wafer with dies redistributed in a spaced apart pattern, known as a reconstituted substrate.
Typically, to form a reconstituted substrate, a wafer is singulated into individual die which are then positioned on a molding plate (carrier substrate) spaced apart from one another and temporarily secured thereto by an adhesion layer. A molding compound is dispensed onto the carrier substrate and the dies secured thereto and subsequently cured, which embeds the spaced apart dies in the molding compound to form the reconstituted substrate. The terminal sides of the dies are then exposed by removing the adhesion layer, and redistribution layers, having interconnects disposed therein, are subsequently formed on the reconstituted substrate, to redistribute a portion, or all, of the device's I/O terminals to areas exterior of the surface of the die, which increases the area available for I/O connections and thus the number of possible I/O terminals.
Process defects associated with forming the reconstituted substrate, such as undesirable repositioning of the dies within the reconstituted substrate from their original placement location on the adhesion layer, also known as die shift, cause misalignment between the via interconnects in the subsequently formed redistribution layer and the electrical contacts on the dies. Additionally, the redistribution layers are typically formed using conventional photolithography and etch processes, which are costly, equipment intensive, and time consuming. For example, in some stages of manufacture, a photopatternable dielectric polymer material, such as a polyimide material, is used in the formation of a redistribution layer (RDL) for making wiring connections from chip surface contacts to ball grid array (BGA) pads. In general, photolithographic processes are sensitive to topographic effects, such as differences in patterning layer heights or thickness, due to limitations on the achievable depth of focus (DOF) during exposure processes.
Accordingly, there is a need in the art for improved methods of forming reconstituted substrate and redistribution layers disposed thereon.
The present disclosure relates generally to imprint lithography techniques and in particular, to a stamp used in UV-micro/nanoimprint lithography processes or thermal micro/nanoimprint lithography processes and a method for manufacturing the stamp.
In one aspect, an imprint lithography stamp includes a backing plate and a stamp body. The backing plate includes a front surface and a backside surface opposite the front surface, wherein the backing plate has a plurality of through-holes extending from the front surface to the backside surface. The stamp body includes a patterned surface having a plurality of protrusions extending from the stamp body and a back surface opposite the patterned surface. The back surface of the stamp body contacts the front surface of the backing plate and a portion of the stamp body extends from the back surface of the stamp body into the plurality of through-holes formed in the backing plate.
Implementations may include one or more of the following. The stamp body may be fabricated from a fluorinated ethylene propylene (FEP) copolymer. The backing plate may be fabricated from glass, ceramic, fiberglass, chrome, stainless steel, or nickel. At least one protrusion of the plurality of protrusions may have a diameter in a range from about 1 micrometer to about 20 micrometers. At least one protrusion of the plurality of protrusions may have a diameter in a range from about 5 micrometers to about 15 micrometers. At least one protrusion of the plurality of protrusions may have a diameter in a range from about 5 micrometers to about 10 micrometers. At least one through-hole of the plurality of through-holes may have a diameter in a range from about 0.5 millimeters to about 1 millimeter. Adjacent protrusions may be separated by a gap which is about twice a diameter of the protrusion or greater. An aspect ratio of at least one protrusion of the plurality of protrusions may be greater than one. The stamp body may have a thickness measured from the patterned surface to the back surface of from about 0.1 millimeters to about 2 millimeters.
In another aspect, a method for forming a redistribution layer includes depositing a polymer layer onto a surface of a reconstituted substrate, the reconstituted substrate comprising a plurality of devices disposed in a molding compound. The method further includes heating the polymer layer to a temperature in a range from about 120 degrees Celsius to about 150 degrees Celsius. The method further includes physically imprinting a pattern into the polymer layer with an imprint lithography stamp to form a plurality of openings therein, wherein the imprint lithography stamp comprises fluorinated ethylene propylene (FEP).
Implementations may include one or more of the following. The imprint lithography stamp may include a backing plate, including a front surface and a backside surface opposite the front surface, wherein the backing plate has a plurality of through-holes extending from the front surface to the backside surface; and a stamp body, including a patterned surface having a plurality of protrusions extending from the stamp body and a back surface opposite the patterned surface, wherein the back surface contacts the front surface of the backing plate and a portion of the stamp body extends from the back surface of the stamp body into the plurality of through-holes formed in the backing plate. The method may further include heating the polymer layer to a temperature in a range from about 180 degrees Celsius to about 200 degrees Celsius after imprinting the pattern. The polymer layer may include a polyimide or an Ajinomoto Build-up Film. Imprinting the pattern into the polymer layer may include heating the imprint lithography stamp to a temperature in a range from about 100 degrees Celsius to about 150 degrees Celsius. Imprinting the pattern into the polymer layer may take place in an environment at less than about atmospheric pressure. Imprinting the pattern into the polymer layer may include exposing the polymer to UV radiation through the imprint lithography stamp. The reconstituted substrate may further include a previously formed redistribution layer disposed on the plurality of devices, the previously formed redistribution layer comprising a dielectric polymer layer having a plurality of metal interconnects disposed therein, wherein the surface of the previously formed redistribution layer has been planarized to remove portions of a seed layer and a metal layer therefrom.
In another aspect, a packaging method includes depositing a polymer layer onto a first surface of a substrate. The method further includes physically imprinting a pattern into the polymer layer with an imprint lithography stamp to form a polymer layer with a plurality of openings therethrough, wherein the imprint lithography stamp is fabricated from fluorinated ethylene propylene (FEP). The method further includes forming a plurality of metal interconnects in the polymer layer including depositing a seed layer onto the substrate and the polymer layer formed thereon and forming a copper layer on the seed layer. The method further includes removing portions of the seed layer and the copper layer from a second surface of the polymer layer.
Implementations may include one or more of the following. The polymer layer may include an Ajinomoto Build-up Film. The method may further include heating the polymer layer to a temperature in a range from about 180 degrees Celsius to about 200 degrees Celsius after imprinting the pattern. Physically imprinting the polymer layer may include heating the imprint lithography stamp to a temperature in a range from about 100 degrees Celsius to about 150 degrees Celsius. Physically imprinting the pattern into the polymer layer may take place in an environment at less than about atmospheric pressure.
In another aspect, a method of manufacturing an imprint lithography stamp includes injecting a fluorinated ethylene propylene polymer melt into an injection mold assembly. The injection mold assembly includes an upper half mold body that defines a first recess; a backing plate inserted in the first recess, the backing plate having a plurality of through-holes; a lower half mold body that defines a second recess; a stamp master plate inserted in the second recess, the stamp master plate having a negative patterned surface that has a plurality of negative features; and a spacer gasket positioned in between the upper half mold body and the lower half mold body, wherein the upper half mold body, the lower half mold body, and the spacer gasket define a cavity in which the imprint lithography stamp is formed. The method further includes filling the cavity and at least a portion of the through-holes of the backing plate with the fluorinated ethylene propylene polymer melt and curing the fluorinated ethylene propylene polymer melt material to form the imprint lithography stamp.
Implementations may include one or more of the following. The imprint lithography stamp may include the backing plate. The stamp master plate may be fabricated from nickel, polydimethylsiloxane (PDMS), or a combination thereof. The backing plate may be fabricated from glass, ceramic, fiberglass, chrome, stainless steel, or nickel. At least one feature of the plurality of negative features may be an aperture having a diameter in a range from about 1 micrometer to about 20 micrometers. The aperture may have a diameter in a range from about 5 micrometers to about 15 micrometers. The aperture may have a diameter in a range from about 5 micrometers to about 10 micrometers. Adjacent features may be separated by a distance in a range from about 1 millimeter to about 2 millimeters. At least one through-hole of the plurality of through-holes may have a diameter in a range from about 0.5 millimeters to about 1 millimeter. The spacer gasket may have a thickness of from about 0.1 millimeters to about 2 millimeters.
In another aspect, a non-transitory computer readable medium has stored thereon instructions, which, when executed by a processor, causes the process to perform operations of the above apparatus and/or method.
So that the manner in which the above-recited features of the present disclosure can be understood in detail, a more particular description of the implementations, briefly summarized above, may be had by reference to implementations, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical implementations of this disclosure and are therefore not to be considered limiting of its scope, for the disclosure may admit to other equally effective implementations.
To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one implementation may be beneficially incorporated in other implementations without further recitation.
In some wafer-level packaging processes a redistribution layer (RDL) is used to reroute connections to chosen locations. In some stages of manufacture, a patternable dielectric polymer material, such as a polyimide material or Ajinomoto Build-up Film (ABF), is used in the formation of the RDL. Features, such as vias for example, are formed in the patternable dielectric polymer material. In some processes, small vias for example, less than 10 micrometers, are formed in the patternable dielectric polymer material.
Via formation by micro/nanoimprint lithography in dielectric polymer materials such as ABF and polyimide has been proposed. Current materials used for forming the imprint lithography stamps used in the micro/nanoimprint lithography processes include polydimethylsiloxane (PDMS). However, there are problems with imprint lithography stamps formed from PDMS material when high temperatures, such as temperatures greater than 50 degrees Celsius are used during the lithography process. For example, in an imprint lithography process that uses ABF, temperatures of 120 to 150 degrees Celsius or more can be used. At these high temperatures, PDMS loses its rigidity, which can lead to feature deformation in the patternable dielectric polymer material such as bending of the features formed in the patternable dielectric polymer material. Other materials such as fused silica do not have anti-stiction properties and thus cannot demold from ABF.
As noted above, imprinting with lithography stamps composed of materials such as PDMS has been proposed. As described herein, by manufacturing the imprint lithography stamp with a more durable material, high aspect ratio vias, for example, vias having an aspect ratio greater than one can be formed in photopatternable dielectric polymer materials that involve higher processing temperatures without the feature deformation caused by imprinting with PDMS lithography stamps.
In one aspect of the present disclosure, a microimprint lithography stamp is formed from fluorinated ethylene propylene (FEP) copolymer material. FEP is a copolymer of hexafluoropropylene and tetrafluoroethylene. FEP material typically has 200 times higher Young's Modulus and twice as much hardness as PDMS, yet has superior anti-stick properties. Similar to PDMS, FEP is transparent and also has a thermal expansion coefficient (CTE) that is lower than PDMS. However, FEP is more difficult to mold than PDMS. Thus, in additional aspects of the present disclosure, an injection mold assembly and an injecting molding method for forming an FEP imprint lithography stamp are provided. In one aspect, the injection mold assembly includes a PDMS stamp insert that is positioned in the injection mold assembly and used to transfer a pattern to the FEP imprint lithography stamp. In one example, the pattern transfer is obtained using a PDMS stamp insert, which is positioned in the injection mold.
The backing plate 110 includes a front surface 112, a backside surface 114 opposite the front surface 112, and an outer peripheral wall 116 which define a body 118.
The backing plate 110 includes a plurality of through-holes 120. The plurality of through-holes 120 extend from the front surface 112 through the body 118 to the backside surface 114. In one example, at least one through-hole of the plurality of the plurality of through-holes has a diameter in a range from about 0.1 millimeter to about 1 millimeter, for example, in a range from about 0.5 millimeters to about 1 millimeter. The plurality of through-holes 120 are dimensioned to accommodate at least a portion of the stamp plate 130.
The backing plate 110 further includes an injection port 122, which extends from the front surface 112 through the body 118 to the backside surface 114. The injection port 122 provides a port for delivery of polymer melt material into an injection mold assembly, which is used to form the stamp plate 130. The injection port 122 will be discussed in further detail with reference to
The body 118 of the backing plate 110 can be formed of glass, ceramic, fiberglass, chrome, stainless steel, or nickel. In one example, the backing plate 110 is formed from glass. Forming the backing plate 110 from a transparent or a semi-transparent material permits easier alignment of the imprint lithography stamp 100. The body 118 of the backing plate 110 can have a thickness in a range from about 0.2 mm to about 1.0 mm, for example from about 0.3 mm to about 0.75 mm. The body 118 of the backing plate 110 can be from about 20 mm across to about 30 mm across, for example, about 25 mm across. The body 118 of the backing plate 110 can be square (from a top view of the backing plate 110), rectangular, circular or any other shape. In one implementation, the body 118 of the backing plate 110 has a surface area from about 500 mm2 to about 700 mm2, for example, from about 600 mm2 to about 650 mm2, such as about 625 mm2. In one example, where the body 118 of the backing plate 110 is square, the body 118 of the backing plate 110 has dimensions of 25 mm by 25 mm.
The backing plate 110 provides rigidity to the imprint lithography stamp 100. For example, if the imprint lithography stamp 100 were made without the backing plate 110, the stamp plate 130 can expand upon heating, which shifts the position of the protrusions 140 adversely affecting the pattern formed in the dielectric polymer material. In addition, the backing plate 110 also serves as an insert in the injection mold assembly 200, which is used to form the imprint lithography stamp 100.
The stamp plate 130 includes a patterned surface 132, a back surface 134 opposite the patterned surface 132, and an outer peripheral wall 136 which define a body 138. The body 138 of the stamp plate 130 can be formed of a polymer that does not deform above 50 degrees Celsius. In one example, the body 138 of the stamp plate 130 is formed of fluorinated ethylene propylene (FEP) copolymer. The stamp plate 130 can be formed using the injection molding process described herein. The body 138 of the stamp plate 130 can have a thickness in a range from about 0.1 mm to about 2.0 mm, for example from about 0.1 mm to about 1 mm such as from about 0.3 mm to about 0.75 mm. The body 138 of the stamp plate 130 can be from about 20 mm across to about 30 mm across, for example, about 25 mm across. The body 138 of the stamp plate 130 can be square (from a top view of the backing plate 110), rectangular, circular or any other shape. In one implementation, the patterned surface 132 of the stamp plate 130 has a surface area from about 500 mm2 to about 700 mm2, for example, from about 600 mm2 to about 650 mm2, such as about 625 mm2. In one example, where the body 138 of the stamp plate 130 is square, the patterned surface 132 has dimensions of 25 mm by 25 mm.
The plurality of protrusions 140 extend from the patterned surface 132 of the stamp body 138. Referring to
In one example, the patterned surface 132 has a surface area from about 500 mm2 to about 700 mm2 and has from about 100 to about 500 protrusions 140, for example, from about 150 to about 200 protrusions 140 that occupy from about 3% to about 9% of the surface area of the patterned surface 132. In another example, the patterned surface 132 has a surface area of from about 625 mm2 to about 650 mm2 and has from about 100 to about 200 protrusions 140 that occupy from about 3% to about 9% of the area of the patterned surface 132.
In one example, the protrusions 140 are arranged in a substantially linear arrangement across the patterned surface 132. In another example, the protrusions 140 are arranged in a radial pattern emanating from a center of the patterned surface 132. In another example, as shown in
The protrusions 140 are shaped to form a corresponding via of chosen shape in the dielectric polymer material to be patterned. In one example, as depicted in
The stamp plate 130 further includes the back surface 134 opposite the patterned surface 132. As depicted in
The upper half mold body 210 is defined by a first surface 216, a second surface 218 opposite the first surface 216, a third surface 219 opposite the first surface 216, at least one outer sidewall 222, and at least one inner peripheral wall 224. The upper half mold body 210 defines a first recess 212. The first recess 212 is defined by the second surface 218 and the inner peripheral wall 224, which extends from the second surface 218 to the third surface 219. As depicted in
The upper half mold body 210 further includes an injection port 214, which extends from the first surface 216 of the upper half mold body 210 to the second surface 218 of the upper half mold body 210, which also serves as the bottom surface of the first recess 212. The injection port 214 of the upper half mold body 210 aligns with the injection port 122 of the backing plate 110. The injection port 214 is typically coupled with an injection molding machine. Polymer material is melted in the injection molding machine and then injected into the injection mold assembly 200 via the injection port 214, where the polymer material melt cools and solidifies to form the imprint lithography stamp 100.
The upper half mold body 210 can be composed of any material that can withstand process temperatures while demolding from the formed imprint lithography stamp 100. In one example, the upper half mold body 210 is composed of stainless steel.
The injection mold assembly 200 further includes the lower half mold body 250. The lower half mold body 250 is defined by a first surface 256, a second surface 258 opposite the first surface 256, a third surface 259 opposite the first surface 256, at least one outer sidewall 262, and at least one inner peripheral wall 264. The lower half mold body 250 defines a second recess 252. The second recess 252 is defined by the second surface 258 and the inner peripheral wall 264, which extends from the second surface 258 to the third surface 259. As depicted in
The lower half mold body 250 can be composed of any material that can withstand process temperatures while demolding from the formed imprint lithography stamp 100. In one example, the lower half mold body 250 is composed of stainless steel.
The injection mold assembly 200 further includes the spacer gasket 230. The spacer gasket 230 includes an annular band 232. As depicted in
The injection mold assembly 200 further includes the stamp master plate 240. As depicted in
In one example, at least one feature of the plurality of negative features 248 is an aperture having a diameter in a range from about 1 micrometer to about 20 micrometers. In another example, at least one feature of the plurality of negative features 248 is an aperture having a diameter in a range from about 5 micrometers to about 15 micrometers. In yet another example, at least one feature of the plurality of negative features 248 is an aperture having a diameter in a range from about 5 micrometers to about 10 micrometers. In one example, adjacent features of the plurality of negative features 248 are separated by a distance in a range from about 1 millimeter to about 2 millimeters.
The injection mold assembly 200 can further include internal cooling or heating lines where a fluid is cycled through the injection mold assembly 200.
The stamp master plate 240 is molded from a master. In one example, the stamp master plate 240 is made from a semi-transparent material such as PDMS or nickel. Materials such as nickel or PDMS easily demold from the formed patterned surface 132 of the stamp plate 130.
At operation 520, molten polymer material, for example, heated FEP copolymer is injected into the injection mold assembly. In one example, prior to injecting the molten polymer material into the injection mold assembly, the two halves of the injection mold assembly are securely closed together with the spacer gasket sandwiched in between. The polymer material is delivered to the injection molding unit, usually in the form of pellets, and advanced toward the injection mold assembly by the injection molding unit. The polymer material is melted in the injection molding unit by temperature and/or pressure and then the molten polymer material is injected into the injection mold assembly. As the molten polymer material enters the injection mold assembly, the displaced air escapes through vents in the injection mold assembly design, for example, air can escape through vents in the injection pins and along the parting line.
Referring to
At operation 530, the polymer material is cured to form the imprint lithography stamp. The polymer melt material that is inside the injection mold assembly begins to cool as it contacts the interior surfaces of the injection mold assembly. Once the injection mold assembly is filled, the polymer melt material is allowed to cool for the amount of time needed to harden the polymer material to form the imprint lithography stamp. Cooling time typically depends on the type of polymer melt used and the thickness of the imprint lithography stamp.
After sufficient time has passed, at operation 540, the imprint lithography stamp is removed from the injection mold assembly. After operation 540, some post processing can occur. For example, during cooling polymer material in the injection port can solidify and attach to the imprint lithography stamp. This excess material along with any flash that has occurred can be trimmed from the part, using, for example, cutters. In some examples, the scrap material resulting from the trimming is can be recycled and reused in the method 500.
The method 600 begins at operation 610 with depositing a polymer layer 721, such as a dielectric polymer layer, such as a polyimide layer or ABF layer, onto a surface of a reconstituted substrate (not shown). In one example, the ABF layer is a three-layer polymer system including a polyethylene terephthalate (PET) support film, a resin layer, and a cover film. Herein, the polymer layer 721 is deposited using a spin coating and soft bake method where a dielectric polymer precursor, for example, a polyimide precursor or an ABF precursor, is dispensed onto a rotating reconstituted substrate until a uniform layer of the dielectric polymer precursor is formed thereon. The reconstituted substrate and the dielectric polymer precursor disposed thereon are heated to a temperature in a range from about 120 degrees Celsius to about 150 degrees Celsius (soft baked) to remove only a portion of the solvents contained in the dielectric polymer precursor making the polymer layer 721 suitable for subsequent imprinting.
The method 600 continues at operation 620 with physically imprinting a pattern into the polymer layer 721 using an imprint lithography stamp, such as the imprint lithography stamp 100 shown in
Herein, the imprint lithography stamp 100 includes a via pattern used in forming a fanned out redistribution layer over one or more individual die of the reconstituted substrate in a step and repeat in another area process. In other examples, the imprint lithography stamp 100 includes a plurality of patterns used in forming a plurality of fanned out redistribution interconnects over a plurality of dies in a single imprint. In some implementations, a single imprint lithography stamp is used to form a plurality of openings in the polymer layer 721 over the entire reconstituted substrate in a single imprint. In one example, the imprint lithography stamp 100 is heated to a temperature in a range from about 100 degrees Celsius to about 150 degrees Celsius and is pressed into the polymer layer 721, which is displaced around the pattern of the imprint lithography stamp 100. In another example, the polymer layer 721 is heated to a temperature in a range from about 120 degrees Celsius to about 150 degrees Celsius, for example from about 130 degrees Celsius to about 140 degrees Celsius, and the imprint lithography stamp 100 is pressed into the heated polymer layer 721. In yet another example, both the polymer layer 721 and the imprint lithography stamp 100 are heated.
The imprint lithography stamp 100 is subsequently cooled and removed from the polymer layer 721 leaving a via opening formed therein, such as opening(s) 725 shown in
After formation of the opening(s) 725, the reconstituted substrate can be thermally cured in a nitrogen environment. In one example, the reconstituted substrate is thermally cured at a temperature from about 180 degrees Celsius to about 200 degrees Celsius. Residual polymer on the contact pad(s) 703 can be subsequently removed using an oxygen plasma descum or other suitable method. In some implementations, such as implementations using a UV imprint lithography process the oxygen plasma descum is before the thermal cure.
The method 600 continues at operation 630 with depositing a seed layer 709 over the polymer layer 721 and the opening(s) 725 disposed therein. The seed layer 709 enables subsequent electroplating of a metal layer, herein copper, and provides a barrier to prevent diffusion of copper atoms, from the subsequently formed metal layer, into the surrounding polymer layer 721 and the contact pad(s) 703. Herein, the seed layer 709 includes tantalum, tantalum nitride, tungsten, titanium, titanium tungsten, titanium nitride, tungsten nitride, titanium copper, or a combination thereof. The seed layer 709 is deposited using any suitable method such as chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), or a combination thereof.
The method 600 continues at operation 640 with forming a metal layer, such as the metal layer 717 shown in
At operation 650, the method 600 includes planarizing the surface of the reconstituted substrate to remove portions of the metal layer 717 and the seed layer 709 disposed on the surface of the polymer layer 721 to form one or more interconnect structures 727 in a redistribution layer 714 as shown in
Implementations of the present disclosure can include one or more of the following potential advantages. By manufacturing the imprint lithography stamp with a more durable material, such as FEP, high aspect ratio vias, for example, vias having an aspect ratio greater than one can be formed in photopatternable dielectric polymer materials that involve higher processing temperatures, such as ABF and polyimides, without the feature deformation caused by imprinting with currently available PDMS lithography stamps. The imprint lithography stamp includes a glass backing plate, which provides rigidity to the stamp. The glass backing plate includes a plurality of through-holes, portions of the stamp body extend into the through-holes, which helps bond the stamp plate to the backing plate. An injection mold design for forming the imprint lithography stamp is also provided. The injection mold includes the backing plate as an insert. The injection mold further includes a stamp master plate, which contains the negative pattern of the protrusions formed on the imprint lithography stamp. The stamp master plate is fabricated from PDMS or nickel, which easily demolds from the FEP stamp body.
Implementations and all of the functional operations described in this specification can be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structural means disclosed in this specification and structural equivalents thereof, or in combinations of them. Implementations described herein can be implemented as one or more non-transitory computer program products, i.e., one or more computer programs tangibly embodied in a machine readable storage device, for execution by, or to control the operation of, data processing apparatus, e.g., a programmable processor, a computer, or multiple processors or computers.
The processes and logic flows described in this specification can be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit).
The term “data processing apparatus” encompasses all apparatus, devices, and machines for processing data, including by way of example a programmable processor, a computer, or multiple processors or computers. The apparatus can include, in addition to hardware, code that creates an execution environment for the computer program in question, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them. Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer.
Computer readable media suitable for storing computer program instructions and data include all forms of nonvolatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks; magneto optical disks; and CD ROM and DVD-ROM disks. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.
When introducing elements of the present disclosure or exemplary aspects or implementation(s) thereof, the articles “a,” “an,” “the” and “said” are intended to mean that there are one or more of the elements.
The terms “comprising,” “including” and “having” are intended to be inclusive and mean that there may be additional elements other than the listed elements.
The present disclosure describes imprint lithography stamps, methods of manufacturing imprint lithography stamps, and methods of using imprint lithography stamps. Certain details are set forth in the description and in
Many of the details, dimensions, angles and other features shown in the Figures are merely illustrative of particular implementations. Accordingly, other implementations can have other details, components, dimensions, angles and features without departing from the spirit or scope of the present disclosure. In addition, further implementations of the disclosure can be practiced without several of the details described herein.
While the foregoing is directed to implementations of the present disclosure, other and further implementations of the disclosure may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.
This application is a divisional of U.S. patent application Ser. No. 16/849,393, filed Apr. 15, 2020, which is incorporated herein by reference in its entirety.
Number | Name | Date | Kind |
---|---|---|---|
4073610 | Cox | Feb 1978 | A |
5126016 | Glenning et al. | Jun 1992 | A |
5268194 | Kawakami et al. | Dec 1993 | A |
5353195 | Fillion et al. | Oct 1994 | A |
5367143 | White, Jr. | Nov 1994 | A |
5374788 | Endoh et al. | Dec 1994 | A |
5474834 | Tanahashi et al. | Dec 1995 | A |
5670262 | Dalman | Sep 1997 | A |
5767480 | Anglin et al. | Jun 1998 | A |
5783870 | Mostafazadeh et al. | Jul 1998 | A |
5841102 | Noddin | Nov 1998 | A |
5878485 | Wood et al. | Mar 1999 | A |
6013948 | Akram et al. | Jan 2000 | A |
6039889 | Zhang et al. | Mar 2000 | A |
6087719 | Tsunashima | Jul 2000 | A |
6117704 | Yamaguchi et al. | Sep 2000 | A |
6211485 | Burgess | Apr 2001 | B1 |
6384473 | Peterson et al. | May 2002 | B1 |
6388202 | Swirbel et al. | May 2002 | B1 |
6388207 | Figueroa et al. | May 2002 | B1 |
6392290 | Kasem et al. | May 2002 | B1 |
6459046 | Ochi et al. | Oct 2002 | B1 |
6465084 | Curcio et al. | Oct 2002 | B1 |
6489670 | Peterson et al. | Dec 2002 | B1 |
6495895 | Peterson et al. | Dec 2002 | B1 |
6506632 | Cheng et al. | Jan 2003 | B1 |
6512182 | Takeuchi et al. | Jan 2003 | B2 |
6538312 | Peterson et al. | Mar 2003 | B1 |
6555906 | Towle et al. | Apr 2003 | B2 |
6576869 | Gower et al. | Jun 2003 | B1 |
6593240 | Page | Jul 2003 | B1 |
6631558 | Burgess | Oct 2003 | B2 |
6661084 | Peterson et al. | Dec 2003 | B1 |
6677552 | Tulloch et al. | Jan 2004 | B1 |
6713719 | De Steur et al. | Mar 2004 | B1 |
6724638 | Inagaki et al. | Apr 2004 | B1 |
6775907 | Boyko et al. | Aug 2004 | B1 |
6781093 | Conlon et al. | Aug 2004 | B2 |
6799369 | Ochi et al. | Oct 2004 | B2 |
6894399 | Vu et al. | May 2005 | B2 |
7028400 | Hiner et al. | Apr 2006 | B1 |
7062845 | Burgess | Jun 2006 | B2 |
7064069 | Draney et al. | Jun 2006 | B2 |
7078788 | Vu et al. | Jul 2006 | B2 |
7091589 | Mori et al. | Aug 2006 | B2 |
7091593 | Ishimaru et al. | Aug 2006 | B2 |
7105931 | Attarwala | Sep 2006 | B2 |
7129117 | Hsu | Oct 2006 | B2 |
7166914 | DiStefano et al. | Jan 2007 | B2 |
7170152 | Huang et al. | Jan 2007 | B2 |
7192807 | Huemoeller et al. | Mar 2007 | B1 |
7211899 | Taniguchi et al. | May 2007 | B2 |
7271012 | Anderson | Sep 2007 | B2 |
7274099 | Hsu | Sep 2007 | B2 |
7276446 | Robinson et al. | Oct 2007 | B2 |
7279357 | Shimoishizaka et al. | Oct 2007 | B2 |
7312405 | Hsu | Dec 2007 | B2 |
7321164 | Hsu | Jan 2008 | B2 |
7449363 | Hsu | Nov 2008 | B2 |
7458794 | Schwaighofer et al. | Dec 2008 | B2 |
7511365 | Wu et al. | Mar 2009 | B2 |
7690109 | Mori et al. | Apr 2010 | B2 |
7714431 | Huemoeller et al. | May 2010 | B1 |
7723838 | Takeuchi et al. | May 2010 | B2 |
7754530 | Wu et al. | Jul 2010 | B2 |
7808799 | Kawabe et al. | Oct 2010 | B2 |
7839649 | Hsu | Nov 2010 | B2 |
7843064 | Kuo et al. | Nov 2010 | B2 |
7852634 | Sakamoto et al. | Dec 2010 | B2 |
7855460 | Kuwajima | Dec 2010 | B2 |
7868464 | Kawabata et al. | Jan 2011 | B2 |
7887712 | Boyle et al. | Feb 2011 | B2 |
7914693 | Jeong et al. | Mar 2011 | B2 |
7915737 | Nakasato et al. | Mar 2011 | B2 |
7932595 | Huemoeller et al. | Apr 2011 | B1 |
7932608 | Tseng et al. | Apr 2011 | B2 |
7955942 | Pagaila et al. | Jun 2011 | B2 |
7978478 | Inagaki et al. | Jul 2011 | B2 |
7982305 | Railkar et al. | Jul 2011 | B1 |
7988446 | Yeh et al. | Aug 2011 | B2 |
8069560 | Mori et al. | Dec 2011 | B2 |
8137497 | Sunohara et al. | Mar 2012 | B2 |
8283778 | Trezza | Oct 2012 | B2 |
8314343 | Inoue et al. | Nov 2012 | B2 |
8367943 | Wu et al. | Feb 2013 | B2 |
8384203 | Toh et al. | Feb 2013 | B2 |
8390125 | Tseng et al. | Mar 2013 | B2 |
8426246 | Toh et al. | Apr 2013 | B2 |
8470708 | Shih et al. | Jun 2013 | B2 |
8476769 | Chen et al. | Jul 2013 | B2 |
8518746 | Pagaila et al. | Aug 2013 | B2 |
8536695 | Liu et al. | Sep 2013 | B2 |
8628383 | Starling et al. | Jan 2014 | B2 |
8633397 | Jeong et al. | Jan 2014 | B2 |
8698293 | Otremba et al. | Apr 2014 | B2 |
8704359 | Tuominen et al. | Apr 2014 | B2 |
8710402 | Lei et al. | Apr 2014 | B2 |
8710649 | Huemoeller et al. | Apr 2014 | B1 |
8728341 | Ryuzaki et al. | May 2014 | B2 |
8772087 | Barth et al. | Jul 2014 | B2 |
8786098 | Wang | Jul 2014 | B2 |
8877554 | Tsai et al. | Nov 2014 | B2 |
8890628 | Nair et al. | Nov 2014 | B2 |
8907471 | Beyne et al. | Dec 2014 | B2 |
8921995 | Railkar et al. | Dec 2014 | B1 |
8952544 | Lin et al. | Feb 2015 | B2 |
8980691 | Lin | Mar 2015 | B2 |
8980727 | Lei et al. | Mar 2015 | B1 |
8990754 | Bird et al. | Mar 2015 | B2 |
8994185 | Lin et al. | Mar 2015 | B2 |
8999759 | Chia | Apr 2015 | B2 |
9059186 | Shim et al. | Jun 2015 | B2 |
9064936 | Lin et al. | Jun 2015 | B2 |
9070637 | Yoda et al. | Jun 2015 | B2 |
9099313 | Lee et al. | Aug 2015 | B2 |
9111914 | Lin et al. | Aug 2015 | B2 |
9142487 | Toh et al. | Sep 2015 | B2 |
9159678 | Cheng et al. | Oct 2015 | B2 |
9161453 | Koyanagi | Oct 2015 | B2 |
9210809 | Mallik et al. | Dec 2015 | B2 |
9224674 | Malatkar et al. | Dec 2015 | B2 |
9275934 | Sundaram et al. | Mar 2016 | B2 |
9318376 | Holm et al. | Apr 2016 | B1 |
9355881 | Goller et al. | May 2016 | B2 |
9363898 | Tuominen et al. | Jun 2016 | B2 |
9396999 | Yap et al. | Jul 2016 | B2 |
9406645 | Huemoeller et al. | Aug 2016 | B1 |
9499397 | Bowles et al. | Nov 2016 | B2 |
9530752 | Nikitin et al. | Dec 2016 | B2 |
9554469 | Hurwitz et al. | Jan 2017 | B2 |
9660037 | Zechmann et al. | May 2017 | B1 |
9698104 | Yap et al. | Jul 2017 | B2 |
9704726 | Toh et al. | Jul 2017 | B2 |
9735134 | Chen | Aug 2017 | B2 |
9748167 | Lin | Aug 2017 | B1 |
9754849 | Huang et al. | Sep 2017 | B2 |
9837352 | Chang et al. | Dec 2017 | B2 |
9837484 | Jung et al. | Dec 2017 | B2 |
9859258 | Chen et al. | Jan 2018 | B2 |
9875970 | Yi et al. | Jan 2018 | B2 |
9887103 | Scanlan et al. | Feb 2018 | B2 |
9887167 | Lee et al. | Feb 2018 | B1 |
9893045 | Pagaila et al. | Feb 2018 | B2 |
9978720 | Theuss et al. | May 2018 | B2 |
9997444 | Meyer et al. | Jun 2018 | B2 |
10014292 | Or-Bach et al. | Jul 2018 | B2 |
10037975 | Hsieh et al. | Jul 2018 | B2 |
10053359 | Bowles et al. | Aug 2018 | B2 |
10090284 | Chen et al. | Oct 2018 | B2 |
10109588 | Jeong et al. | Oct 2018 | B2 |
10128177 | Kamgaing et al. | Nov 2018 | B2 |
10134687 | Kim et al. | Nov 2018 | B1 |
10153219 | Jeon et al. | Dec 2018 | B2 |
10163803 | Chen et al. | Dec 2018 | B1 |
10170386 | Kang et al. | Jan 2019 | B2 |
10177083 | Kim et al. | Jan 2019 | B2 |
10211072 | Chen et al. | Feb 2019 | B2 |
10229827 | Chen et al. | Mar 2019 | B2 |
10256180 | Liu et al. | Apr 2019 | B2 |
10269773 | Yu et al. | Apr 2019 | B1 |
10297518 | Lin et al. | May 2019 | B2 |
10297586 | Or-Bach et al. | May 2019 | B2 |
10304765 | Chen et al. | May 2019 | B2 |
10347585 | Shin et al. | Jul 2019 | B2 |
10410971 | Rae et al. | Sep 2019 | B2 |
10424530 | Alur et al. | Sep 2019 | B1 |
10515912 | Lim et al. | Dec 2019 | B2 |
10522483 | Shuto | Dec 2019 | B2 |
10553515 | Chew | Feb 2020 | B2 |
10570257 | Sun et al. | Feb 2020 | B2 |
10658337 | Yu et al. | May 2020 | B2 |
10886232 | Chen et al. | Jan 2021 | B2 |
11264331 | Chen et al. | Mar 2022 | B2 |
11676832 | Leschkies et al. | Jun 2023 | B2 |
20010020548 | Burgess | Sep 2001 | A1 |
20010030059 | Sugaya et al. | Oct 2001 | A1 |
20020036054 | Nakatani et al. | Mar 2002 | A1 |
20020048715 | Walczynski | Apr 2002 | A1 |
20020070443 | Mu et al. | Jun 2002 | A1 |
20020074615 | Honda | Jun 2002 | A1 |
20020135058 | Asahi et al. | Sep 2002 | A1 |
20020158334 | Vu et al. | Oct 2002 | A1 |
20020170891 | Boyle et al. | Nov 2002 | A1 |
20030059976 | Nathan et al. | Mar 2003 | A1 |
20030221864 | Bergstedt et al. | Dec 2003 | A1 |
20030222330 | Sun et al. | Dec 2003 | A1 |
20040080040 | Dotta et al. | Apr 2004 | A1 |
20040118824 | Burgess | Jun 2004 | A1 |
20040134682 | En et al. | Jul 2004 | A1 |
20040248412 | Liu et al. | Dec 2004 | A1 |
20050012217 | Mori et al. | Jan 2005 | A1 |
20050070092 | Kirby | Mar 2005 | A1 |
20050170292 | Tsai et al. | Aug 2005 | A1 |
20060014532 | Seligmann et al. | Jan 2006 | A1 |
20060073234 | Williams | Apr 2006 | A1 |
20060128069 | Hsu | Jun 2006 | A1 |
20060145328 | Hsu | Jul 2006 | A1 |
20060160332 | Gu et al. | Jul 2006 | A1 |
20060270242 | Verhaverbeke et al. | Nov 2006 | A1 |
20060283716 | Hafezi et al. | Dec 2006 | A1 |
20070035033 | Ozguz et al. | Feb 2007 | A1 |
20070042563 | Wang et al. | Feb 2007 | A1 |
20070077865 | Dysard et al. | Apr 2007 | A1 |
20070111401 | Kataoka et al. | May 2007 | A1 |
20070130761 | Kang et al. | Jun 2007 | A1 |
20070290300 | Kawakami | Dec 2007 | A1 |
20080006945 | Lin et al. | Jan 2008 | A1 |
20080011852 | Gu et al. | Jan 2008 | A1 |
20080076256 | Kawai et al. | Mar 2008 | A1 |
20080090095 | Nagata et al. | Apr 2008 | A1 |
20080113283 | Ghoshal et al. | May 2008 | A1 |
20080119041 | Magera et al. | May 2008 | A1 |
20080173792 | Yang et al. | Jul 2008 | A1 |
20080173999 | Chung et al. | Jul 2008 | A1 |
20080296273 | Lei et al. | Dec 2008 | A1 |
20090084596 | Inoue et al. | Apr 2009 | A1 |
20090243065 | Sugino et al. | Oct 2009 | A1 |
20090250823 | Racz et al. | Oct 2009 | A1 |
20090278126 | Yang et al. | Nov 2009 | A1 |
20100013081 | Toh et al. | Jan 2010 | A1 |
20100062287 | Beresford et al. | Mar 2010 | A1 |
20100068837 | Kumar et al. | Mar 2010 | A1 |
20100078805 | Li et al. | Apr 2010 | A1 |
20100144101 | Chow et al. | Jun 2010 | A1 |
20100148305 | Yun | Jun 2010 | A1 |
20100160170 | Horimoto et al. | Jun 2010 | A1 |
20100248451 | Pirogovsky et al. | Sep 2010 | A1 |
20100264538 | Swinnen et al. | Oct 2010 | A1 |
20100301023 | Unrath et al. | Dec 2010 | A1 |
20100307798 | Izadian | Dec 2010 | A1 |
20110062594 | Maekawa et al. | Mar 2011 | A1 |
20110097432 | Yu et al. | Apr 2011 | A1 |
20110111300 | DelHagen et al. | May 2011 | A1 |
20110151663 | Chatterjee et al. | Jun 2011 | A1 |
20110204505 | Pagaila et al. | Aug 2011 | A1 |
20110259631 | Rumsby | Oct 2011 | A1 |
20110272191 | Li et al. | Nov 2011 | A1 |
20110291293 | Tuominen et al. | Dec 2011 | A1 |
20110304024 | Renna | Dec 2011 | A1 |
20110316147 | Shih et al. | Dec 2011 | A1 |
20120128891 | Takei et al. | May 2012 | A1 |
20120135608 | Shimoi et al. | May 2012 | A1 |
20120146209 | Hu et al. | Jun 2012 | A1 |
20120164827 | Rajagopalan et al. | Jun 2012 | A1 |
20120261805 | Sundaram et al. | Oct 2012 | A1 |
20130074332 | Suzuki | Mar 2013 | A1 |
20130105329 | Matejat et al. | May 2013 | A1 |
20130196501 | Sulfridge | Aug 2013 | A1 |
20130200528 | Lin et al. | Aug 2013 | A1 |
20130203190 | Reed et al. | Aug 2013 | A1 |
20130286615 | Inagaki et al. | Oct 2013 | A1 |
20130341738 | Reinmuth et al. | Dec 2013 | A1 |
20140054075 | Hu | Feb 2014 | A1 |
20140092519 | Yang | Apr 2014 | A1 |
20140094094 | Rizzuto et al. | Apr 2014 | A1 |
20140103499 | Andry et al. | Apr 2014 | A1 |
20140252655 | Tran et al. | Sep 2014 | A1 |
20140353019 | Arora et al. | Dec 2014 | A1 |
20150187691 | Vick | Jul 2015 | A1 |
20150228416 | Hurwitz et al. | Aug 2015 | A1 |
20150255344 | Ebefors et al. | Sep 2015 | A1 |
20150296610 | Daghighian et al. | Oct 2015 | A1 |
20150311093 | Li et al. | Oct 2015 | A1 |
20150359098 | Ock | Dec 2015 | A1 |
20150380356 | Chauhan et al. | Dec 2015 | A1 |
20160013135 | He et al. | Jan 2016 | A1 |
20160020163 | Shimizu et al. | Jan 2016 | A1 |
20160049371 | Lee et al. | Feb 2016 | A1 |
20160088729 | Kobuke et al. | Mar 2016 | A1 |
20160095203 | Min et al. | Mar 2016 | A1 |
20160118325 | Wang et al. | Apr 2016 | A1 |
20160118337 | Yoon et al. | Apr 2016 | A1 |
20160270242 | Kim et al. | Sep 2016 | A1 |
20160276325 | Nair et al. | Sep 2016 | A1 |
20160329299 | Lin et al. | Nov 2016 | A1 |
20160336296 | Jeong et al. | Nov 2016 | A1 |
20170047308 | Ho et al. | Feb 2017 | A1 |
20170064835 | Ishihara et al. | Mar 2017 | A1 |
20170207197 | Yu et al. | Jul 2017 | A1 |
20170223842 | Chujo et al. | Aug 2017 | A1 |
20170229432 | Lin et al. | Aug 2017 | A1 |
20170338254 | Reit et al. | Nov 2017 | A1 |
20180019197 | Boyapati et al. | Jan 2018 | A1 |
20180033779 | Park et al. | Feb 2018 | A1 |
20180047666 | Lin et al. | Feb 2018 | A1 |
20180116057 | Kajihara et al. | Apr 2018 | A1 |
20180182727 | Yu | Jun 2018 | A1 |
20180197831 | Kim et al. | Jul 2018 | A1 |
20180204802 | Lin et al. | Jul 2018 | A1 |
20180308792 | Raghunathan et al. | Oct 2018 | A1 |
20180352658 | Yang | Dec 2018 | A1 |
20180374696 | Chen et al. | Dec 2018 | A1 |
20180376589 | Harazono | Dec 2018 | A1 |
20190088603 | Marimuthu et al. | Mar 2019 | A1 |
20190131224 | Choi et al. | May 2019 | A1 |
20190131270 | Lee et al. | May 2019 | A1 |
20190131284 | Jeng et al. | May 2019 | A1 |
20190189561 | Rusli | Jun 2019 | A1 |
20190229046 | Tsai et al. | Jul 2019 | A1 |
20190237430 | England | Aug 2019 | A1 |
20190285981 | Cunningham et al. | Sep 2019 | A1 |
20190306988 | Grober et al. | Oct 2019 | A1 |
20190326224 | Aoki | Oct 2019 | A1 |
20190355675 | Lee et al. | Nov 2019 | A1 |
20190355680 | Chuang et al. | Nov 2019 | A1 |
20190369321 | Young et al. | Dec 2019 | A1 |
20200003936 | Fu et al. | Jan 2020 | A1 |
20200039002 | Sercel et al. | Feb 2020 | A1 |
20200130131 | Togawa et al. | Apr 2020 | A1 |
20200163218 | Mok | May 2020 | A1 |
20200357947 | Chen et al. | Nov 2020 | A1 |
20200358163 | See et al. | Nov 2020 | A1 |
20200395306 | Chen et al. | Dec 2020 | A1 |
20210005550 | Chavali et al. | Jan 2021 | A1 |
Number | Date | Country |
---|---|---|
2481616 | Jan 2013 | CA |
1646650 | Jul 2005 | CN |
1971894 | May 2007 | CN |
100463128 | Feb 2009 | CN |
100502040 | Jun 2009 | CN |
100524717 | Aug 2009 | CN |
100561696 | Nov 2009 | CN |
102024713 | Apr 2011 | CN |
102437110 | May 2012 | CN |
104637912 | May 2015 | CN |
105436718 | Mar 2016 | CN |
105575938 | May 2016 | CN |
106531647 | Mar 2017 | CN |
106653703 | May 2017 | CN |
107428544 | Dec 2017 | CN |
108028225 | May 2018 | CN |
109155246 | Jan 2019 | CN |
111492472 | Aug 2020 | CN |
0264134 | Apr 1988 | EP |
1536673 | Jun 2005 | EP |
1478021 | Jul 2008 | EP |
2023382 | Feb 2009 | EP |
1845762 | May 2011 | EP |
2942808 | Nov 2015 | EP |
H06152089 | May 1994 | JP |
2001244591 | Sep 2001 | JP |
2002208778 | Jul 2002 | JP |
2002246755 | Aug 2002 | JP |
2003188340 | Jul 2003 | JP |
2004311788 | Nov 2004 | JP |
2004335641 | Nov 2004 | JP |
2006032556 | Feb 2006 | JP |
2008066517 | Mar 2008 | JP |
4108285 | Jun 2008 | JP |
2009081423 | Apr 2009 | JP |
2010529664 | Aug 2010 | JP |
2012069926 | Apr 2012 | JP |
5004378 | Aug 2012 | JP |
5111342 | Jan 2013 | JP |
2013176835 | Sep 2013 | JP |
2013207006 | Oct 2013 | JP |
2013222889 | Oct 2013 | JP |
5693977 | Apr 2015 | JP |
5700241 | Apr 2015 | JP |
2015070007 | Apr 2015 | JP |
201692107 | May 2016 | JP |
5981232 | Aug 2016 | JP |
2016171118 | Sep 2016 | JP |
2017148920 | Aug 2017 | JP |
2017197708 | Nov 2017 | JP |
6394136 | Sep 2018 | JP |
2018195620 | Dec 2018 | JP |
2019009297 | Jan 2019 | JP |
2019512168 | May 2019 | JP |
6542616 | Jul 2019 | JP |
6626697 | Dec 2019 | JP |
20040096537 | Mar 2007 | KP |
20160038293 | Apr 2016 | KP |
100714196 | May 2007 | KR |
100731112 | Jun 2007 | KR |
10-2008-0037296 | Apr 2008 | KR |
2008052491 | Jun 2008 | KR |
20100097893 | Sep 2010 | KR |
101301507 | Sep 2013 | KR |
20140086375 | Jul 2014 | KR |
101494413 | Feb 2015 | KR |
20160013706 | Feb 2016 | KR |
20180113885 | Oct 2018 | KR |
101922884 | Nov 2018 | KR |
101975302 | Aug 2019 | KR |
102012443 | Aug 2019 | KR |
201042019 | Dec 2010 | TW |
201536130 | Sep 2015 | TW |
I594397 | Aug 2017 | TW |
201805400 | Feb 2018 | TW |
201943321 | Nov 2019 | TW |
201944533 | Nov 2019 | TW |
2011130300 | Oct 2011 | WO |
2013008415 | Jan 2013 | WO |
2013126927 | Aug 2013 | WO |
2014186538 | Nov 2014 | WO |
2015126438 | Aug 2015 | WO |
2016143797 | Sep 2016 | WO |
2017111957 | Jun 2017 | WO |
2018013122 | Jan 2018 | WO |
2018125184 | Jul 2018 | WO |
2019023213 | Jan 2019 | WO |
2019066988 | Apr 2019 | WO |
2019177742 | Sep 2019 | WO |
Entry |
---|
Allresist Gmbh—Strausberg et al: “Resist-Wiki: Adhesion promoter HMDS and diphenylsilanedio (AR 300-80)- . . . -ALLRESIST GmbH—Strausberg, Germany”, Apr. 12, 2019 (Apr. 12, 2019), XP055663206, Retrieved from the Internet: URL:https://web.archive.org/web/2019041220micals-adhesion-promoter-hmds-and-diphenyl2908/https://www.allresist.com/process-chemicals-adhesion-promoter-hmds-and-diphenylsilanedio/, [retrieved on Jan. 29, 2020]. |
Amit Kelkar, et al. “Novel Mold-free Fan-out Wafer Level Package using Silicon Wafer”, IMAPS 2016—49th International Symposium on Microelectronics—Pasadena, CA USA—Oct. 10-13, 2016, 5 pages. (IMAPS 2016—49th International Symposium on Microelectronics—Pasadena, CA USA—Oct. 10-13, 2016, 5 pages.). |
Arifur Rahman. “System-Level Performance Evaluation of Three-Dimensional Integrated Circuits”, vol. 8, No. 6, Dec. 2000. pp. 671-678. |
Baier, T. et al., Theoretical Approach to Estimate Laser Process Parameters for Drilling in Crystalline Silicon, Prog. Photovolt: Res. Appl. 18 (2010) 603-606, 5 pages. |
Chien-Wei Chien et al “Chip Embedded Wafer Level Packaging Technology for Stacked RF-SiP Application”,2007 IEEE, pp. 305-310. |
Chien-Wei Chien et al. “3D Chip Stack With Wafer Through Hole Technology”. 6 pages. |
Doany, F.E., et al.—“Laser release process to obtain freestanding multilayer metal-polyimide circuits,” IBM Journal of Research and Development, vol. 41, Issue 1/2, Jan./Mar. 1997, pp. 151-157. |
Dyer, P.E., et al.—“Nanosecond photoacoustic studies on ultraviolet laser ablation of organic polymers,” Applied Physics Letters, vol. 48, No. 6, Feb. 10, 1986, pp. 445-447. |
Han et al.—“Process Feasibility and Reliability Performance of Fine Pitch Si Bare Chip Embedded in Through Cavity of Substrate Core,” IEEE Trans. Components, Packaging and Manuf. Tech., vol. 5, No. 4, pp. 551-561, 2015. [Han et al. IEEE Trans. Components, Packaging and Manuf. Tech., vol. 5, No. 4, pp. 551-561, 2015.] |
Han et al.—“Through Cavity Core Device Embedded Substrate for Ultra-Fine-Pitch Si Bare Chips; (Fabrication feasibility and residual stress evaluation)”, ICEP-IAAC, 2015, pp. 174-179. [Han et al., ICEP-IAAC, 2015, pp. 174-179.] |
Han, Younggun, et al.—“Evaluation of Residual Stress and Warpage of Device Embedded Substrates with Piezo-Resistive Sensor Silicon Chips” technical paper, Jul. 31, 2015, pp. 81-94. |
International Search Report and the Written Opinion for International Application No. PCT/US2019/064280 dated Mar. 20, 2020, 12 pages. |
International Search Report and Written Opinion for Application No. PCT/US2020/026832 dated Jul. 23, 2020. |
Italian search report and written opinion for Application No. IT 201900006736 dated Mar. 2, 2020. |
Italian Search Report and Written Opinion for Application No. IT 201900006740 dated Mar. 4, 2020. |
Junghoon Yeom', et al. “Critical Aspect Ratio Dependence in Deep Reactive Ion Etching of Silicon”, 2003 IEEE. pp. 1631-1634. |
K. Sakuma et al. “3D Stacking Technology with Low-vol. Lead-Free Interconnections”, IBM T.J. Watson Research Center. 2007 IEEE, pp. 627-632. |
Kenji Takahashi et al. “Current Status of Research and Development for Three-Dimensional Chip Stack Technology”, Jpn. J. Appl. Phys. vol. 40 (2001) pp. 3032-3037, Part 1, No. 4B, Apr. 2001. 6 pages. |
Kim et al. “A Study on the Adhesion Properties of Reactive Sputtered Molybdenum Thin Films with Nitrogen Gas on Polyimide Substrate as a Cu Barrier Layer,” 2015, Journal of Nanoscience and Nanotechnology, vol. 15, No. 11, pp. 8743-8748, doi: 10.1166/jnn.2015.11493. |
Knickerbocker, J.U., et al.—“Development of next-generation system-on-package (SOP) technology based on silicon carriers with fine-pitch chip interconnection,” IBM Journal of Research and Development, vol. 49, Issue 4/5, Jul./Sep. 2005, pp. 725-753. |
Knickerbocker, John U., et al.—“3-D Silicon Integration and Silicon Packaging Technology Using Silicon Through-Vias,” IEEE Journal of Solid-State Circuits, vol. 41, No. 8, Aug. 2006, pp. 1718-1725. |
Knorz, A. et al., High Speed Laser Drilling: Parameter Evaluation and Characterisation, Presented at the 25th European PV Solar Energy Conference and Exhibition, Sep. 6-10, 2010, Valencia, Spain, 7 pages. |
L. Wang, et al. “High aspect ratio through-wafer interconnections for 3Dmicrosystems”, 2003 IEEE. pp. 634-637. |
Lee et al. “Effect of sputtering parameters on the adhesion force of copper/molybdenum metal on polymer substrate,” 2011, Current Applied Physics, vol. 11, pp. S12-S15, doi: 10.1016/j.cap.2011.06.019. |
Liu, C.Y. et al., Time Resolved Shadowgraph Images of Silicon during Laser Ablation: Shockwaves and Particle Generation, Journal of Physics: Conference Series 59 (2007) 338-342, 6 pages. |
Narayan, C., et al.—“Thin Film Transfer Process for Low Cost MCM's,” Proceedings of 1993 IEEE/CHMT International Electronic Manufacturing Technology Symposium, Oct. 4-6, 1993, pp. 373-380. |
NT Nguyen et al. “Through-Wafer Copper Electroplating for Three-Dimensional Interconnects”, Journal of Micromechanics and Microengineering. 12 (2002) 395-399. 2002 IOP. |
PCT International Search Report and Written Opinion dated Aug. 28, 2020, for International Application No. PCT/US2020/032245. |
PCT International Search Report and Written Opinion dated Sep. 15, 2020, for International Application No. PCT/US2020/035778. |
Ronald Hon et al. “Multi-Stack Flip Chip 3D Packaging with Copper Plated Through-Silicon Vertical Interconnection”, 2005 IEEE. pp. 384-389. |
S. W. Ricky Lee et al. “3D Stacked Flip Chip Packaging with Through Silicon Vias and Copper Plating or Conductive Adhesive Filling”, 2005 IEEE, pp. 798-801. |
Shen, Li-Cheng, et al.—“A Clamped Through Silicon Via (TSV) Interconnection for Stacked Chip Bonding Using Metal Cap on Pad and Metal col. Forming in Via,” Proceedings of 2008 Electronic Components and Technology Conference, pp. 544-549. |
Shi, Tailong, et al.—“First Demonstration of Panel Glass Fan-out (GFO) Packages for High I/O Density and High Frequency Multi-chip Integration,” Proceedings of 2017 IEEE 67th Electronic Components and Technology Conference, May 30-Jun. 2, 2017, pp. 41-46. |
Srinivasan, R., et al.—“Ultraviolet Laser Ablation of Organic Polymers,” Chemical Reviews, 1989, vol. 89, No. 6, pp. 1303-1316. |
Taiwan Office Action dated Oct. 27, 2020 for Application No. 108148588. |
Trusheim, D et al., Investigation of the Influence of Pulse Duration in Laser Processes for Solar Cells, Physics Procedia Dec. 2011, 278-285, 9 pages. |
Wu et al., Microelect. Eng., vol. 87 2010, pp. 505-509. |
Yu et al. “High Performance, High Density RDL for Advanced Packaging,” 2018 IEEE 68th Electronic Components and Technology Conference, pp. 587-593, DOI 10.1109/ETCC.2018.0009. |
Yu, Daquan—“Embedded Silicon Fan-out (eSiFO) Technology for Wafer-Level System Integration,” Advances in Embedded and Fan-Out Wafer-Level Packaging Technologies, First Edition, edited by Beth Keser and Steffen Kroehnert, published 2019 by John Wiley & Sons, Inc., pp. 169-184. |
PCT International Search Report and Written Opinion dated Feb. 17, 2021 for International Application No. PCT/US2020/057787. |
PCT International Search Report and Written Opinion dated Feb. 19, 2021, for International Application No. PCT/US2020/057788. |
U.S. Office Action dated May 13, 2021, in U.S. Appl. No. 16/870,843. |
Chen, Qiao—“Modeling, Design and Demonstration of Through-Package-Vias in Panel-Based Polycrystalline Silicon Interposers for High Performance, High Reliability and Low Cost,” a Dissertation presented to the Academic Faculty, Georgia Institute of Technology, May 2015, 168 pages. |
Annon, John Jr., et al.—“Fabrication and Testing of a TSV-Enabled Si Interposer with Cu- and Polymer-Based Multilevel Metallization,” IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 4, No. 1, Jan. 2014, pp. 153-157. |
Malta, D., et al.—“Fabrication of TSV-Based Silicon Interposers,” 3D Systems Integration Conference (3DIC), 2010 IEEE International, Nov. 16-18, 2010, 6 pages. |
Tecnisco, Ltd.—“Company Profile” presentation with product introduction, date unknown, 26 pages. |
Wang et al. “Study of Direct Cu Electrodeposition on Ultra-Thin Mo for Copper Interconnect”, State key lab of ASIC and system, School of microelectronics, Fudan University, Shanghai, China; 36 pages. |
International Search Report and Written Opinion dated Oct. 7, 2021 for Application No. PCT/US2021037375. |
PCT International Search Report and Written Opinion dated Oct. 19, 2021, for International Application No. PCT/US2021/038690. |
PCT International Search Report and Written Opinion dated Feb. 4, 2022, for International Application No. PCT/US2021/053830. |
PCT International Search Report and Written Opinion dated Feb. 4, 2022, for International Application No. PCT/US2021/053821. |
Taiwan Office Action dated Feb. 25, 2022, for Taiwan Patent Application No. 109119795. |
PCT International Search Report and Written Opinion dated Aug. 12, 2022 for International Application No. PCT/US2022/026652. |
Taiwan Office Action dated Sep. 22, 2022, for Taiwan Patent Application No. 111130159. |
Japanese Office Action dated Feb. 28, 2023, for Japanese Patent Application No. 2021-574255. |
PCT International Search Report and Written Opinion dated Nov. 4, 2022, for International Application No. PCT/US2022/036724. |
Taiwan Office Action dated Jan. 9, 2023, for Taiwan Patent Application No. 109140460. |
Japanese Office Action dated Jan. 31, 2023, for Japanese Patent Application No. 2021-566586. |
Korean Office Action dated Mar. 10, 2023, for Korean Patent Application No. 10-2021-7040360. |
Korean Office Action dated Mar. 10, 2023, for Korean Patent Application No. 10-2021-7040365. |
Japanese Office Action dated Feb. 7, 2023, for Japanese Patent Application No. 2021-566585. |
Taiwan Office Action issued to Application No. 10914056 dated Apr. 27, 2023. |
Korean Office Action issued to Patent Application No. 109140506 dated May 11, 2023. |
Japanese Office Action issued to Patent Application No. 2021-574255 dated Sep. 12, 2023. |
Japanese Office Action dated Aug. 29, 2023, for Japanese Patent Application No. 2022-529566. |
PCT International Search Report and Written Opinion dated Sep. 15, 2023, for International Application No. PCT/US2023/021345. |
Office Action for Korean Application No. 10-2022-7001325 dated Nov. 16, 2023. |
Taiwan Office Action dated Oct. 17, 2023, for Taiwan Patent Application No. 110138256. |
Number | Date | Country | |
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20220373883 A1 | Nov 2022 | US |
Number | Date | Country | |
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Parent | 16849393 | Apr 2020 | US |
Child | 17883422 | US |