Four current transistor temperature sensor and method

Information

  • Patent Grant
  • 6554469
  • Patent Number
    6,554,469
  • Date Filed
    Tuesday, April 17, 2001
    24 years ago
  • Date Issued
    Tuesday, April 29, 2003
    22 years ago
Abstract
A four current transistor temperature sensor comprises a p-n junction, preferably the base-emitter junction of a bipolar transistor, which is driven with four different currents in a predetermined sequence. Each of the four currents induces a respective base-emitter voltage, which is measured. The temperature of the transistor is calculated based on the values of the four driving currents and the four measured base-emitter voltages. The four driving currents (I1, I2, I3 and I4) are preferably arranged such that I1=2*I3, I2=2*I4, I1/I2=A and I3/I4=A, where A is a predetermined current ratio. I1 and I2 produce respective base-emitter voltages which are subtracted from each other to produce ΔVbe1, and I3 and I4 produce respective base-emitter voltages which are subtracted from each other to produce ΔVbe2. When so arranged, the difference between ΔVbe1 and ΔVbe2 is entirely due to the effect of series base and emitter resistances rb and re. Therefore, the ΔVbe1−ΔVbe2 value provides a correction factor which enables temperature measurement errors due to rb and re to be eliminated.
Description




BACKGROUND OF THE INVENTION




1. Field of the Invention




This invention relates to the field of transistor temperature sensors, and particularly to methods of reducing measurement errors due to intrinsic base and emitter resistances in such sensors.




2. Description of the Related Art




Numerous circuit devices, such as transistors, diodes and resistors, have operating characteristics that are temperature dependent. Because of their temperature dependencies, such devices are extensively used as temperature sensors. For example, germanium and silicon diodes can be operated at a constant forward-biased current, and the resulting forward-biased voltage measured to determine the temperature in accordance with the standard forward-biased diode equation:








V=kT/q


ln


I/I




s








where V is the forward-biased voltage, k is Boltzmann's constant, q is the electron charge, T is the absolute temperature in degrees Kelvin, I is the forward-biased current and I


s


is the diode's saturation current.




In practice, the measurement of temperature with a diode is subject to several inaccuracies. The precise voltage-temperature relationship depends upon the actual details of the junction, notably the doping densities on either side of the junction, the dopant profiles and the junction area, as well as secondary considerations such as bulk and surface defects in the material. These factors are difficult to quantify with certainty, and many of the parameters in the device equations (such as mobility) are themselves temperature-dependent. Other effects, such as conductivity modulation and series resistances, can also complicate the device's behavior.




Another approach employs two separate junctions which are fabricated on the same substrate, but which are operated at different current densities. This eliminates the effects of variations in doping levels and in the value of the bandgap voltage. The dual junction approach has been implemented with a pair of bipolar transistors whose emitter areas are in the ratio A. The difference in collector current densities gives rise to a difference in the base-emitter voltages for the two transistors. The relationship between the base-emitter voltage differential (ΔV


be


) and the device temperature is given by the expression:






Δ


V




be




=kT/q


ln


A








While this approach offers significant advantages over the single junction temperature measurement, it still has some limitations. There is a certain amount of tolerance in the transistor fabrication, which introduces an ambiguity into the emitter area ratio. Furthermore, the accuracy of the equation is reduced by ohmic resistances associated with the junction, specifically the base resistance r


b


and the emitter resistance r


e


. The base and emitter resistances may be considered to include both the intrinsic resistances inherent in the device, and the resistances associated with connecting lines. Calibration of such a sensor is required for most applications, and the fact that at least a pair of junctions are required introduces the possibility that differential strain across the substrate could result in poor tracking of junction voltages with a consequent error in the small ΔV


be


voltage.




Another technique is described in U.S. Pat. No. 5,195,827 to Audy et al. Here, a single bipolar transistor is sequentially driven with three different currents, inducing three base-emitter voltages which are measured and used to calculate temperature. This approach also has significant shortcomings, however. Using three currents requires that the ratios between the currents be kept small, in order to avoid heating up the sensing transistor and thereby introducing error into the temperature measurement. Also, the calculations necessitated by a three-current approach are likely to require non-integer math, which can be difficult and/or impractical to implement.




SUMMARY OF THE INVENTION




A four current transistor temperature sensor and method are presented which overcome the problems noted above. The invention allows the use of large current ratios and simple temperature calculations, while still reducing or eliminating intrinsic base and emitter resistance errors.




A p-n junction, preferably the base-emitter junction of a bipolar transistor, is driven with four different currents in a predetermined sequence. Each of the four currents induces a respective base-emitter voltage, which is measured. The temperature of the transistor is calculated based on the values of the four driving currents and the four measured base-emitter voltages.




In a preferred embodiment, the four driving currents (I


1


, I


2


, I


3


and I


4


) are arranged such that I


1


=n*I


3


, I


2


=n*I


4


, I


1


/I


2


=A and I


3


/I


4


=A, where A is a predetermined current ratio. In operation, I


1


and I


2


produce respective base-emitter voltages which are subtracted from each other to produce ΔV


be1


, and I


3


and I


4


produce respective base-emitter voltages which are subtracted from each other to produce ΔV


be2


. When so arranged, the difference between ΔV


be1


and ΔV


be2


is entirely due to the effect of series base and emitter resistances r


b


and r


e


. The ΔV


be1


−ΔV


be2


value thus provides a correction factor which enables temperature measurement errors due to r


b


and r


e


to be eliminated. This arrangement also allows the use of large currents ratios, and greatly simplifies the calculations required to determine temperature T.











BRIEF DESCRIPTION OF THE DRAWINGS





FIG. 1

is a schematic diagram illustrating the basic principles of a transistor temperature sensor per the present invention.





FIG. 2

is a schematic diagram of a preferred current source arrangement for the present invention.





FIG. 3

is a schematic diagram showing a preferred current source implementation for the present invention.





FIG. 4

is a block/schematic diagram illustrating a temperature measurement system which employs the present invention.











DETAILED DESCRIPTION OF THE INVENTION




A four current transistor temperature sensor per the present invention is shown in

FIG. 1. A

p-n junction


10


is employed as a temperature sensor. P-n junction


10


is preferably a bipolar transistor Q


s


, but other bipolar devices, such as a junction or Schottky diode, could also be used.




As indicated in

FIG. 1

, bipolar transistor Q


s


has an associated series base resistance r


b


and a series emitter resistance r


e


. These resistances may be due to the intrinsic properties of the p-n junction itself, as well as lead and connection resistances. As noted above, these resistances often degrade the accuracy of prior art temperature sensors which employ a p-n junction as a sensing element.




The present sensor is arranged to provide four different currents through p-n junction


10


, each of which induces a respective voltage across the junction. As shown in

FIG. 1

, a current source


12


is arranged to provide currents I


1


, I


2


, I


3


and I


4


to sensor transistor Q


s


in a predetermined sequence, which induces voltages V


be1


V


be2


, V


be3


and V


be4


, respectively, across the transistor's base-emitter junction.




Temperature can be determined by calculating the difference between the base-emitter voltages induced by two different currents. By measuring V


be1


with current I


1


applied to transistor Q


s


, and measuring V


be2


with current I


2


applied, the difference ΔV


be1


between V


be1


and V


be2


is given by:






Δ


V




be1


=(


kT/q


)*ln[(


I




1


/(1+(1/β)))/


I




s




]+I




1


*


r




e


+(


I




1


/β)*


r




b


−(


kT/q


)*ln[(


I




2


/(1+(1/β)))/


I




s




]−I




2


*


r




e


−(


I




2


/β)*


r




b


volts  (Eq. 1)






where k is Boltzmann's constant, q is the electron charge, T is the absolute temperature in degrees Kelvin, I


s


is the transistor's saturation current, and β is the transistor's gain. This simplifies to:






Δ


V




be1




=kT/q


ln(


I




1


/


I




2


)+(


I




1





I




2


)*(


r




e


+(


r




b


/β))  (Eq. 2)






Similarly, V


be3


and V


be4


are measured with currents I


3


and I


4


applied, respectively, with the difference ΔV


be2


between V


be3


and V


be4


given by:






Δ


V




be2




=kT/q


ln(


I




3


/


I




4


)+(


I




3





I




4


)*(


r




e


+(


r




b


/β))  (Eq. 3)






If r


b


, r


e


and β are known, either of equations 2 and 3 could be used to determine the temperature of transistor Q


s


. With each expression requiring the application of only two currents, the I


1


/I


2


or I


3


/I


4


ratios can be larger than would be permissible with a three-current scheme, and still not unacceptably heat the transistor. The larger current ratios provide a larger ΔV


be


, which tends to increase the accuracy of the measurement.




However, transistor parameters r


b


, r


e


and β can be difficult to ascertain, and may vary from transistor to transistor. These problems are overcome when the invention is arranged in accordance with the preferred embodiment shown in FIG.


2


. Here, the ratios between currents I


1


and I


2


, and between I


3


and I


4


, are equal to a common value “A”. In addition, currents I


1


and I


2


are made equal to n*I


3


and n*I


4


, respectively. When so arranged, the difference between ΔV


be1


and ΔV


be2


is entirely due to the effect of parasitic resistances r


b


and r


e


. This arrangement results in an expression for temperature T as follows:








T


=(


q*ΔV




be


)/[


k


*ln(


I




1


/


I




2


)]  (Eq. 4)






where ΔV


be


is given by:






Δ


V




be




=ΔV




be1


−[((


n


/(


n


−1))*(Δ


V




be1




−ΔV




be2


)],  (Eq. 5)






and






Δ


V




be




=ΔV




be2


−[(1/(


n


−1))*(Δ


V




be1




−ΔV




be2


)],  (Eq. 6)






in which ΔV


be1


=V


be1


−V


be2


and ΔV


be2


=V


be3


−V


be4


. Thus, when I


1


−I


4


have the relationships specified above, errors that would otherwise be present due to the series base and emitter resistances are eliminated.




The value of n is preferably 2. When n=2, the expressions for ΔV


be


are simplified as follows:






Δ


V




be




=ΔV




be1


−[2*(Δ


V




be1




−ΔV




be2


)],  (Eq. 7)






and






Δ


V




be




=V




be2


−(Δ


V




be1




−ΔV




be2


).  (Eq. 8)






Making n equal to two is preferred because, assuming the voltage measurements are converted to digital values, a multiplication by two is easily accomplished by calculating ΔV


be1−ΔV




be2


and performing a left-shift on the result.




A preferred embodiment of current source


12


is illustrated in FIG.


3


. Here, current source


12


comprises a current mirror having an input transistor Q


in


and two output transistors Q


out1


and Q


out2


; current ratio A is established by making the emitter area (A*X) of Q


out1


A times the emitter area of Q


out2


(X) A control signal CONTROL establishes the current in Q


in


. In operation, CONTROL is set to a first value, causing Q


out1


and Q


out2


to output currents I


1


and I


2


. A switch connects first I


1


, then I


2


, to junction


10


, and a voltage measuring means


20


measures the resulting base-emitter voltages V


be1


and V


be2


. The CONTROL signal is then changed such that the current in Q


in


is halved, which also halves the current in Q


out1


(I


3


) and Q


out2


(I


4


). These currents are connected to junction


10


in sequence, and V


be3


and V


be4


measured. With I


1


−I


2


and V


be1


−V


be4


known, ΔV


be1


and ΔV


be2


are calculated and provided to equation 7 or 8 to determine ΔV


be1


which is then used by equation 4 to produce T. Operation is the same if current source


12


is arranged such that n is a value other than two, except that equation 5 or 6 must be used to calculate ΔV


be


.




A system for determining and storing the value ΔV


be1


ΔV


be2


needed in equations 5 and 6 is shown in FIG.


4


. Voltage measuring means


20


is implemented with a signal conditioning circuit


22


and an analog-to-digital converter (ADC)


24


. Circuit


22


samples consecutive V


be


values (e.g., V


be1


and V


be2


, or V


be3


and V


be4


) and provides the differences (i.e., ΔV


be1


and ΔV


be2


) to ADC


24


, which converts the ΔV


be


values to digital form. The ADC output is provided to a processor


26


which includes a first register


28


, an offset register


30


, and a subtractor


32


.




When CONTROL is asserted (i.e., goes high), currents I


3


and I


4


are successively applied to junction


10


. This produces voltages V


be3


and V


be4


, and signal conditioning circuit


22


calculates V


be3


−V


be4


=ΔV


be2


, ADC


24


converts this to a digital value, which is stored in register


28


when the conversion is complete (as indicated by the ADC's generation of the “eoc” (end-of-convert) signal). CONTROL is then deasserted, the above sequence repeats for currents I


1


and I


2


, and a digital representation of ΔV


be1


appears at the output of the ADC. The output of register


28


(ΔV


be2


) is subtracted from the ADC output (ΔV


be1


) by subtractor


32


, with the result stored in offset register


30


. This value (ΔV


be2


−ΔV


be1


) can then be used in equation 5, 6, 7 or 8 to produce ΔV


be


, which is used in equation 4 to calculate T. Note that, if n=2, the ΔV


be1


−ΔV


be2


value stored in offset register


30


can be doubled by left-shifting the data one bit; this can be useful when using equation 7 to calculate ΔV


be


.




A controller (not shown) controls the system's operating sequence, by, for example, providing the CONTROL signal and controlling the switching between currents within current source


12


. The controller function may be handled by processor


26


, or may be a separate circuit block.




Signal conditioning circuit


22


might comprise, for example, a switched capacitor integrator which samples two base-emitter voltages (e.g., V


be1


and V


be2


) and integrates the difference to produce the ΔV


be


value (e.g., ΔV


be1


) provided to processor


26


.




Note that the implementation shown in FIG.


4


and discussed above is merely exemplary. Many other signal conditioning circuit designs might be employed, and other topologies could be used to determine ΔV


be1


−ΔV


be2


For example, rather than use a signal conditioning circuit to calculate the difference between base-emitter voltages, each base-emitter voltage might be converted to a digital value, and the digital values subtracted as necessary to determine ΔV


be1


and ΔV


be2


. However, use of an analog signal conditioning circuit to calculate ΔV


be1


and ΔV


be2


is preferred, as this approach allows the base-emitter voltages to be amplified to a level sufficient for the ADC to resolve, thereby obtaining a degree of measurement resolution that would be otherwise be difficult to achieve.




While particular embodiments of the invention have been shown and described, numerous variations and alternate embodiments will occur to those skilled in the art. Accordingly, it is intended that the invention be limited only in terms of the appended claims.



Claims
  • 1. A transistor temperature sensing system, comprising:a p-n junction, said p-n junction comprising the base-emitter junction of a bipolar transistor, at least one current source arranged to provide four different currents to said junction in a predetermined sequence, said junction and said at least one current source arranged such that each of said four currents induces a respective voltage across said junction, and a voltage measurement means connected to measure each of said induced junction voltages, wherein said four different currents are I1, I2, I3 and I4, respectively, and wherein I1=n*I3, I2=n*I4, I1/I2=A and I3/I4=A, where A is a predetermined current ratio.
  • 2. The temperature sensing system of claim 1, wherein said voltage measurement means produces voltage measurements Vbe1−Vbe2 and Vbe3−Vbe4 when currents I1, I2, I3 and I4 are provided to said transistor in sequence, further comprising a processor arranged to calculate the temperature T of said transistor in accordance with:T=(q*ΔVbe)/[k*ln(I1/I2)]where q is the electron charge, k is Boltzmann's constant, and ΔVbe=ΔVbe−[((n/(n−1))*(ΔVbe1−ΔVbe2)] andΔVbe=ΔVbe2−[((1/(n−1))*(ΔVbe1−ΔVbe2)], in which ΔVbe1=Vbe1−Vbe2 and ΔVbe2=Vbe3−Vbe4.
  • 3. The temperature sensing system of claim 2, wherein said voltage measurement means comprises:a signal conditioning circuit which receives Vbe1 and Vbe2 and produces ΔVbe1, and which receives Vbe3 and Vbe4 and produces ΔVbe2, and an analog-to-digital converter (ADC) having an input which receives ΔVbe1 and ΔVbe2 from said signal conditioning circuit, converts ΔVbe1 and ΔVbe2 to respective digital values, and provides said digital values to said processor.
  • 4. The temperature sensing system of claim 3, wherein said processor comprises at least two registers and a subtractor, said processor arranged to control said at least one current source to provide said four current values to said transistor, to receive said digital values from said ADC, and to calculate ΔVbe1−ΔVbe2, andΔVbe1−[((n/(n−1))*(ΔVbe1−ΔVbe2)] and/or ΔVbe2−[((1/(n−1))*(ΔVbe1−ΔVbe2)].
  • 5. A transistor temperature sensing system, comprising:a p-n junction, at least one current source arranged to provide four different currents to said junction in a predetermined sequence, said junction and said at least one current source arranged such that each of said four currents induces a respective voltage across said junction, and a voltage measurement means connected to measure each of said induced junction voltages, wherein said at least one current source comprises a current mirror having an input transistor and two output transistors, the outputs of said output transistors connected to provide two of said four different currents when said input transistor is driven with a first current and the other two of said four different currents when said input transistor is driven with a second current.
  • 6. A transistor temperature sensing system, comprising:a bipolar transistor, at least one current source arranged to provide currents I1, I2, I3 and I4 to said transistor in a predetermined sequence, wherein I1=2*I3, I2=2*I4, I1/I2=A and I3/I4=A, where A is a predetermined current ratio, said transistor and said at least one current source arranged such that each of I1, I2, I3 and I4 induces a respective voltage between said transistor's base and emitter, a voltage measurement means connected to produce voltage measurements Vbe1−Vbe2 and Vbe3−Vbe4 when currents I1, I2, I3 and I4 are provided to said transistor in sequence, and a processor arranged to calculate the temperature T of said transistor in accordance with: T=(q*ΔVbe)/[k*ln(I1/I2)]where q is the electron charge, k is Boltzmann's constant, and ΔVbe=ΔVbe1−[2*(ΔVbe1−ΔVbe2)] andVbe=ΔVbe2−(ΔVbe1−ΔVbe2), in which ΔVbe1=Vbe1−Vbe2 and ΔVbe2=Vbe3−Vbe4.
  • 7. The temperature sensing system of claim 6, wherein said voltage measurement means comprises:a signal conditioning circuit which receives Vbe1 and Vbe2 and produces ΔVbe1, and which receives Vbe3 and Vbe4 and produces ΔVbe2 and an analog-to-digital converter (ADC) having an input which receives ΔVbe1 and ΔVbe2 from said signal conditioning circuit, converts ΔVbe1 and ΔVbe2 to respective digital values, and provides said digital values to said processor.
  • 8. The temperature sensing system of claim 7, wherein said processor comprises first and second registers and a subtractor, said processor arranged to control said at least one current source to provide said four current values to said transistor, to receive said digital values from said ADC, and to calculate ΔVbe1−ΔVbe2, and ΔVbe1−[2*(ΔVbe1−ΔVbe2)] and/or ΔVbe2−(ΔVbe1−ΔVbe2).
  • 9. The temperature sensing system of claim 8, wherein said at least one current source comprises a current mirror having an input transistor and two output transistors, the outputs of said output transistors connected to provide two of said four different currents when said input transistor is driven with a first current and the other two of said four different currents when said input transistor is driven with a second current, said processor further arranged to control the current provided to said input transistor.
  • 10. A temperature sensing method, comprising:forcing currents I1, I2, I3 and I4 through a p-n junction in sequence, wherein II=n*I3, I2=n*I4, I1/I2=A and I3/I4=A, where A is a predetermined current ratio, such that I1, I2, I3 and I4 produce respective voltages V1, V2, V3 and V4 across said junction, measuring V1, V2, V3 and V4, determining the temperature T of said junction in: accordance with: T=(q*ΔVbe)/[k*ln(I1/I2)]where q is the electron charge, k is Boltzmann's constant, and ΔVbe=ΔVbe1−[((n/(n−1))*(ΔVbe1−ΔVbe2)] and ΔVbe=ΔVbe2−[((1/(n−1))*(ΔVbe1−ΔVbe2)], in which ΔVbe1=V1−V2 and ΔVbe2=V3−V4.
  • 11. The method of claim 10, wherein said p-n junction comprises a bipolar transistor and said currents I1, I2, I3 and I4 produce respective voltages V1, V2, V3 and V4 across said transistor's base-emitter junction.
  • 12. The method of claim 10, wherein n=2 andΔVbe=ΔVbe1−[2*(ΔVbe1−ΔVbe2)] and ΔVbe=ΔVbe2−(ΔVbe1ΔVbe2).
US Referenced Citations (5)
Number Name Date Kind
5195827 Audy et al. Mar 1993 A
5453682 Hinrichs et al. Sep 1995 A
5993060 Sakurai Nov 1999 A
6008685 Kunst Dec 1999 A
6332710 Aslan et al. Dec 2001 B1