GCIB smoothing of the contact level to improve PZT films

Information

  • Patent Application
  • 20080076191
  • Publication Number
    20080076191
  • Date Filed
    September 22, 2006
    18 years ago
  • Date Published
    March 27, 2008
    16 years ago
Abstract
A ferroelectric capacitor stack is formed over a metal-dielectric interconnect layer. After forming the interconnect layer, the surface of the interconnect layer is treated with gas cluster ion beam (GCIB) processing. Prior to this processing, the surface typically includes metal recesses. The GCIB processing smoothes these recesses and provides a more level surface on which to form the ferroelectric capacitor stack. When the ferroelectric capacitor stack is formed on this leveled surface, leakage is reduced and yields increased as compared to the case where GCIB processing is not used.
Description

BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 is a prior art schematic diagram illustrating an exemplary 1T/1C FeRAM memory cell;



FIG. 2 is a prior schematic diagram illustrating an exemplary 2T/2C FeRAM memory cell;



FIG. 3 is a fragmentary cross-sectional view of a prior art partially fabricated device containing FeRAM capacitors and other devices.



FIG. 4 is flow chart of an exemplary prior art method of forming the device of FIG. 3



FIG. 5 is a cross sectional view of a partially fabricated FeRAM device taken with a scanning electron microscope.



FIG. 6 is a top-down view of a partially fabricated FeRAM device taken with a scanning electron microscope.



FIG. 7 is an image of the contact layer of a partially fabricated semi-conductor device taken with an atomic force microscope.



FIG. 8 is an image of the contact layer of a partially fabricated semi-conductor device taken with an electron microscope.



FIG. 9 show electron microscope images of FeRAM capacitor stacks overlying the edge of a tungsten plug. The device on the left was fabricated without GCIB smoothing of the contact level. The device on the right was fabricated with GCIB smoothing of the contact level.





DETAILED DESCRIPTION


FIGS. 5 and 6 are cross-sectional and top-down SEM images of a fabricated FeRAM capacitor stack 300. The hard mask/diffusion barrier layer exhibits cracks 302. Hydrogen may diffuse through these cracks during back end processing leading to capacitor leakage and reduced yields.



FIGS. 7 and 8 are AFM and SEM images, respectively, showing recesses 402 in tungsten plugs 404 at the upper surface of dielectic layer 406 immediately prior to capacitor stack deposition. These recesses are typically from about 100 to about 200 Angstroms deep. The inventors have concluded that the cracks 302 illustrated in FIGS. 5 and 6 form during the via etch for plugs 136 as a result of the morphology of the recessed surface of the interconnect layer 115 translated through the capacitor stack 125 to the hard mask 130. Grain boundaries in the hard mask 130 and PZT roughness also contribute to crack formation.


The inventors have also concluded that recesses in the interconnect layer 115 contribute to problems with sidewall coverage of the capacitor stack 125 by the diffusion barrier 132. The recesses in the plugs 114 create an irregular side wall surface for the capacitor stacks 125. A diffusion barrier 132, such as an Al2O3 barrier for example, which is intended to protect the capacitor 125 from hydrogen during back end processing, has reduced functionality due to these irregularities.


One of the inventors' concepts is to reduce the tungsten recesses 402 by GCIB smoothing of the interconnect layer 115. FIG. 9 shows the height difference at the edge of a tungsten plug 114 before and after GCIB smoothing. The tungsten recesses 402 are substantially ameliorated by the GCIB processing. This smoothing reduces hard mask and sidewall barrier defects, which increases FeRAM manufacturing yield and reduces leakage in the resulting memory devices.


GCIB is a process in which a surface is bombarded with relatively large ion clusters, e.g., from about 5,000 to about 50,000 atoms each. The clusters are accelerated to from about 1 to about 30 keV. The resulting energy per atom is typically less than about 10 eV, preferably 1 eV or less. Due to the large cluster size and low velocity in comparison to other plasma etch processes, the clusters impart their energy within a shallow region of the surface and have a low scattering cross-section (large area of impact), which results in a smoothing of the surface.


An appropriate GCIB process for the inventors' purposes has a high removal rate for the dielectric 112 in comparison to the plug material 114 and any diffusion barrier 116. The process also preferably avoids increasing the resistance of the plugs 114, by avoiding oxidation of tungsten, for example. Further, the process also preferably minimizes roughening of the dielectric 112.


In GCIB processing, a beam is scanned over the surface. The extent of material removal depends on the scan rate, the beam chemistry, and the beam energy. One or more of these parameters can vary over the surface to vary the degree of material removal from point to point.


Another of the inventors' concepts is to vary a GCIB process condition in response to a surface condition as the beam is scanned. For example, it has been found that the depth of tungsten recesses often varies over the surface of a wafer. Accordingly, the beam energy can be increased near where the recessed are deeper in order to obtain the required degree of smoothing. Rather than altering the beam energy, the scan rate or the chemistry can be varied.


Where the plugs 114 are tungsten and the sleeve or liner 116 is TiN, appropriate beam chemistries can be, for example, Ar, Ar/O2, fluorine containing species such as CH2F2 , and CF4/Ar. If oxygen containing species are used, they are preferably used in small quantities to prevent oxidation of the tungsten. Preferred chemistries are Ar and CxFyHz, wherein x≧0, y≧1, and z≧0


In one embodiment, the surface of a wafer is uniformly scanned with a gas cluster ion beam. The surface is effectively smoothed due to the selectivity of the ion beam among the surface materials and due to the physical characteristics of the beam, which tends to smooth surfaces regardless of the compositions of the surface structures.


In another embodiment, the surface is mapped for a parameter such composition or average recess depth. Based on the map, the surface is scanned with varying beam intensity, the variation being in relation to the mapped parameter. Instead of a map, a surface parameter can be detected as the gas cluster ion beam is scanned and the intensity of the beam (or other GCIB process parameter) varied based on the detected parameter.


In a further embodiment, the surface is mapped for a parameter such as composition or average recess depth and the surface is scanned with gas cluster ion beams two or more times, each time with a different chemistry. During each scan, the beam intensity can be varied over the surface, the beam shut on and off, or the beam's movement rate varied in relation to the mapped parameter. In this manner, a different chemistry can be used to etch the sleeve 116 than is used to etch the dielectric 112. In another example, a first scan is used to level the surface and a second scan is used to smooth the field oxide. Again, rather than mapping the surface in advance, a surface condition can be detected as the scan is progressing.


GCIB smoothing reduces the average height difference between the plugs 114 and the dielectric 112. Typically, this height difference is initially at least about 100 Angstroms. Preferably, this difference reduced to less than about 50 Angstroms, more preferably to less than about 30 Angstroms, and still more preferable to less than about 15 Angstroms.


Additional smoothing may be desired after initial GCIB processing of the interconnect layer 115. GCIB is not generally used, as here, to remove large amounts of material. Removing large amounts of material may result in roughening of the surface of the dielectric 112 even as the overall contact layer is smoothed on a larger measurement scale. One approach, suggested above, is a second GCIB process scan with conditions tailored to smoothing the dielectric.


A further of the inventors' concepts is, following GCIB smoothing of the contact layer, to perform GCIB smoothing of another layer above the contact layer. In one embodiment, the bottom electrode layer 124 is smoothed by GCIB. In another embodiment, the PZT layer 126 is smoothed by GCIB. Chemistries for these additional GCIB processing steps can be, for example, Ar/O2, N2, or CF4/O2.


The invention as delineated by the following claims has been shown and/or described in terms of certain concepts, components, and features. A particular component or feature may have been disclosed herein with respect to only one of several concepts or examples, and may have been described both broadly and narrowly. Different components or features in their broad or narrow conceptions may be combined with other components or features in their broad or narrow conceptions where such combinations would be recognized as logical by one of ordinary skill in the art. Also, this one specification may describe more than one invention and the following claims do not necessarily encompass every concept, aspect, embodiment, or example described herein.

Claims
  • 1. A method of forming a FeRAM, comprising: forming a transistor on a semiconductor substrate;forming an interconnect layer over the transistor, the interconnect layer comprising an upper surface and a contact plug extending down to the underlying transistor;treating the upper surface of the interconnect layer and contact plug using a gas cluster ion beam;forming a bottom electrode layer, a ferroelectric dielectric layer, and a top electrode layer over the treated upper surface;forming a hard mask layer over top electrode layer;patterning the hard mask; andselectively etching the top electrode layer, the ferroelectric dielectric layer, and the bottom electrode layer to define a capacitor stack using the hard mask.
  • 2. The method of claim 1, further comprising forming a diffusion barrier layer over the upper surface after treatment with the gas cluster ion beam and before depositing the bottom electrode layer.
  • 3. The method of claim 1, wherein treating the upper surface with the gas cluster ion beam comprises scanning over the surface of the interconnect layer with at least one gas cluster ion beam parameter that varies over the surface in response to non-uniformities thereon.
  • 4. The method of claim 3, wherein the non-uniformities are variations in depth of plug recesses.
  • 5. The method of claim 1, wherein treating the upper surfaces substantially reduces a depth of a plug recess in the contact plug.
  • 6. The method of claim 5, wherein the recess resulted from a prior step of chemical-mechanical polishing.
  • 7. The method of claim 1, wherein the gas cluster ion beam comprises clusters of at least about 1,000 atoms.
  • 8. The method of claim 7, wherein the clusters consist essentially of atoms selected from the group consisting of Ar, O2, and CxFyHz, wherein x≧0, y≧1, and z≧0.
  • 9. The method of claim 1, wherein the energy of the gas cluster ion beam is less than about 10 eV per atom.
  • 10. The method of claim 1, further comprising GCIB smoothing of one of the layers above the interconnect layer using a treating thereof using the gas cluster ion beam.
  • 11. A process of forming a ferroelectric capacitor stack over an interconnect layer comprising a dielectic with conductive plugs extending therethrough, comprising: smoothing a surface of the interconnect layer using gas cluster ion beam processing; andforming the ferroelectric capacitor stack over the smoothed surface.
  • 12. The process of claim 11, wherein gas cluster ion beam processing comprises rastering a gas cluster ion beam over the surface of the interconnect layer with conditions that vary over the surface in response to non-uniformities in the surface.
  • 13. The process of claim 11, further comprising smoothing a layer of the ferroelectric capacitor stack using gas cluster ion beam processing.
  • 14. The process of claim 12, wherein the non-uniformities are variations in plug recess.
  • 15. The method of claim 14, wherein the smoothing substantially reduces the depths of plug recesses in the interconnect layer.
  • 16. The method of claim 15, wherein the smoothing reduces an average depth of the plug recesses from greater than about 100 Angstroms to less than about 50 Angstroms.
  • 17. The method of claim 15, wherein the recesses resulted from a prior step of chemical-mechanical polishing.
  • 18. The method of claim 11, wherein gas cluster ion beam processing comprises the use of ion clusters consisting essentially of atoms selected from the group consisting of Ar, O2, and CxFyHz, wherein x≧0, y≧1, and z≧0.
  • 19. The method of claim 11, wherein gas cluster ion beam processing comprises scanning the surface of the interconnect layer, with at least one GCIB process parameter varying over the surface in response to a variations in a surface condition.
  • 20. The method of claim 11, wherein gas cluster ion beam processing comprises scanning the surface of the interconnect layer in multiple steps, with at least one GCIB process parameter varied from one step to a next step.
  • 21. The method of claim 11, wherein a surface condition being smoothed is plug recess depth.