The present application herein incorporates the following by reference in their entirety: (1) U.S. patent application Ser. No. 09/879,664, entitled “Mask Correction for Photolithographic Processes”, filed Jun. 12, 2001; (2) N. Cobb and A. Zakhor, “Fast, Low-Complexity Mask Design,” in Proceedings of the SPIE Symposium on Optical Microlithography, Santa Clara, Calif., February 1995, vol. 2440, pp. 313–327; and (3) N. Cobb, “Fast Optical and Process Proximity Correction Algorithms for Integrated Circuit Manufacturing,” Ph.D. Thesis, Department of Electrical Engineering and Computer Sciences, University of California at Berkeley, May 1998.
The present invention generally relates to the field of integrated circuits, and particularly to a method and apparatus for making mask edge corrections using a gradient method.
With the advance of technology in integrated circuits (ICs), the minimum feature sizes of ICs have been shrinking for years. Commensurate with this size reduction, various process limitations have made IC fabrication more difficult. One area of fabrication technology in which such limitations have appeared is photolithography. Photolithography involves selectively exposing regions of a resist coated silicon wafer to a radiation pattern, and then developing the exposed resist in order to selectively protect regions of wafer layers (e.g., regions of substrate, polysilicon, or dielectric).
An integral component of a photolithographic apparatus is a “reticle” or “mask” which includes a pattern corresponding to features at one layer in an IC design. Such a mask may typically include a transparent glass plate covered with a patterned light blocking material such as chromium. The mask may be placed between a radiation source producing radiation of a pre-selected wavelength and a focusing lens which may form part of a “stepper” apparatus. Placed beneath the stepper may be a resist covered silicon wafer. When the radiation from the radiation source is directed onto the mask, light may pass through the glass (regions not having chromium patterns) and project onto the resist covered silicon wafer. In this manner, an image of the mask may be transferred to the resist. The resist (sometimes referred to as a “photoresist”) is provided as a thin layer of radiation-sensitive material that is spin-coated over the entire silicon wafer surface.
As light passes through the mask, the light may be refracted and scattered by the chromium edges. This may cause the projected image to exhibit some rounding and other optical distortion. While such effects pose relatively little difficulty in layouts with large feature sizes (e.g., layouts with critical dimensions above about 1 micron), the effects may not be ignored in layouts having features smaller than about 1 micron. The problems become especially pronounced in IC designs having feature sizes near the wavelength of light used in the photolithographic process. Optical distortions commonly encountered in photolithography may include rounded corners, reduced feature widths, fusion of dense features, shifting of line segment positions, and the like. Unfortunately, any distorted illumination pattern may propagate to a developed resist pattern and ultimately to IC features such as polysilicon gate regions, vias in dielectrics, and the like. As a result, the IC performance may be degraded or the IC may become unusable.
To remedy this problem, a mask correction technique known as optical proximity correction (“OPC”) has been developed. OPC may involve adding regions to and/or subtracting regions from a mask design at locations chosen to overcome the distorting effects of diffraction and scattering. Manual OPC has been in existence for many years. Using manual OPC, an engineer may need to add regions using trial and error techniques until the desired pattern on the wafer is obtained. While manual OPC has been effective, as the dimensions of critical features shrink, it has become apparent that the manual approach is not time/cost effective. Therefore, a systematic way is needed to enable fast processing of large, complex chips. Generally speaking, there are currently two automated approaches to OPC: (1) rule-based OPC (use geometric rules to add corrections); and (2) model-based OPC (use lithography simulations to decide corrections). Rule-based OPC is an extension of the methods used for manual OPC. Through experiment or simulation, the corrections that should be applied in a given geometrical situation may be discovered. Then, a pattern recognition system may be used to apply the corrections wherever that geometrical situation occurs throughout the entire layout design. While rule-based OPC is fast and can be applied to an entire layout, rule-based OPC is not as accurate as desired because rule-based OPC is not directly based on lithography simulation. Model-based OPC is different from rule-based OPC in that simulation models are used to compute the wafer results and modify edges on the mask to improve the simulated wafer results. Model-based OPC may be capable of more general corrections, but may require longer OPC time since simulation is typically time-intensive. The use of lithography simulation has been traditionally for analysis of aerial images and cutlines. The aerial image has long been used as a first order approximation to the final etched features produced by photolithography. Presently the role of lithography simulation has been broadened to include use of simulation within mask design synthesis tools.
A high density chip design is a chip design that has a distance of less than 0.8λ among input design boundaries, where λ is the wavelength of the light source. Model-based OPC of such a design often leads to a chip design with even higher density, because the movement of fragmentation regions of the edge (edge correction) may be essential (typically in the range of 0.3–0.4λ). The light intensity (or intensity) information alone may be not enough for the OPC of a high density chip design, since for such a design there is no single-value conformity between the edge corrector value change and the position of the process light intensity contour relative to the mask edge. The intensity value at a certain point may depend on the set of edge correctors at the influence region surrounding this point. Thus, the movement of all these correctors need be coordinated.
Therefore, it would be desirable to provide a method and apparatus for making mask edge corrections using a gradient method for high density chip designs.
Accordingly, the present invention is directed to a method and apparatus for making mask edge corrections using a gradient method for high density chip designs. In an exemplary aspect of the present invention, a method for making mask edge corrections may include the following steps: (a) providing parameter initial values and calibration values; (b) performing coherent field calculation; (c) performing process intensity calculation; and (d) calculating a cost function, the cost function being defined as
where Jini and Jouti are process intensity values at points Pini and Pouti, respectively, and Cout0≦C0≦Cin0, C0 being a cutline of a process intensity or aerial image contour, and Cout0 and Cin0 being some cutlines of the process intensity, which characterize an intensity gradient near the aerial image contour.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention as claimed. The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate an embodiment of the invention and together with the general description, serve to explain the principles of the invention.
The numerous advantages of the present invention may be better understood by those skilled in the art by reference to the accompanying figures in which:
Reference will now be made in detail to the presently preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings.
Referring first to
A coherent field calculation may be performed 104. For example, a coherent field may be calculated as:
is the transmission function of the optical system for coherent source;
def is defocus; λ is the wavelength; σ is the coherent degree; and
Fv(x,y)=∫∫dxmdymU(xm,ym)exp{−i2π(xmx+ymy)}
is Fourier transform of the mask missing function.
A process intensity calculation may be performed 106. For example, the process intensity calculation may be performed as:
where I0 is open frame intensity; and
J(xu,yu)
is the intensity distribution at the source surface.
Next, a cost function (or error function) calculation may be performed 108. The present invention introduces a new cost function for OPC purposes. There may exist two curves: one is the contour of the ideal image, which is equal to the input boundary, and the other is the real process intensity contour C0 (some cut line of intensity function). Some control points may be defined at a boundary edge Di, i=0, 1, 2 . . . (see, e.g.,
where Jini and Jouti are the process intensity values at the points Pini and Pouti, respectively and Cout0≦C0≦Cin0, C0 being a cutline of the process intensity or aerial image contour, Cout0 and Cin0 being some cutlines of process intensity, which characterize the intensity gradient near the aerial image contour.
Those of ordinary skill in the art will understand that the present cost function differs from the generally used cost function, which is the 2-norm between the process intensity value and the desired intensity value at a finite number of sample points along the boundary edge (see, e.g., N. Cobb and A. Zakhor, “Fast, Low-Complexity Mask Design,” in Proceedings of the SPIE Symposium on Optical Microlithography, Santa Clara, Calif., February 1995, vol. 2440, pp. 313–327). The generally used cost function may not reflect the difference between contours because the same intensity difference may have the small difference between contours (when the intensity gradient is large), or large difference between contours (when the intensity gradient is small). For example, as shown in
For minimizing a digital solution of the cost function Φ{right arrow over ((a))}, one may build the consistent approximation for parameters vector {right arrow over (a)}:
{right arrow over (a)}[l+1]={right arrow over (a)}[l]+λ[l]{right arrow over (v)}[l],=0,1,2, . . .
which may coincide to the solution {right arrow over (a)}0 when l comes to infinity. For a method of quickest lowering i- component of vector {right arrow over (ν)}[l] is the gradient component of function Φ({right arrow over (a)}). For the i-coordinate ai:
The gradient component (**) may be calculated in step 110 when the cost function for the new {right arrow over (a)}[l+1] decreases. Additionally, the step 110 may be performed simultaneously with the step 106 (the intensity calculation process), using the coherent field values obtained in the step 104 for different light source points.
From the equation (*), one may see that the i-th gradient component for l-stage of iteration process may be represented as follows:
where Jj={Jini or Joutj} is the process intensity value, corresponding to the j control point, and
is the first derivative of the process intensity Jj for the parameter component ai.
According to the present correction procedure, the regions of boundary edges are moved only normal to the initial edge position. In such a cases, as shown in
When the size of such a rectangles is smaller than the optical resolution limit
(λ is the wavelength of the light source, and NA is the numerical aperture of the projection lens used in projecting the reticle image onto the wafer), the present invention uses the following expression for the first derivative of intensity for the parameter vector component ai:
is the function of the coherent impulse response of the optical system;
is the field weight function for the parameter component ai;
When the length Li of the rectangle is greater than optical resolution limit
(i.e., too long edge fragment), this fragment may be divided into parts with a length less than
but with the same height ai. The number of such parts is
notes the whole part of the division. Thus, the formula for the intensity derivative may be rewritten as follows:
where
After the cost function gradient calculation is performed in the step 110, the step of the next iteration λ[l] may be calculated 112. One may choose the largest component of the cost function gradient imax as the distance between ideal edge position and the process intensity contour C0. This distance may be measured from the middle point at the imax edge fragment.
Then, new parameter values may be calculated 114, and the process 100 may then return to the step 104 and perform (l+1)-th iteration for the parameter component {right arrow over (a)}[l+1].
After the step 108, if the cost function for the new {right arrow over (a)}[l+1] decreases, the process may proceed to the step 110.
After the step 108, if the cost function for the new {right arrow over (a)}[l+1] increases, the step of iteration may be decreased (preferably the step λ[l] is divided by two) 116. Then, when the new step of iteration is not less than a minimum step of iteration, the process 100 may proceed to the step 114 and repeat the (l+1)-th iteration; and when the new step of iteration is less than the minimum step of iteration, parameter values for the minimum cost function may be set 118, and the process 100 may then proceed to step 120 in which the iteration process is stopped.
After the step 108, if the cost function does not change, the process 100 may directly proceed to the step 120 in which the iteration process is stopped.
It is understood that
It is to be noted that the above described embodiments according to the present invention on may be conveniently implemented using conventional general purpose digital computers programmed according to the teachings of the present specification, as will be apparent to those skilled in the computer art. Appropriate software coding may readily be prepared by skilled programmers based on the teachings of the present disclosure, as will be apparent to those skilled in the software art.
It is to be understood that the present invention may be conveniently implemented in forms of software package. Such a software package may be a computer program product which employs a storage medium including stored computer code which is used to program a computer to perform the disclosed function and process of the present invention. The storage medium may include, but is not limited to, any type of conventional floppy disks, optical disks, CD-ROMS, magneto-optical disks, ROMs, RAMs, EPROMs, EEPROMs, magnetic or optical cards, or any other suitable media for storing electronic instructions.
It is understood that the specific order or hierarchy of steps in the processes disclosed is an example of exemplary approaches. Based upon design preferences, it is understood that the specific order or hierarchy of steps in the processes may be rearranged while remaining within the scope of the present invention. The accompanying method claims present elements of the various steps in a sample order, and are not meant to be limited to the specific order or hierarchy presented.
It is believed that the present invention and many of its attendant advantages will be understood by the foregoing description. It is also believed that it will be apparent that various changes may be made in the form, construction and arrangement of the components thereof without departing from the scope and spirit of the invention or without sacrificing all of its material advantages. The form herein before described being merely an explanatory embodiment thereof, it is the intention of the following claims to encompass and include such changes.
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