Patent Grant
8866081
This application is related to U.S. Application Ser. No. 61/036,851, filed on Mar. 14, 2008, entitled “FARADAY CUP ARRAY INTEGRATED WITH A READOUT IC AND METHOD OF MANUFACTURE THEREOF”, the entire contents of which are incorporated herein by reference.
1. Field of the Invention
This invention is related to a charged particle detector and methods for fabricating and using the electron detector.
2. Description of the Related Art
In general, a Faraday cup is regarded as a simple detector of charged particle beams. A faraday cup typically includes an inner cup concentrically located within a grounded outer cup. Faraday cups are known for their large dynamic range and ability to function in a wide range of environments, including atmospheric pressure. Well designed and shielded Faraday cups have been reported to measure currents down to 10−15 A, corresponding to 104 charged particles per second. While electron multipliers are more sensitive, Faraday cup detectors provide quantitative charge measurements with high precision and stable performance. For instance, electron multipliers are susceptible to degradation over time due to sputtering of the electron conversion material, and the gain of these detectors can vary depending on the mass of the impending ions.
Faraday cup arrays designed for use in a mass spectrometer have been previously built which included an array of MOS capacitors formed on the interior of high aspect ratio deep etched trenches in n-type silicon. In those designs, the silicon between each cup served to electrically shield cups from their neighbors, enabling low signal cross-talk. Linear arrays of 64, 128 and 256 cups at pitches of 150 μm and 250 μm have been fabricated. The width spacing between the cups was typically limited to 50 μm. Detector arrays have been fabricated where for ion detection metal strip electrodes or MOS capacitors were used.
The following references all of which are incorporated in their entirety by reference describe this work and other background work.
In one embodiment of the invention, there is provided a detector array, including a substrate having a plurality of trenches formed therein, and a plurality of collectors electrically isolated from each other, formed on the walls of the trenches. The collectors are configured to collect charged particles incident on respective ones of the collectors and to output from the collectors signals indicative of charged particle collection. Adjacent ones of the plurality of trenches are disposed in a staggered configuration relative to one another.
In one embodiment of the invention, there is provided a method for making a detector array. The method forms in a substrate a plurality of trenches across a surface of the substrate such that adjacent ones of the trenches are in a staggered sequence relative to one another, forms in the plurality of trenches a plurality of collectors, and connects a plurality of electrodes respectively to the collectors.
In one embodiment of the invention, there is provided a system for collecting charged particles. The system includes a detector array configured to collect charged particles. The detector array includes a substrate having a plurality of collectors electrically isolated from each other, formed on the walls of trenches in the substrate, and configured to collect charge particles incident on respective ones of the collectors and to output from the collectors signals indicative of charged particle collection. In the detector array, adjacent ones of the plurality of trenches disposed in a staggered configuration relative to one another.
It is to be understood that both the foregoing general description of the invention and the following detailed description are exemplary, but are not restrictive of the invention.
A more complete appreciation of the invention and many of the attendant advantages thereof will be readily obtained as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings, wherein:
The invention is directed to the microfabrication of Faraday cup arrays for use as a charged particle or photon detection device. The detector device in one embodiment of the invention includes an array of microfabricated Faraday cups, where each microfabricated Faraday cup acts as an electrically shielded collector of charged particles (electrons or ions).
Referring now to the drawings, wherein like reference numerals designate identical or corresponding parts throughout the several views,
The trenches 26 can have widths ranging from 5 μm to 100 μm, and can have lengths up to 10 mm. The trenches 26 can have an aspect ratio ranging from 4:1 to 12:1. The collectors as a group can occupy more than 80%, 90%, or 95% of a surface of the substrate 22. The trenches 26 can form a set of position sensitive detectors. A substrate wall between the trenches can have a thickness less than 50 μm. As a result, the trenches 26 can form a set of high density position sensitive detectors. In one embodiment, as discussed in more detail below, the collectors 24 have an isolation resistance between adjacent ones of the collectors greater than 1×1010Ω. This is accomplished in one embodiment of the invention by the use of an underlying insulator under the collectors 24 (to be discussed in more detail below). The underlying insulator in turn permits the substrate for example to be a low resistivity material (such as Si at 1019 or 1020cm−3 dopant concentrations or higher) which forms a well defined ground plane for detector array 20.
The collectors 24 can be made of any conductive material including for example copper, aluminum, gold, platinum, and tungsten or combinations thereof. Besides the collectors,
For example, a suppressor grid can be used in various embodiments to prevent secondary emission from the cup. A suppressor grid is a metal trace that weaves between the Faraday cup collectors. A bias voltage can be applied to the suppressor grid (for example by readout circuitry 40) to prevent the escape of secondary electrons generated inside the cup. The suppressor grid can also serve as an energy filter for incoming charged particles. The metal layer 30 can also be used to generate a ground plane surrounding the interconnect lines 32. The ground plane reduces the crosstalk between adjacent interconnect lines.
The system 10 of
In those embodiments, the detector array 20 serves as a positional sensor regarding individual collector currents in time and in position. For example, in a magnetic sector field detector, ions emitted from an ion source can be directed in a direction transverse to the longitudinal axis of the elongated collectors 24 and can be introduced into a magnetic field sector. In the magnetic field sector, the ions will travel along trajectories in the magnetic field which depend on their charge/mass ratio. Lower charge to mass ions are curved the most and will arrive a position along the detector array which for example is closer to the charged particle source than a higher charge to mass ions. The higher charge to mass ions will be incident on and then collected on for example those collectors farther from the charged particle source. Similarly, in a detector in scanning or transmission electron microscope, the detector array also serves as a positional sensor regarding individual collector currents in time and in position. Electrons from the imaging optics are deflected according to their kinetic energy such that lower energy electrons will be more substantially deflected than higher energy electrons. Here, the lower energy electrons will be incident on and then collected on for example those collectors closest to the charged particle source. In optical dispersion devices, light will be diffracted at different angles depending on the wavelength. Lights of different wavelengths will be incident on different regions of the detector array 20. If an electron or charge emitting material on nearby or a part of the collectors, then the electrons or charge generated will be locally collected at nearby collectors.
Further, the readout circuitry 40 can collect and process the charge collection information or signals from individual ones of the collectors 24, not only in a time coordinate (as discussed above) but also in a spatial coordinate for position sensitive information, such as for example in the magnetic sector field detector described above where the respective positions of the individual collectors 24 would be representative of different masses. The readout circuitry 40 can be connected to a microprocessor, memory, and a digital I/O port capable of generating control voltages sufficient to communicate and activate the collectors 24 and the various metal layers on the substrate surface. Moreover, the readout circuitry 40 by way of the microprocessor connection may exchange information to those outside the system 10. The microprocessor (not shown in
The microprocessor can include at least one computer readable medium or memory, such as the controller memory, for holding instructions programmed according to the teachings of the invention and for containing data structures, tables, records, or other data that may be necessary to implement the invention. Examples of computer readable media are compact discs, hard disks, floppy disks, tape, magneto-optical disks, PROMs (EPROM, EEPROM, flash EPROM), DRAM, SRAM, SDRAM, or any other magnetic medium, compact discs (e.g., CD-ROM), or any other optical medium, punch cards, paper tape, or other physical medium with patterns of holes, a carrier wave, or any other medium from which a computer can read.
In one embodiment of the invention, the Faraday cup arrays are made of one-dimensional or elongated Faraday cups. A variety of cup geometries which can be fabricated ranging in width from 15 μm to 45 μm and having lengths up to 4 mm. Larger ranges can be made with the same process. A reasonable minimum width would be 5 μm although there are no substantial restrictions on the minimum width. Furthermore, the cup depth-to-width aspect ratios can exceed 8:1 using deep reactive ion etching technology. In some embodiments, thin silicon membranes between adjacent cups are less than 5 μm wide and 100 μm tall.
In one embodiment of the invention, the Faraday cup arrays are produced by a novel method which microfabricates fine-pitch linear or two dimensional arrays of the collectors 24.
In one embodiment of the invention, the fabrication of a functional cup array includes forming an interconnect by leaving a tab of copper extending from the cup onto the wafer surface and connecting to the pre-existing metal interconnect trace. The numbers for the described device and the described processes below used to make an exemplary Faraday cup array are provide here for an illustrative teaching and do not necessarily limit the invention.
In more detail, a 5000 Å thermal Si02 layer was formed on boron-doped p-type 100 mm <100> silicon wafers with low resistivity (<0.005 Ohm-cm). A metal trace for connecting between the to-be-formed Faraday cups and bond pads on the periphery of the die was fabricated using electron beam evaporation of Ti (500 Å) and Au (5000 Å) with a photoresist “lift-off” process to generate the interconnection trace pattern on the surface of the substrate.
In one embodiment of the invention, the metal traces which connect to perimeter bonding pads were first patterned because the feature sizes for routing a large number of cups require the use of standard spin-on photoresist. Standard spin-on photoresist procedures cannot be used after deep trenches are etched into the substrate. Afterwards, cup lithography was performed using a positive photoresist. The thermal SiO2 layer on the substrate was etched using reactive ion etching (RIE) prior to etching of the silicon trenches. A standard silicon deep reactive ion etch (DRIE) process using for example an inductively coupled plasma reactor forms trenches of aspect ratios (D/W) from 1:1 to 30:1. Trenches in the range of 4:1 to 12:1 are prototypical of the invention.
Next, a conformal insulator (e.g. parylene) was vapor deposited to a target thickness. Two separate insulator thicknesses (5800 Å and 10,900 Å) of parylene have been demonstrated as suitable for the invention. Parylene-C (PA-C) was chosen for the cup insulator because it is known to make very conformal, uniformly thick and pin-hole free films even in high aspect ratio features. The cup insulator could also be fabricated by chemical vapor deposition of tetraethylorthosilicate (TEOS) which leads to conformal films of silicon dioxide. Following deposition of the conformal insulator, the conformal insulator was patterned to expose the metal interconnection layer.
A laminate dry film photoresist designed for advanced electronic packaging applications (e.g., Dupont MX5000 series) was used to pattern vias in the conformal insulator. The laminate dry film photoresist “tents” or “spans” across the deep etched Faraday cup trenches and does not damage the thin high aspect-ratio silicon membrane that exists between the trenches. An adhesion promotion layer (e.g., a sputtered Ti (500 Å)/Cu (1000 Å) layer) was applied before the laminate in order to increase the adhesion of the laminate dry film to the substrate.
Deposition of a metal such as copper formed the cup metal and electrically connected the Faraday cup to the metal interconnection trace. In order to ensure good contact to the underlying Au trace, a seed layer (e.g. a Ti (500 Å)/Cu (1000 Å) seed layer) was sputtered or otherwise deposited on the substrate following an argon back-sputter process to clean the Au pad. Next, a conformal layer of copper (e.g, 4000 Å Cu layer) was deposited by metal organic chemical vapor deposition (MOCVD) using for example hexafluoroacetylacetonate copper(I) trimethylvinylsilane, Cu(HFAC)(TMVS) as a Cu precursor at 200° C. and 1 Torr. Cu(HFAC)(TMVS) as a Cu precursor is commercially sold by CupraSelect™, Air Products and Chemicals, Inc.
Argon ion milling can be performed for example at a 30° angle to remove the surface copper without damaging the copper in the cups. Other angles of incidence and inert gas ions are suitable for the invention. The small “tented” block of dry laminate film resist protects the portion of the copper that makes contact to the Au underlying pad during the ion milling. Because the minimum feature size for the dry film photoresist (typically 15 μm lines and spaces) is larger than the desired array pitch, the size of the copper connection tabs can limit the array spacing and therefore the fill factor. This limitation was overcome by arranging the cups in a staggered pattern as illustrated in
Accordingly, Faraday cup arrays were fabricated with cup widths ranging from 15 to 45 μm, cup lengths from 1 to 4 mm, and cup-to-cup spacings from 5 to 25 μm.
In addition to the geometrical variations, as discussed above, the trace metal layer in one embodiment of the invention forms integrated ground planes and/or suppressor grids on some of the devices. A ground plane serves to reduce the cup-to-cup capacitance of the traces. A suppressor grid is a metal trace which weaves between the Faraday cups. A bias voltage can be applied to the suppressor grid to prevent the escape of secondary electrons generated inside the cup and can also serve as an energy filter for incoming charged particles. Suppressor grid lines 20 μm in width are visible between the cups in
While not limited to a specific theory, the microfabricated Faraday cup arrays of the invention are measured and modeled as described hereinafter to provide a better understanding of how various embodiments of the invention function and how feature size impacts such function. The microfabricated Faraday cup arrays were characterized with a combination of theoretical analysis and measurement. For the theoretical analysis a circuit model was implemented in LTspice/SwitcherCAD III v2.18 (Linear Technology Corporation). A three-cup circuit model was created with the cups modeled as simple capacitors with a parallel resistance to account for the cup-to-ground leakage. The model also includes cup-to-cup resistance and capacitance to enable an estimation of cross-talk between adjacent cups. A current source was used to simulate ion current. The cup-to-ground capacitance value was modeled as
where κ is the dielectric constant, L, w, and d are the cup length, width, and depth, respectively, and t is the dielectric thickness. The dielectric constant (κ) for parylene is 3.10 at 1 kHz. The cup-to-cup capacitance was modeled using the following equation for a two-wire line:
where t is the copper thickness and x is the distance between cups. The bodies of the cups are shielded from each other by the grounded low-resistivity silicon. Therefore, top exposed edges of copper are the main contributors to the cup-to-cup capacitance. The device design allows the creation of a ground plane between the traces to minimize the impact of the routing traces on the cup-to-cup capacitance. Traces are the metal lines that connect the cups to bond pads on the die periphery. In the device layout, adjacent cups are routed on different sides of the die. Therefore, the cross-talk due to the routing traces is not seen between adjacent cups, but between cups that are two positions apart.
The cup-to-ground capacitance values were measured with a 4285 precision LCR meter (Agilent Technologies Inc.) with a 1V, 1 kHz signal using metal probe tips to contact the bond pads. For cup-to-ground measurements, a low resistance contact was made to the substrate using colloidal silver. Parallel resistance (Rp) values were above the 100 MΩ measurable limit while the dissipation factor was typically below 0.03. The measured capacitance values versus cup area are shown in
Leakage resistance was measured with a S4200 Parametric Test System (Keithley Instruments Inc.) configured with a pre-amplifier for low-current measurement capability. Current was measured in response to a voltage sweep of 1-5V. Measured cup-to-ground resistance values ranged from 3×1011 to 3×1012 Ω which corresponds to an average resistivity for the parylene of approximately 5×1013 Ω-cm. Measured values for cup-to-cup resistance values ranged from 1×1012 to 3×1012Ω but actual values may be higher as these numbers are approaching the limits of the measurement capability.
The charge collection performance of the cups was simulated with the Spice model. For these simulations, the cup-to-cup spacing and resistances were held constant at 15 μm and 5×1012 Ω, respectively. The geometry dependent cup-to-ground leakage resistors (R1, R2, and R3) were calculated using the measured parylene resistivity. Theoretical values were used for all capacitances based on the cup geometry using the previously described capacitance models.
Thus, it can be understood that the invention in one embodiment provides a method for making a novel detector array.
At 810, the trenches can be formed by DRIE of silicon. The trenches can have widths ranging from 5 μm to 100 μm and lengths up to 10 mm. Accordingly, the trenches can have an aspect ratio ranging from 4:1 to 12:1. The trenches can occupy more than 80%, 90%, or 95% of a surface of the substrate. At least two of the trenches can be separated by a wall having a thickness less than 50 μm, or less than 10 μm or less than 5 μm in various embodiments of the invention. At least two of the trenches can have a pitch separation of less than 100 μm, or less than 50 μm or less than 10 μm in various embodiments of the invention.
At 820, the collectors can be formed on an aluminum metal, a copper metal, and/or a metal silicide. At 830, a trace metal layer can be patterned on the substrate between and around the plurality of collectors. The metal layer can function as a ground reference and/or a suppression grid for the detector array. Further, an interconnect can be formed connecting the metal layer respectively to the plurality of collectors, and a readout circuit can be connected to the metal layer for reading signals from respective ones of the plurality of collectors.
Faraday cups or similar detectors have also been used prior to the invention as detectors in traditional magnetic sector mass analyzers. The Faraday cup serves as a single point ion detector and the magnetic field is scanned to collect particles of different mass. A detector arrays allows for simultaneous collection of all masses, leading to a more efficient detector. In one embodiment of the invention, the denser spacing of Faraday cups in the array as compared to previous arrays provides improved accuracy and efficiency for example in ion detector arrays in spectrometers, including spectrometers for isotope abundance measurements.
Faraday cups or similar collectors have also been used prior to the invention as chemical sensors working close to atmospheric pressure and detecting chemical agents based on ion mobility and differential ion mobility detectors. U.S. Pat. No. 6,809,313 (whose contents are incorporated herein by reference) describes the use of metal strip electrodes, not true Faraday cups, for chemical sensors. In one embodiment of the invention, the denser spacing of Faraday cups in the arrays of the invention as compared to previous Faraday cup arrays provides for improved accuracy and efficiency for use in chemical sensors and in ion mobility and differential ion mobility detectors.
Accordingly, in one embodiment of the invention, there is provided a system for charged particle detection. The system includes a detector array configured to collect charged particles. The detector array includes (as discussed in detail above) a substrate including a plurality of trenches formed therein, a plurality of collectors electrically isolated from each other. The collectors formed on the walls of the trenches are configured to collect charge particles incident on respective ones of the collectors. Adjacent ones of the plurality of trenches are disposed in a staggered configuration relative to one another, although in other embodiments the staggered configuration is optional, and the elongated trenches may be aligned or arbitrarily positioned. The system can include a charged particle source (e.g., an ion source or an electron source) for the generation of charged particles.
In one embodiment, the charge particle source can be an electron source 102 or ion source 104 fabricated on a silicon substrate and utilizing for example a carbon nanotube field emission electron source including as shown in
The generation of gas phase ions by electron impact is a common technique in the fields of mass spectrometry and vacuum science. In mass spectrometry, electron-impact sources ionize gas phase analytes prior to mass separation and ion detection. In vacuum science, ion vacuum gauges, residual gas analyzers, and He leak detectors all operate using electron-impact ionization. Thermionic cathodes are reliable and effective for many applications; however, the power consumption associated with heating these cathodes is a major limitation in developing miniature field-portable ion sources. In many emerging applications such as field-portable mass spectrometers; the power required to heat the thermionic electron source could exceed the combined power requirements of all other system components. Therefore, field emission cold cathodes which nominally operate at room temperature are attractive for some electron-impact applications. Workers have evaluated a number of cold cathode materials including for example diamond-coated silicon whiskers for application in an ion trap mass spectrometer, carbon nanotubes (CNTs) and molybdenum tips as an electron source in vacuum ion gauges, and integrated field emitters for electron-impact ionization inside field emission displays. Additional benefits of field emission sources are the fast turn on and the ability to run in a pulsed mode. Thermionic technology does not readily scale down to microdevices, while field emission devices are naturally microscale and have the potential to generate larger emitted current densities.
One illustrative fabrication process by which the ion source of
As described therein, polycrystalline silicon structures that form the device electrodes were initially formed parallel with the substrate surface and embedded in highly doped silicon dioxide. A MEMS foundry such as for example MEMSCAP Inc., Durham, N.C. was used for fabrication of the ion source. After the MEMS fabrication, the sacrificial silicon dioxide was etched in hydrofluoric acid to release the electrode panels. The catalyst for CNT growth, in this example 50 of iron, was selectively evaporated onto the cathode using an integrated shadow mask. The CNTs were grown using microwave plasma chemical vapor deposition with ammonia/methane gas chemistry. Electron microscopy revealed multi-walled CNTs with an average diameter of approximately 30 nm. The CNT length was controlled by varying the growth time. After CNT deposition, the panels were manually rotated and locked in place normal to the substrate using a tongue-in-groove MEMS technique. The device was mounted and wire bonded to a ceramic board for testing. The specific device characterized here has a cathode-to-grid spacing of 50 μm before CNT deposition, a cathode-to-grid spacing of 30 μm after CNT deposition, and a grid-to-collector spacing of 280 μm. The cathode produced was a 70×70 μm2 panel and the grid produced was a 3×3 array of 20×20 μm2 apertures, with a 2.5 μm grid wire. With this configuration, the electric fields required to generate 1 nA and 1 μA of electron current were 5 and 6 V/μm, respectively. These devices were routinely capable of generating field emitted electron current in excess of 50 μA.
A better understanding of the configuration, the fabrication, and the testing results for the triode ion source described above will be had with reference to the following more detailed discussion.
Carbon nanotubes 114 can then be formed on for example the cathode electrode 144 shown in
During ionization testing of the triode of
These results show the viability of this on-chip ion source as an ion source for a system utilizing the Faraday cup arrays of the invention.
A plurality of collectors (not explicitly shown in this depiction) are disposed in the trenches 204. The collectors as in the other embodiments can collect charged particles incident on respective ones of the collectors and to output from the collectors signals indicative of charged particle collection. As shown in
The ion source by way of grids 208 can direct ions across the detector array 200. For example, a magnetic field sector (not shown as the magnetic field lines permeate the structure shown in
Ion source 206 can include an electrode (e.g., a cathode) including a carbon nanotube as shown in
Numerous modifications and variations of the invention are possible in light of the above teachings. It is therefore to be understood that within the scope of the appended claims, the invention may be practiced otherwise than as specifically described herein.
The U.S. Government has a paid-up license in this invention and the right in limited circumstances to require the patent owner to license others on reasonable terms as provided for by terms of Contract NNL-04-AA21A from NASA.
| Filing Document | Filing Date | Country | Kind | 371c Date |
|---|---|---|---|---|
| PCT/US2009/034952 | 2/24/2009 | WO | 00 | 9/8/2010 |
| Publishing Document | Publishing Date | Country | Kind |
|---|---|---|---|
| WO2009/148642 | 12/10/2009 | WO | A |
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| Number | Date | Country | |
|---|---|---|---|
| 20110006204 A1 | Jan 2011 | US |
| Number | Date | Country | |
|---|---|---|---|
| 61036844 | Mar 2008 | US |
