The present invention relates to a high-frequency power supply circuit used in a high-frequency power supply apparatus or the like for supplying high-frequency power to a plasma generator or the like.
In conventional practice, high-frequency power supply circuits used in high-frequency power supply apparatuses or the like for supplying high-frequency power to plasma generators or the like use linear amplifiers connected in multiple stages so that minute vibrations in internal liquid crystal oscillators are amplified to the final output. Such amplifiers use an amplification scheme known as linear amplification, which is an amplification scheme having a comparatively low efficiency of about 50%.
However, as semiconductor wafers and display panels or the like having transistors incorporated therein have both increased in size, plasma treatment apparatuses have also increased in size, and greater outputs have been required for the power sources for the plasma. In conventional low-efficiency amplifiers, the volume and lost power increase dramatically with increased output, and commercial demand has therefore not been satisfied. High-frequency power sources that use an amplification scheme known as switching-mode amplification and provided with higher efficiency (80% or more) than in the prior art have recently been put into use.
However, since switching-mode amplification involves the application of PWM techniques, it is believed that the output power of the high-frequency power source is controlled by controlling the pulse width (duty). In conventional practice, however, methods implemented using thyristor-based firing control are used to control the pulse width (duty) as shown in
The present invention was devised in view of such problems, and an object thereof is to provide a high-frequency power supply circuit in which a simple configuration can be used to regulate and control output power with high precision over time in switching-mode amplification for outputting such high frequencies.
In order to solve the problems described above, the high-frequency power supply circuit according to a first aspect of the present invention is characterized in comprising:
a basic drive square wave generation circuit unit for generating a basic drive square wave having an output frequency outputted from a high-frequency power supply circuit; a differentiation signal generation circuit unit for generating a front edge or rear edge differential signal of the generated basic drive square wave; a vibrator circuit unit having a square wave signal generator for outputting a square wave signal having a signal width within a time period corresponding to a half cycle of the output frequency upon input of a trigger signal from an external source, and signal width control circuits for variably controlling the signal width of the square wave signal on the basis of a control signal for controlling power output based on the output frequency; and a switching amplification circuit unit for amplifying an amplification source signal based on an output signal from the vibrator circuit unit; the differential signal being generated by the differential signal generation circuit unit is used as a trigger signal in the vibrator circuit unit.
According to this aspect, in the vibrator circuit unit, the input of the differential signal is used as a trigger for the amplification source signal, a square wave signal is generated having a signal width shorter than a half cycle of the output frequency having an output time period based on the control signal, and the amplification source signal is amplified in the switching amplification circuit unit. Therefore, even if the output frequency is high, the signal width of the amplification source signal can be varied according to the control signal with a simple configuration, and, consequently, the regulation of the output power from the high-frequency power supply circuit amplified by the switching amplification circuit can be controlled precisely over time with a simple configuration.
The high-frequency power supply circuit according to a second aspect of the present invention is the high-frequency power supply circuit according to the first aspect, characterized in that:
the square wave signal generator comprises a first reversing unit for initiating reverse output of an input signal upon the input of the differential signal; and the signal width control circuit has a second reversing unit for reversing the output signal from the first reversing unit and inputting the reversed signal to the first reversing unit, and a time constant circuit unit whereby the output signal outputted from the second reversing unit is blocked from being inputted to the first reversing unit within a time period determined by a time constant that varies according to the control signal.
According to this aspect, the signal width control circuit can be configured in a simple configuration by using the monostable vibrator based on a DC-AC link as the vibrator circuit unit. Therefore, there is a greater degree of freedom in the circuit design, and a vibrator circuit unit having satisfactory precision with a simple configuration can be obtained.
The high-frequency power supply circuit according to a third aspect of the present invention is the high-frequency power supply circuit according to the second aspect, characterized in that:
the first reversing unit is formed from a multi-input transformation logic gate circuit.
According to this aspect, the first reversing unit 10 is formed using, e.g., a NAND gate or another such multi-input transformation logic gate circuit that can operate at higher speeds than a common MSI multivibrator, whereby a square wave signal of a shorter signal width can be generated, and the range of controllable output power can be further increased.
The high-frequency power supply circuit according to a fourth aspect of the present invention is the high-frequency power supply circuit according to any of the first through third aspects, characterized in that:
the square wave signal generator outputs a square wave signal having a signal width of at least half or less of one cycle time during the signal propagation delay times of at least two logic gates or fewer in one cycle time of the output frequency.
According to this aspect, since the signal width can be varied with each cycle of output frequency, the output power within the same cycle can be controlled with maximum precision over time.
The high-frequency power supply circuit according to a fifth aspect is the high-frequency power supply circuit according to any of the first through fourth aspects, characterized in comprising:
a logic gate circuit for receiving input of the basic drive square wave and an output signal from the vibrator circuit unit, and extracting the inputted basic drive square wave according to the inputted output signal from the vibrator circuit unit; wherein the switching amplification circuit unit amplifies the output signal from the logic gate circuit as the amplification source signal.
According to this aspect, the signal width of an amplification source signal can be prevented from reversing, and disturbance can be prevented from being caused by the reversing of the signal width (reversed duty).
The high-frequency power supply circuit according to a sixth aspect of the present invention is the high-frequency power supply circuit according to the fifth aspect; characterized in comprising:
a delay circuit for delaying the basic drive square wave inputted to the logic gate circuit within the signal propagation delay time period in the vibrator circuit unit.
According to this aspect, it is possible to avoid drawbacks in which the signal width of the amplification source signal extracted by the logic gate circuit becomes shorter in proportion to the signal propagation delay time.
The high-frequency power supply circuit according to a seventh aspect is the high-frequency power supply circuit according to any of the first through sixth aspects, characterized in that:
the time constant circuit unit has, as a time constant control element, a field-effect transistor (FET), a Cds element, a variable-capacitance diode, or a combination thereof.
According to this aspect, the time constant does not readily fluctuate in large amounts over time, and stable and continuous control can therefore be achieved using the control signal inputted to the time constant circuit unit.
The high-frequency power supply circuit according to an eighth aspect is the high-frequency power supply circuit according to any of the first through seventh aspects, characterized in that:
the basic drive square wave generation circuit has a double-frequency generation circuit for generating a double frequency of the basic drive square wave; and the double frequency generated by the double-frequency generation circuit is used to generate a basic drive square wave having a duty ratio of approximately 50%.
According to this aspect, a basic drive square wave having a duty ratio of about 50% can be generated with a high degree of precision.
a) through (e) are flowcharts showing the timing of various signals in the high-frequency power supply circuit in the embodiment in
Embodiments of the present invention are described hereinbelow.
To describe the embodiments of the present invention with reference to the drawings, first,
The high-frequency power supply circuit of the present embodiment is configured from a basic drive square wave generation circuit unit 5 for generating a basic drive square wave, which is a square wave having a duty ratio of about 50% and having the same frequency as the output frequency outputted from the high-frequency power supply circuit; a differentiation circuit unit 9 for generating a front-edge differential signal of the basic drive square wave generated by the basic drive square wave generation circuit unit 5; a monostable multivibrator 15 composed of a first reversing unit 10 to which the front-edge differential signal generated by the differentiation circuit unit 9 is inputted, a second reversing unit 11 for reversing and outputting the output signal from the first reversing unit 10, and a time constant circuit unit 12 for variably controlling the time in which the output signal from the second reversing unit 11 is inputted to the first reversing unit 10; a delay circuit unit 13 whereby the basic drive square wave generated by the basic drive square wave generation circuit unit 5 is delayed by the signal propagation delay time in the first reversing unit 10; an AND gate circuit 14, which is a logic gate circuit in the present invention and to which the basic drive square wave delayed by the delay circuit unit 13 and the output signal from the first reversing unit 10 are inputted; and an E-class amplifier 6, which is a switching amplification circuit unit in the present invention for amplifying the amplification source signal outputted from the AND gate circuit 14, as shown in
The basic drive square wave generation circuit unit 5 of the present embodiment is also configured from a basic operation signal oscillator 1, a double-frequency generation circuit 2, a waveform rectification circuit 3, and a divided frequency generation circuit 4, as shown in
This basic operation signal generator 1 can be an oscillator that outputs a high-frequency signal of 13.56 MHz if the output frequency is 13.56 MHz, the output frequency being specifically the frequency of the high-frequency output of a high-frequency power supply circuit, e.g., the previously described frequency of the high-frequency output, which is a frequency equal to or greater than the megahertz range and which cannot be controlled by a thyristor. The basic drive signal, which is a high-frequency signal generated by the basic operation signal generator 1, is doubled to a frequency of 27.12 MHz by a conventional double frequency circuit.
The basic drive signal having a doubled frequency of 27.12 MHz is appropriately amplified in amplitude by an amplifying transistor (not shown), fed to the waveform rectification circuit 3, and shaped to a square wave of 27.12 MHz. A square wave generation circuit normally used in digital circuits or the like, i.e., a circuit that uses a reversing unit in multiple stages (for example, two stages), can be satisfactorily used as the waveform rectification circuit 3.
The basic drive signal shaped in the waveform rectification circuit 3 into a square wave having a doubled frequency of 27.12 MHz is supplied to the divided frequency generation circuit 4 composed of, e.g., a pulse counter or the like; and square waves divided by two into frequencies of 13.56 MHz, or square wave divided by eight into frequencies of 3.39 MHz are generated according to the output frequency. In the example described hereinafter, the halved frequencies of 13.56 MHz are used in order to bring the output frequency to 13.56 MHz.
Square waves generated by the basic drive square wave generation circuit unit 5 are thus generated based on the doubled frequency square waves, producing basic drive square waves (13.56 MHz) as square waves having a duty ratio of about 50%, as shown in
In the monostable multivibrator 15 used in the present embodiment, a control signal for controlling the output power is inputted to the time constant circuit unit 12, and the time constant is varied according to this control signal, whereby a signal of a short pulse width is outputted to the AND gate circuit 14 by a reduction in the time constant in cases in which a control signal for reducing the output power is inputted, and a signal of a long pulse width is outputted to the AND gate circuit 14 by an increase in the time constant in cases in which a control signal for increasing the output power is inputted.
In the monostable multivibrator 15, as shown in
Thus, using a NAND gate circuit IC2 makes it possible to output square waves having pulse widths that are shorter and more precise, because the logic gate circuits allow for faster operation than common MSI multivibrators. With the pulse widths (signal width) formed in the NAND gate circuit IC2 and outputted from the first reversing unit 10, the basic drive square wave is extracted in the AND gate circuit 14 (IC4 in
In the example in
Since the second reversing unit 11 merely reverses the output of the first reversing unit 10, the second reversing unit 11 can be a unit that has relatively few propagation delays and can operate at the output frequency level.
The time constant circuit unit 12 constituting the monostable multivibrator 15 may be a time constant circuit normally used as a time constant circuit unit and configured from a capacitor (C) and variable resistance (R). With a time constant circuit using a capacitor (C) and variable resistance (R), however, the time constant is apt to vary greatly over time, and it is difficult to achieve stable continuous control. Therefore, in the example shown in
Operation of the high-frequency power supply circuit of the present example shown in
The generated basic drive square wave is inputted to the differentiation circuit unit 9, and is thereby converted to a front-edge differential signal whose front edge alone is extracted, as shown in
The first reversing unit 10 begins signal output upon the input of the front-edge differential signal from the differentiation circuit unit 9, and signal output is ended at the moment in time when the reversed output of this signal output by the second reversing unit 11 is inputted to the first reversing unit 10 due to the passage of time based on the time constant set by the time constant circuit unit 12. In other words, at the moment in time when the front-edge differential signal is inputted, the first reversing unit 10 outputs a signal of a pulse width (signal width) corresponding to a time period based on the time constant set by the time constant circuit unit 12, as shown in
Since a temporal delay, i.e., a signal propagation delay time, occurs from the time the front-edge differential signal is inputted until the time the signal is actually outputted as shown in
Thus, the signal propagation delay time in the first reversing unit 10 has a length approximate to that of one cycle time of the output frequency, and in cases in which the length exceeds (is greater than) one cycle time, or in cases in which the length (size) of the minimum pulse width (signal width) that can be outputted in the first reversing unit 10 is approximate to the length of one cycle time of the output frequency, it is difficult to control the output on the basis of the signal width within the same cycle of the basic drive square wave. Therefore, the first reversing unit 10, which is the square wave signal generator in the present invention, is preferably a unit that can output a square wave signal having a signal width of at least half or less of one cycle time during a signal propagation delay time of at least two logic gates or fewer in one cycle time of the output frequency.
In the present embodiment, the AND gate circuit 14 is used to achieve extraction from the basic drive square wave, whereby an excessive time constant (reversed duty ratio) as shown by the dashed lines in
In
In the present example, the differentiation circuit unit 9 is configured from R1, R2, and C2; and the R1 side is connected to Vd, whereby “1” as a HIGH state is inputted to the input 2 of the NAND gate circuit IC2 when no front-edge differential signals are being outputted, and “0” as a LOW state is inputted to the input 2 when front-edge differential signal are being outputted. Since the circuit element causes an operation delay, the front-edge differential signal requires a time constant sufficient to maintain the LOW state of “0” until the input 1 of the NAND gate circuit IC2 becomes the LOW state of “0.”
In
In the present embodiment, using the field-effect transistor (FET) Q1 allows the electric potential of the input 1 of the NAND gate circuit IC2 to reach the LOW state of “0” during a time period equal to the time constant composed of C1 and the drain-to-source resistance (RDS) corresponding to the gate voltage when the front-edge differential signal is added to the input 1 of the NAND gate circuit IC2 in a state in which the voltage signal is applied as a control signal to the gate of the FETQ1. After the time period equal to the time constant has passed, the electric potential of the input 1 of the NAND gate circuit IC2 reaches the HIGH state of “1,” whereby the input state and time period of the input 1 of the NAND gate circuit IC2 can be controlled by the voltage signal of the control signal, making it possible to achieve continuous control that remains stable over time.
In the present embodiment, the NAND gate circuit IC2 is used as the first reversing unit 10, thereby yielding a reversing unit that can produce a pulse width sufficiently short to be used at 13.56 MHz. To describe the operation of this NAND gate circuit IC2, the HIGH state of “1” is inputted, at the time of no output for front-edge differential signals, to the input 2 connected to the differentiation circuit unit 9 configured from the R1, the R2, and the C2 in the manner described above, and the other input 1 is also connected to the Vd via the field-effect transistor (FET) Q1, whereby the HIGH state of “1” is inputted, and the output of the NAND gate circuit IC2 is therefore the low state of “0.” When the threshold in the input 2 of the IC2 is VIL, the relationship between R1 and R2 is Vd·R2/(R1+R2)>VIL.
In this state, when the front-edge differential signal is outputted; i.e., when the LOW state of “0” is inputted to the input 2, the output of the NAND gate circuit IC2 is brought to the HIGH state of “1.”
The output of the HIGH state of “1” causes the LOW state of “0,” which is the reversed output, to be outputted from the IC3 corresponding to the second reversing unit 11, where by the output of the NAND gate circuit IC2 is maintained at the HIGH state after the start of the input of the LOW state of “0” to the input 1 (immediately following differential signal input), even if the front-edge differential signal is not being outputted; i.e., even if the output is the LOW state of “0.”
The electric potential of the input 1 of the IC2 returns back to the HIGH state of “1” after a time period RDS*C1 (sec) corresponding to the gate power of the field-effect transistor (FET) Q1 has passed, whereby the electric potentials of both the input 1 and the input 2 are brought to the HIGH state of “1,” and the output of the NAND gate circuit IC2 is therefore brought to the LOW state of “0.” Therefore, upon input of the front-edge differential signal, a square wave signal having a signal width within a time period corresponding to a half cycle of the output frequency of 13.56 MHz, which is set in the time constant circuit unit 12, is outputted from the NAND gate circuit IC2, and the first reversing unit 10 formed by the NAND gate circuit IC2 is therefore equivalent to the square wave signal generator in the present invention.
On the basis of a control signal for controlling the power output, the time constant circuit unit 12 of the monostable multivibrator 15 configured from the field-effect transistor (FET) Q1 and other components performs variable control of the pulse width (signal width) outputted from the NAND gate circuit IC2 constituting the first reversing unit 10, which is the square wave signal generator in the present invention. The time constant circuit unit 12 is therefore equivalent to the signal width control circuit in the present invention.
As described above, in cases in which the pulse width (signal width) outputted from the NAND gate circuit IC2 and varied according to the control signal; e.g., in cases in which the pulse width (signal width) in question is half of the pulse width (signal width) of the basic drive square wave, an amplification source signal having a pulse width approximately half (50%) of the pulse width (signal width) of the basic drive square wave is outputted from the AND gate circuit 14 to the E-class amplifier 6 and amplified, and the output is thereby narrowed. Furthermore, in cases in which the pulse width (signal width) outputted from the pertinent NAND gate circuit IC2 is one third of the pulse width (signal width) of the basic drive square wave, an amplification source signal having a pulse width approximately one third (33%) of the pulse width (signal width) of the basic drive square wave is outputted from the AND gate circuit 14 to the E-class amplifier 6 and amplified, and the output is thereby narrowed.
As described above, according to the high-frequency power supply circuit of the present example, in the monostable multivibrator 15 that serves as a vibrator circuit unit, the input of the front-edge differential signal is used as a trigger for the amplification source signal, a square wave signal is generated that has a signal width shorter than a half cycle of the output frequency and that has an output time period based on the control signal, and the amplification source signal is amplified in the switching amplification circuit unit. Therefore, even at a high output frequency, the signal width of the amplification source signal can be varied according to the control signal by using a simple configuration, and, consequently, the regulation of the output power from the high-frequency power supply circuit amplified by the E-class amplifier 6, which is a switching amplification circuit, can be controlled with high precision over time by using a simple configuration. Specifically, the regulation can be controlled with an accuracy of about 200 nanoseconds, as shown in
According to the high-frequency power supply circuit of the present example, the signal width control circuit can be provided with a simple configuration that has the second reversing unit and the time constant circuit unit 12. This can be achieved by using the monostable vibrator based on a DC-AC link as the vibrator circuit unit. Therefore, there is a greater degree of freedom in the circuit design, and a vibrator circuit unit having satisfactory precision and a simple configuration can be obtained.
According to the high-frequency power supply circuit of the present example, the first reversing unit 10 is formed using a NAND gate circuit IC2 that can operate at higher speeds than can a common MSI multivibrator, whereby a square wave signal of a shorter signal width can be generated, and the range of controllable output power can be further increased.
According to the high-frequency power supply circuit of the present example, since the signal width can be varied with each cycle of output frequency, the output power within the same cycle can be controlled with maximum precision over time.
According to the high-frequency power supply circuit of the present example, the AND gate circuit 14 is used, whereby the signal width of an amplification source signal can be prevented from reversing, and disturbance can be prevented from being caused by the reversing of the signal width (reversed duty).
According to the high-frequency power supply circuit of the present example, the delay circuit unit 13 is used, whereby it is possible to avoid drawbacks in which the signal width of the amplification source signal extracted by the AND gate circuit 14 as the logic gate circuit becomes shorter in proportion to the signal propagation delay time.
According to the high-frequency power supply circuit of the present example, since a field-effect transistor (FET) is used as the time constant control element, the time constant does not readily fluctuate in large amounts over time, and stable and continuous control can therefore be achieved using the control signal inputted to the time constant circuit unit.
According to the high-frequency power supply circuit of the present example, since the basic drive square wave is generated using a double frequency, a basic drive square wave having a duty ratio of approximately 50% can be generated with a high degree of precision.
Examples of the present invention were described above based on the drawings, but the specific configuration is not limited to these examples, and the present invention includes modifications and additions within a range that does not deviate from the scope of the present invention.
For example, in the examples described above, a reference operation signal was generated having the same frequency (13.56 MHz) as the high-frequency output of the high-frequency power supply circuit, and a double frequency (double wave: 27.12 MHz) of the reference operation signal was generated by the double-frequency generation circuit 2, but the present invention is not limited to this option alone. Another option is to not use this double-frequency generation circuit 2, but to directly generate a double frequency of the reference operation signal by using, e.g., a 27.12-MHz oscillator.
In the examples described above, a double wave was used as the double frequency, but the present invention is not limited to this option alone, and another possibility is to use a more than double wave, such as a quadruple or octuple wave, and to generate a basic drive square wave or a control square wave which is a square wave having a duty ratio of approximately 50%.
In the examples described above, the basic drive square wave was generated using a double frequency, but the present invention is not limited to this option alone, and another possibility is to generate the basic drive square wave without using a double frequency.
In the examples described above, the AND gate circuit 14 was used as a logic gate circuit, but the present invention is not limited to this option alone, and a multi-input logic gate circuit (NAND gate circuit or OR gate circuit) having a suitable and appropriate AND operation circuit function based on the control scheme can be used as the logic gate circuit.
In the examples described above, a low pass filter (LPF) 7 is provided, making it possible to achieve output in the for of both sine waves and pulses, but the present invention is not limited to this option alone, and either one of these outputs alone may be used.
In the examples described above, the delay circuit unit 13 was used, but the present invention is not limited to this option alone, and the delay circuit unit 13 may be omitted in cases in which the output frequency is comparatively low and the delay propagation time period in the first reversing unit 10 is small enough for the signal width of the output frequency.
In the examples described above, a differential signal is used and a front-edge differential signal is inputted as a trigger signal to the first reversing unit 10, but the present invention is not limited to this option alone. For example, a rear-edge differentiation circuit unit 9′ may be used to input a rear-edge differential signal to the first reversing unit 10, and a third reversing unit 10′, which is the same reversing unit as the first reversing unit 10, may be used as the delay circuit unit 13, as shown in
In the examples described above, the time constant circuit unit 12 based on the field-effect transistor (FET) Q1 was given as an example of a time constant control element, but the present invention is not limited to this option alone, and a CdS photocell, a variable-capacitance diode, or the like can be used as the time constant control element.
Specifically, in cases in which a variable-capacitance diode is used, the operation as such is the same as that of the circuit in
In the examples described above, 13.56 MHz, which is a frequency that cannot be controlled with a thyristor or the like, was used as an example of the output frequency, but the present invention is not limited to this option alone, and it is apparent that the high-frequency power supply circuit of the present invention can be used with an output frequency of several hundred kilohertz that can be used by a thyristor.
In the examples described above, a monostable multivibrator circuit having AC-DC links was used as the vibrator circuit unit, but the present invention is not limited to this option alone. Another possibility is to use a vibrator circuit unit that can output a square wave signal having a signal width within a time period equivalent to a half cycle of the required output frequency upon the input of a trigger signal from an external source, and that can variably control the signal width of the square wave signal on the basis of a control signal.
Number | Date | Country | Kind |
---|---|---|---|
2006-007745 | Jan 2006 | JP | national |
Filing Document | Filing Date | Country | Kind | 371c Date |
---|---|---|---|---|
PCT/JP2006/322257 | 8/11/2006 | WO | 00 | 6/17/2008 |