1. Field of the Disclosure
The present invention is generally related to image sensors, and more specifically, the present invention is directed to image sensors having sensitivity to near infrared light.
2. Background
Image sensors have become ubiquitous. They are widely used in digital still cameras, cellular phones, security cameras, as well as, medical, automobile, and other applications. The technology used to manufacture image sensors, and in particular, complementary metal-oxide-semiconductor (CMOS) image sensors (CIS), has continued to advance at a great pace. For example, the demands for higher resolution and lower power consumption have encouraged the further miniaturization and integration of these image sensors.
Two fields of applications in which size and image quality are particularly important are security and automotive applications. For these applications the image sensor chip must typically provide a high quality image in the visible light spectrum as well as have improved sensitivity in the infrared and/or near infrared portions of the light spectrum.
Non-limiting and non-exhaustive embodiments of the present invention are described with reference to the following figures, wherein like reference numerals refer to like parts throughout the various views unless otherwise specified.
Corresponding reference characters indicate corresponding components throughout the several views of the drawings. Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of various embodiments of the present invention. Also, common but well-understood elements that are useful or necessary in a commercially feasible embodiment are often not depicted in order to facilitate a less obstructed view of these various embodiments of the present invention.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one having ordinary skill in the art that the specific detail need not be employed to practice the present invention. In other instances, well-known materials or methods have not been described in detail in order to avoid obscuring the present invention.
Reference throughout this specification to “one embodiment”, “an embodiment”, “one example” or “an example” means that a particular feature, structure or characteristic described in connection with the embodiment or example is included in at least one embodiment of the present invention. Thus, appearances of the phrases “in one embodiment”, “in an embodiment”, “one example” or “an example” in various places throughout this specification are not necessarily all referring to the same embodiment or example. Furthermore, the particular features, structures or characteristics may be combined in any suitable combinations and/or subcombinations in one or more embodiments or examples. Particular features, structures or characteristics may be included in an integrated circuit, an electronic circuit, a combinational logic circuit, or other suitable components that provide the described functionality. In addition, it is appreciated that the figures provided herewith are for explanation purposes to persons ordinarily skilled in the art and that the drawings are not necessarily drawn to scale.
In a typical image sensor, infrared or near infrared light, such as for example light having a wavelength of for example 850 nm or 940 nm, a nontrivial portion of the incident light enters the semiconductor material, such as for example silicon, and propagates through the semiconductor material without being absorbed. Thus, thicker silicon is needed in order to absorb more of the incident infrared or near infrared light. However, as pixel cell sizes continue to decrease, it has become increasingly challenging to control both optical and electrical crosstalk in thick silicon.
Thus, as will be describe below, an example image sensor in accordance with the teaching of the present invention features a pixel array having a buried multi-layer dielectric reflector that is tuned to reflect near infrared light at a user defined wavelength, such as for example 850 nm or 940 nm. Thus, infrared or near infrared light that penetrates the semiconductor layer and reaches the buried multi-layer dielectric reflector at near normal incidence is reflected, which effectively doubles the thickness of the absorbing semiconductor layer. In addition, the buried multi-layer dielectric reflector is also tuned such that light that reaches the buried multi-layer dielectric reflector at larger angles of incidence is not reflected, which reduces cross-talk in the image sensor in accordance with the teachings of the present invention.
In one example, after each pixel cell has accumulated its image data or image charge, the image data is readout by readout circuitry 104 through column bitlines 110 and then transferred to function logic 106. In various examples, readout circuitry 104 may also include additional amplification circuitry, additional analog-to-digital (ADC) conversion circuitry, or otherwise. Function logic 106 may simply store the image data or even manipulate the image data by applying post image effects (e.g., crop, rotate, remove red eye, adjust brightness, adjust contrast, or otherwise). In one example, readout circuitry 104 may readout a row of image data at a time along readout column bitlines 110 (illustrated) or may readout the image data using a variety of other techniques (not illustrated), such as a serial readout or a full parallel readout of all pixel cells simultaneously.
In one example, control circuitry 108 is coupled to pixel array 102 to control operational characteristics of pixel array 102. For example, control circuitry 102 may generate a shutter signal for controlling image acquisition. In one example, the shutter signal is a global shutter signal for simultaneously enabling all pixel cells within pixel array 102 to simultaneously capture their respective image data during a single acquisition window. In another example, the shutter signal is a rolling shutter signal such that each row, column, or group of pixels is sequentially enabled during consecutive acquisition windows.
In the example depicted in
As shown in the illustrated example, reset transistor T2218 is coupled between a power rail VDD and the floating diffusion FD 220 to reset the pixel cell 212 (e.g., discharge or charge the floating diffusion FD 220 and the photodiode PD 214 to a preset voltage) in response to a reset signal RST. The floating diffusion FD 220 is coupled to control the gate of SF transistor T3222. SF transistor T3222 is coupled between the power rail VDD and row select transistor T4224. SF transistor T3222 operates as a source-follower amplifier providing a high impedance connection to the floating diffusion FD 220. Row select transistor T4224 selectively couples the output of pixel cell 212 to the readout column bitline 210 in response to a select signal SEL.
In one example, the TX signal, the RST signal, and the SEL signal, may be generated by control circuitry, such as for example control circuitry 108 discussed above in
A plurality of dielectric layers 334 is disposed proximate to a backside 336 of the first semiconductor layer 328. In the example, the plurality of dielectric layers 334 form a multi-layer dielectric reflector having dielectric layers that are tuned such that light having a wavelength substantially equal to a user-defined wavelength that is directed to the plurality of dielectric layers 334 at near normal incidence is reflected in accordance with the teachings of the present invention. In one example, the user-defined wavelength may near infrared wavelengths such for example be 850 nm or 940 nm. To illustrate, the example shown in
In one example, the plurality of dielectric layers 334 that form the multi-layer dielectric reflector having dielectric layers that are also tuned such that light that reaches the plurality of dielectric layers 334 at larger incidence angles is not reflected in accordance with the teachings of the present invention. In other words, light that is directed to the plurality of dielectric layers 334 with an angle of incidence that is greater than a threshold angle is not reflected. To illustrate, the example shown in
The example depicted in
The example illustrated in
The example illustrated in
Process block 456 shows that a multi-layer dielectric reflector may then be deposited on the backside of the first semiconductor wafer. For instance, this multi-layer dielectric reflector may be an example of the plurality of dielectric layers 334 illustrated in
Process block 458 shows that a bonding oxide may then be deposited on the backside of the first semiconductor wafer and then process block 460 shows that a second semiconductor wafer may then be bonded and annealed to the first semiconductor wafer. For instance, the bonding oxide and the second semiconductor wafer may be an examples of the bonding oxide 343 and second semiconductor layer 342, which are bonded and annealed to the backside 336 of the first semiconductor layer 328 as shown in
Process block 462 shows that the first semiconductor wafer may then be thinned to a desired thickness and then polished. For instance, the first semiconductor wafer may be the first semiconductor layer 328 illustrated in
Process block 464 shows that pinning wells may then be formed in the frontside of the first semiconductor wafer. For instance, these pinning wells may be an example of the plurality of pinning wells 332 illustrated in
Process block 466 shows that photodiodes may then be formed in the frontside of the first semiconductor wafer. For instance, these diodes may be an example of the plurality of photodiodes 314 illustrated in
Process block 468 shows that metal layers and an interlayer dielectric may then be formed proximate to the frontside of the first semiconductor wafer. For instance, these metal layers and an interlayer dielectric may be examples of the one or more metal layers 344 and interlayer dielectric 346 illustrated in
Process block 470 shows that a color filter array may then be formed proximate to the frontside of the first semiconductor wafer. For instance, this color filter array may be an example of color filter array 348 illustrated in
Process block 472 shows that a plurality of microlenses may then be formed proximate to the frontside of the first semiconductor wafer. For instance, this plurality of microlenses may be an example of the plurality of microlenses 350 illustrated in
The above description of illustrated examples of the present invention, including what is described in the Abstract, are not intended to be exhaustive or to be limitation to the precise forms disclosed. While specific embodiments of, and examples for, the invention are described herein for illustrative purposes, various equivalent modifications are possible without departing from the broader spirit and scope of the present invention.
These modifications can be made to examples of the invention in light of the above detailed description. The terms used in the following claims should not be construed to limit the invention to the specific embodiments disclosed in the specification and the claims. Rather, the scope is to be determined entirely by the following claims, which are to be construed in accordance with established doctrines of claim interpretation. The present specification and figures are accordingly to be regarded as illustrative rather than restrictive.