1. Field of the Invention
This disclosure relates to electronic devices. In particular, a capacitor and method for storing energy at high temperature are disclosed.
2. Description of Related Art
Capacitors are critical electronic devices found in large numbers in many everyday products. For example, computers, telecommunications equipment, mobile phones, automobiles, and military equipment each make heavy use of state-of-the-art capacitors. Capacitors that are reliable and inexpensive are thus in great demand.
One conventional structure for ceramic capacitors is a structure of multiple layers in which dielectric layers of ceramic are interleaved with conductive electrodes. Every other conductive electrode is electrically connected, resulting in a device having two effective electrodes with a capacitance many times the capacitance of the single dielectric layer. Such multilayer ceramic capacitors (MLCCs) are the most reliable component for high-energy density storage banks. They also find use in high frequency switch mode power supplies, and account for a large part of the capacitor market, as discussed in T. Nomura et al, “Multilayer Ceramic Capacitors—Recent Trends,” IEEE, Ferroelectrics, 1996, p. 135. One goal of MLCCs is to achieve higher capacitance in combination with a smaller size. The realization of MLCCs with higher capacitance and volumetric efficiencies is today's biggest challenge for MLCC manufacturers. Such MLCCs could be used in application fields in which electrolytic or plastic film capacitors are currently used.
The main limiting factors for MLCC development are thickness control, the integrity of the dielectric layers and effective electrodes. The primary objectives are smaller case sizes for a given capacitance value, higher reliability and lower cost per unit. The conventional dielectrics that dominate the market are sintering-based NPO, X7R and Z5U. These materials are limited by change in capacitance as a function of temperature and a high rate of aging. Also, large grain size (>3 μm) of the oxide or perovskite powder limits the thickness of the dielectric layer.
In high C-V/Volume capacitors, use of precious metal and the high layer count increase the cost of the capacitors. One objective is to have lower cost per unit. Lack of availability of high-temperature, high-power capacitors has been one of the weak links in high temperature electronics. The three types (classes) of existing capacitors can operate properly only within the military range of temperature—up to about 300° C. Several manufacturers offer capacitors designed for operation up to these temperatures. However, as the operating temperature increases, the choices and data become progressively limited. The inventors are not aware of any commercial capacitors specified for use above 300° C.
The equations for a capacitor are:
Capacitance (C)=KA/fd (picofarads) and C/Vol∝Kd−2
where,
f: conversion factor
(metric system: f=11.31: cm).
The energy stored, U, is:
and the energy density stored in a capacitor (potential energy/volume or mass) is:
where K is the relative dielectric constant of the material, A is the effective area of the internal electrode, d is the thickness of the dielectric layer, and E is the electric field. Parametrically, it is desirable to optimize K, A/d and E simultaneously. Practically, it has been easier to attack the problem from two approaches. The first of these is to engineer dielectric films with high K and E. This work extended the energy density of “conventional” capacitors by an order of magnitude, as discussed in M. F. Rose, Transactions of the IEEE on Magnetics, 22, 1986. The current trend is to optimize the A/d ratio in the expression for the capacitance. This will result in high energy density at lower voltage.
The parameters of interest for such capacitors include:
Capacitance (C).
Temperature coefficient of capacitance (TCC).
Breakdown voltage (BDV).
Capacitance per unit volume or weight (volumetric or weight efficiency).
Dissipation factor (DF) or loss tangent.
Insulation resistance (IR)
For certain applications, radiation immunity.
The development of compact and miniature power sources that operate over an extended temperature range becomes possible by replacing existing capacitors with high-temperature capacitors. This development can make possible several new heavy-duty devices in the semiconductor industry, the military (e.g., explosives, fuses, safe-arm-fire devices, and explosive detonators), and space (e.g., compact power supplies, solar-powered equipment). High-temperature capacitors are well suited for pulse power applications such as ignition systems, lasers, x-ray generation, power supplies, electric vehicles, solar-powered equipment and physics research. Applications involving compact power density sources operating in harsh environments and compatible with Micro Electro Mechanical Systems (MEMs) are also possible. Compact power density sources also find use in high frequency switch mode power supplies, because they can be optimized to minimize both effective series resistance (ESR) and effective series inductance (ESL).
A capacitor to be used in a semiconductor memory is disclosed in U.S. Pat. No. 6,144,546. A hexagonal boron nitride as a dielectric is disclosed. The capacitor of the '546 patent includes nanoscale (0.5-5 nm thick) layers of conductors or semiconductors so that two-dimensional electrical conduction occurs along the layers, thereby suppressing leakage current. The dielectric layer is also thin for the low voltage (about 2V) applications anticipated in large-scale integrated circuits.
At the macroscale geometry of such capacitor, mechanical defects (pinholes, grain boundaries) in advanced ceramics such as BN are normally present (U.S. Pat. Nos. 6,939,775 and 6,570,753). Having these mechanical defects will hinder severely the electrical properties of the device through metal diffusion into the dielectric (electrode diffusion). The single capacitor and therefore the MLCC electrodes will be shorted through huge transverse leakage currents. Furthermore, it is well known that diffusion increases with ambient temperature. In prior art capacitors, a minimum diffusion barrier thickness is required to prevent electrode diffusion into the dielectric layer. But, the required layer to serve as a diffusion barrier increases the distance between electrodes, causing a decrease in capacitance and energy density of MLCCs.
What is needed is a high-temperature capacitor that can achieve high energy density storage, can operate at relatively high voltage with low leakage current and that can be produced at a reasonable cost. In particular, high quality, pinhole-free dielectric layers are needed, preferably in layers that do not need diffusion barriers for high temperature operation.
A capacitor and method of storing energy is disclosed. None of the advantage disclosed, by itself, is critical or necessary to the disclosure.
A method for storing energy in a capacitor is disclosed that includes connecting a first conductor to a first electrode. A second conductor is connected to a second electrode. The second electrode is separated from the first electrode by a dielectric layer. The dielectric layer includes a layer of boron oxynitride, ByOxN1-x or ByNxO1-x where y and x vary and are greater than 0 but can equal 1. The conductivity of the dielectric layer is lower than the conductivity of the first electrode or the second electrode. A voltage of at least 5 volts and preferably a voltage of at least 100 volts is applied between the first electrode and the second electrode. The voltage is applied by means of the first and second conductors. An electronic device for use with the method is also disclosed.
Technical advantages of the methods and devices disclosed include stable electrical characteristics that can be achieved over a large range of operating temperatures. High capacitance and energy density can be achieved because of thinner dielectric layers, since a diffusion barrier is not required.
A more complete understanding of the present disclosure and advantages thereof may be acquired by referring to the following description taken in conjunction with the accompanying drawings, in which like reference numbers indicate like features, and wherein:
The dielectric layer, deposited next, includes a BNO layer. The BNO layer is formed by physical vapor deposition (PVD) at 350° C. from sources of boron and nitrous oxide. One method of depositing the dielectric layer includes using a boron deposition rate of 0.2 Å/s or less, with particularly advantageous rates being below 0.1 Å/s.
Fifth step 108 repeats third step 104. Sixth step 110 comprises additional series of steps 102 through 108 for the number of layers desired. Seventh step 112 is dicing the wafer into separate substrates, each containing one capacitor. Eighth step 114 is separating the diced separate substrates from each other. In an alternate embodiment, seventh step 112 and eighth step 114 are unnecessary, because only one capacitor has been placed on the wafer. Ninth step 116, which is performed on the individual capacitors, is connecting the electrodes to two conductors. The final step 118 is packaging the capacitors, using technology well known in industry.
Estimation of the dielectric constant (K) of the BNO layers from experimental measurement of the capacitor in the Ti//BNO/Ti structure gives a value of ˜4.0. This dielectric constant value is within the range of the values assigned to h-BN and boron oxide compounds. The dielectric constant (K) has been estimated from the above equation by taking as inputs:
C=1.20 nF@ 10 KHz
d=3500 Å
A=3×4 mm2
f=11.31 (centimeter)
Based on the capacitance measurement, one can estimate the value for multilayer capacitors and compare it with values for multilayer capacitors based on sintering technology.
An example of a capacitor based on sintering technology is described in J. Harada et al, “Y7R-designated 6.8° F. multilayer ceramic capacitors in EIA 1206 size,” Electronic Manufacturing Technology Symposium, Japan, 1995, p. 323. With this capacitor, based on Y7R-designated 6.8 μF MLCCs@1 KHz with 240 dielectric layers 3.2 μm thick each, devices were successfully fabricated in EIA 1206 size (3.2 mm×1.6 mm×1.5 mm) using a relaxor dielectric ceramic (PBZT).
Using the same electrode area (3.2 mm×1.6 mm) and about the same layer counts (241), the calculated capacitance for different values of BON thickness and the energy density ratio are compared to sintering capacitors in Table 1, using Eq. 1 and Eq.2, cited above. According to the equation of capacitors:
C
1(μF)=434×1/d d (Angstrom): BON thickness layer
The energy density stored in a capacitor is the energy/volume
The energy density ratio calculated at the same rating voltage is:
C1, VL1: capacitance and volume of a BON dielectric layer
C2, VL2: capacitance and volume of a Y7R-PBZT dielectric layer
C2=6.8 μF, V2=3.2 mm×1.6 mm×1.5 mm; V1=3.2 mm×1.6 mm×(d1+d2)
d1: BON layers total thickness
d2: Total thickness of the metal electrode layers
At the same rating voltage, the calculated ratios of the energy density for a BON-based capacitor and a PBZT (Y7R) capacitor for various values of capacitance are also shown in
d
2=1000 Å×241 layers=24.1 μm I
d
2=200 Å×241 layers=4.82 μm II
Capacitor devices were demonstrated by making and testing Ti/BON/Ti/Si capacitor structures. The measured capacitance values at 10 KHz were about 0.2 nF for 200 nm thick BON layer and an area of 1 mm2 for the 200 nm thick Ti electrode. Results indicate a very small variation (˜3%) of capacitance over a range of frequencies 10 KHz-2 MHz (
Although the present disclosure has been described in detail, it should be understood that various changes, substitutions and alterations can be made thereto without departing from the spirit and scope of the invention as defined by the appended claims.