This application claims the benefit under 35 U.S.C. § 119(a) of European Patent Application No. 23198859.3 filed Sep. 21, 2023, the contents of which are incorporated by reference herein in their entirety.
The present disclosure relates to a method of manufacturing an integrated circuit package and in particular to a method of manufacturing an integrated circuit package in which a passive component is integrated.
An integrated circuit package comprises one or more semiconducting die (which may also be referred to as chips) along with connections between the die and the substrate towards a printed circuit board (PCB). There are different techniques that are known by which a die may be packaged and mounted on the PCB.
A first type of package is referred to a clip bonded package, and comprises a plurality of leads, provided as clips, arranged along a side of a die paddle on which one or more die are mounted. One end of each of the clips contacts the PCB to form connections with other components on the PCB. The other end of each clip may connect to a connection pad on the die, either directly or via a wire between the clip and the connection pad.
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To form connections between the die 120, 125 and the PCB 110, the package 100 includes a number of internal clip leads, e.g. leads 145a, 145b, extended towards an external lead. The clip leads may otherwise be referred to as leads or as interconnects. Each of the leads comprises one or more clips, which are made of a conductive material, e.g. copper. Each of these attaches at one end to the PCB 110, so to form connections with other components that are mounted onto the PCB 110. Connection pads are formed on the top surface of each of the die 120, 125 for providing connections between each die 120, 125 and the PCB and for providing connections between the die 120, 125. For example, a wire connected to bonding pads 155, 160 provides a connection between the die 120, 125. To connect die 120 to the PCB 110, a wire connects the bonding pad 150 to the clip lead 145a. To connect die 125 to the PCB 110, the die 125 is provided with bonding pad 165, which is bonded to the clip lead 145b. A mold resin 140 is also part of the die package 100, and encapsulates the components.
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Each of the die 120, 125 comprises circuitry that may implement various functions. For example, the die 125 may comprise a field effect transistor (FET), whilst the die 120 may comprise a gate driver for the FET. Various such circuits may require a passive components for which it is impractical to implement as part of the die 120, 125, due to the size of the component. For example, a driver circuit may require a capacitor having a capacitance of, e.g. 100 nF, which may be impractical to implement as part of the driver circuit that is implemented as part of the die 120.
A second technique for mounting a die to a PCB is referred to as wirebond, in which wires from wirebond pads on the die connect to the PCB at predetermined connection points on the PCB. These wirebond pads are fixed to the active side of the die, which is positioned away from the substrate.
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There is, therefore, a requirement to implement an additional passive component along with the circuitry that is part of the die of the die package. One proposal for doing so, is to provide the passive component as a discrete component on the PCB and to connect the passive component by the PCB track. However, implementing the component on the PCB consumes additional space on the PCB. Furthermore, the package parasitic inductance and the charging loop may be large when the component is implemented on the PCB, which may undesirably compromise product performance for certain applications.
According to a first aspect, there is provided an integrated circuit package comprising: a die comprising circuitry and one or more bond pads on a first surface of the die; a conductive supporting structure allowing connection to the die, the conductive supporting structure comprising a slot; and a passive component inserted into the slot of the conductive supporting structure, wherein a first terminal of the passive component is electrically connected to the conductive supporting structure and the circuitry of the die.
The integrated circuit package is provided with a conductive supporting structure in addition to the die. A passive component is provided in a slot of the conductive supporting structure and electrically connected to the conductive supporting structure. The passive component is electrically connected via the conductive supporting structure to one of the bond pads of the die, and thus connects to the circuitry of the die. The circuitry of the die thus forms a circuit with the passive component, which is integrated as part of the integrated circuit package, without being integrated in the die itself.
According to a first example embodiment, the slot is a hole in the supporting structure, and a second terminal of the passive component may be attached to a die paddle of the package. According to a second example embodiment, the slot comprises downsets formed in two adjacent parts of the supporting structure, and a passive component is inserted in between the two supporting structures. In this case, the first terminal of the passive component is electrically connected to one of the parts of the supporting structure and to the circuitry of the die via that one of parts of the supporting structure. The two adjacent parts of the supporting structure may be two clip leads.
In some embodiments, the passive component comprises a capacitor.
In some embodiments, the integrated circuit package comprises a die paddle on which the die is mounted.
In some embodiments, a second terminal of the passive component is attached to the die paddle.
In some embodiments, at least part of the conductive supporting structure is attached to the die paddle.
In some embodiments, the integrated circuit package is a clip bonded package comprising a plurality of clip leads, wherein the conductive supporting structure comprises at least a first of the plurality of clip leads.
In some embodiments, the slot comprises a hole passing through a surface of the first of the plurality of clip leads.
In some embodiments, the first of the clip leads comprise a first surface and a second surface, wherein the first surface is positioned further from the die paddle than the second surface, wherein the hole is formed in the second surface.
In some embodiments, a first of the clip leads comprises a first downset and a second of the clip leads comprises a second downset adjacent the first downset, wherein the passive component is inserted into the first downset and the second downset, a first terminal of the passive component being electrically connected to the first of the clip leads and a second terminal of the passive component being electrically connected to the second of the clip leads, wherein a first of the bonding pads is electrically connected to the first of the clip leads so as to provide a connection between the first terminal of the passive component and the circuitry of the die.
In some embodiments, the at least part of the conductive supporting structure comprises the second of the clip leads, wherein the second of the clip leads is electrically connected to the die paddle.
According to a second aspect, there is provided a method of manufacturing an integrated circuit package, the method comprising: providing a die comprising circuitry and one or more bond pads on a first surface of the die; providing a conductive supporting structure allowing connection to the die, the conductive supporting structure comprising a slot; inserting a passive component into the slot of the conductive supporting structure; forming an electrical connection between a first terminal of the passive component and the conductive supporting structure; and connecting one of the bond pads of the die to the conductive supporting structure so as to form an electrical connection between the circuity and the first terminal of the passive component.
In some embodiments, the method comprises: providing a die paddle; and attaching the die and the conductive supporting structure to the die paddle.
In some embodiments, the method comprises attaching the second terminal of the passive component to the die paddle.
In some embodiments, the integrated circuit package is a clip bonded package, wherein the method comprises: providing a plurality of clip leads; and connecting at least some of the plurality of clip leads to at least one of the bond pads of the die, wherein the conductive supporting structure comprises a first of the plurality of clip leads.
Some embodiments of the disclosure will now be described, by way of example only and with reference to the accompanying drawings, in which:
Embodiments will be described in more detail with reference to the accompanying Figures.
A first example embodiment of the integrated circuit package is described with respect to
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In this embodiment, the slot is a hole passing through a surface of the clip lead 335. Each of the clips 310, 315 is made of copper or another conductive material.
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Conductive material is placed (at S410) at predefined locations on the die paddle 305, e.g. by printing. The conductive material may comprise solder or another type of material. At S415, the die 320 and the die 325 are attached to the die paddle 305 on the conductive material added at S410. The die 325—may be referred to as the high electron mobility transistor (HEMT) die, whereas the die 320 may be referred to as the driver 320. The HEMT die 325 added at S415 may contain the GaN FET of a cascode FET.
At S420, conductive material is placed at predefined locations on the top surface of the die 325, e.g. by printing. At S425, field effect transistor is attached to the die 325 to complete the circuitry of die 325. The field effect transistor is attached on the conductive material added at S420. The field effect transistor may be a metal oxide semiconductor field effect transistor (MOSFET).
At S430, conductive material is placed on the surface of the FET. This surface forms the drain terminal of the cascode FET.
At S435, the clips are attached to the package 300. Some of the clips belonging to the first set of clips attach to the top surface of the FET. Others of the clips belonging to the second set of clips 315 attach to other printed surfaces of the die 325.
At S440, the component 350 is inserted into a slot 330 in the clip 335. The passive component 350 is then aligned with the surface of the copper clip 335, and the second terminal of the passive component is connected to the die paddle 305. At S445, solder is added to the clip 335 to attach the first terminal of the component 350 to the clip 335.
At S450, the wirebonding between the connection pads on the die 320, 325 and between the die 320 and ones of the clips is added. This step includes forming a connection between one of the connection pads 340 on die 320 and the clip 335. Reflow is performed as part of S450.
At S455, moulding is performed to provide the components of the die package 300 within a resin mold.
A second example embodiment of the integrated circuit package is described with respect to
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The insertion of the passive component 350 into the downsets allows for careful control of the solder amount used to solder each of the two terminals of the passive component 350. This reduces the probability of imbalanced solder on the two terminals of the passive component 350. As a result, tombstoning during the reflow process may be prevented. Additionally, by providing the passive component 350 in the downsets, the downsets provide a housing for the passive component 350 before the curing or reflow process and so avoids the lead 515 being contaminated by solder spreading or splatter before the wirebonding process. In other words, since the solder is placed lower than the wirebond pad (i.e. in the downcut), the wirebond pad is protected from being penetrated by solder during reflow.
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The method includes the step of (at S635) attaching the clips to the package 500. The clips differ in this instance in that a half-cut, rather than a hole, is made in the clips for insertion of the passive component 350. At S640, solder is added to the half-cuts. At S645, the component 350 is placed in the half-cuts, such that it is laterally attached between the two clip leads 515, 520. The second terminal of the passive component 350 is then connected to the die paddle 305 via the clip lead 520.
The passive component 350 may comprise different types of electrical component, e.g. a resistor, capacitor, inductor. An example will be described with respect to
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Due to the use of the switch SX 745 and diode DX 750, the trade-off between reducing overshoot by increasing the capacitance of CX and reducing power losses is decoupled because the stored energy in CX can instead be utilized to power gate driver circuits instead of MOSFET channel dissipation.
The midpoint voltage, VM, is the drain voltage of the normally-off silicon MOSFET. The source terminal may be grounded by connecting the source terminal to the die paddle 305. The gate-source voltage (Vgs) of the normally-on GaN device is equal to the negative of the midpoint voltage, VM such that VM=−Vgs. In the device shown in
When the cascode switching module turns off, the midpoint voltage, VM, increases (e.g. the midpoint voltage, VM, may increase to 25 V) such that the gate-source voltage of the normally-on GaN device 705 is low enough to turn off. The diode, DX, 750, allows current to flow to the capacitor CX 350 to charge to the midpoint voltage, VM, level (minus the diode voltage drop). Hence, the diode, DX, allows energy harvesting. In addition, the diode, DX 750, and the capacitor, CX, clamp the midpoint voltage, VM, and prevent the normally-off silicon MOSFET 720 from avalanching.
Specifically, when the MOSFET 715 is turned off and VM>(−Vgs,th), the voltage of the midpoint, VM, starts to increase until it goes beyond the predetermined voltage (−Vgs,th) up to a level depending on the package parasitic inductance and as dictated by the respective parasitic capacitances of the GaN and MOSFET devices 705, 715.
The potential VM overshoot gets significantly reduced by the capacitor, CX, and thus limits the MOSFET 715 voltage rise and hence, the risk of MOSFET avalanche. As CX is realized as an off-chip device, its capacitance can be much larger than an integrated capacitor (e.g., the capacitance may be 1 uF for an off-chip capacitor rather than 1 nF for an integrated capacitor) without the concern of efficiency compromise.
To switch the normally-on GaN device 705 off, the midpoint voltage, VM, must exceed −Vgs,th . This means that the midpoint voltage, VM, will increase to at least −Vgs,th (in practise, it may go a bit higher than −Vgs,th ). The capacitor, CX, may therefore charge to approximately −Vgs,th , although it may be a bit lower due to the voltage drop of the diode, DX, 750 (which may be about 0.7 V). The charged energy of the capacitor, CX, can be recycled to power the gate driver 710 operation instead of generating losses on the MOSFET 715 turn-on channel. By this mechanism, a gate driver power source VX is internally generated, and the trade-off between reducing overshoot by increasing the capacitance of CX 350 and increasing power losses is decoupled.
The cascode switching module can be used for some resonant converter applications (e.g., an LLC converter). To avoid undesired turn-on of the GaN device 705 when its drain voltage is oscillating, a bidirectional switch SX 745 and a resistor R3 760 are used in the gate driver 710. The resistor 760 is connected between the voltage midpoint VM 120 and the switch SX 745. When the switching node VM (i.e., the drain of the GaN device 705) is purposefully oscillating and its voltage is lower than the gate driver power source VX, the switch SX 745 is turned on to provide a curtain voltage for the middle point VM 720 and thus the GaN device 705 is in an off-state. The resistor R3 760 limits the discharging current from the capacitor CX 350 to the voltage midpoint VM 720 and subsequently, the switch controller 745 turns off the switch SX 745. The switch SX 745 limits the midpoint voltage, VM, drop when the cascode switching module 700 is used in a resonant application as the drain voltage can oscillate, thus preventing the switching cascode module 700 from turning on while undesired.
Alternatively, the switch SX 745 is systematically turned on just after the turn-off of the cascode devices to maintain a minimum midpoint voltage VM 720 and thus prevent unexpected turn-on of the GaN device 705 due to switching node oscillations. The current capability of switch SX 745 is limited by the series resistor R3 760 (or by the on-state resistance of the switch SX 745) to avoid a rapid discharging of the gate drive power VX. If the switch SX 745 current exceeds a preset level and/or if the gate driver power source voltage VX or the midpoint voltage VM 720 drops below a preset level (e.g. 7V for VX, or 5V for VM), the switch SX 745 is immediately turned off to stop the action of opposing midpoint voltage VM drop which leads to the undesired turn-on of the cascode module 700.
A large negative current may flow within the cascode switching module when the current transitions from one cascode switching module to another or in bidirectional converters. In such case, this current will drop the midpoint voltage VM. The switch SX 745 current is limited so that the unavailable midpoint voltage VM drop in such situations does not lead to the discharge of the capacitor CX 350. The switch SX 745 will be turned off before turn on of the normally-off silicon MOSFET 715.
As the gate driver power source VX is an internal power rail, when used in a larger module, it features innate galvanic isolation between the low-voltage microcontroller and the high-voltage power stage of an application because the PWM signal of the cascode switching module is the only connection between a microcontroller, MCU, and the cascode switching module. This greatly improves safety levels (including human body touch) and simplifies hardware implementation. As no external power source is needed and the parasitic capacitance between different grounds is substantially reduced, the gate driver CMTI performance is significantly improved.
A Zener diode VZ 765 is connected in parallel to the capacitor CX 350. The Zener diode 765 may be formed within the same package as the normally-on GaN device 705 and the normally-off MOSFET 715, or may be an external component placed in parallel to the capacitor CX 350. If the consumption of the gate driver 715 is insufficient to absorb the leakage current from the GaN device 705, then integrated Zener diode VZ 765 limits the voltage on the capacitor CX 350 (i.e., the gate driver power source voltage VX). This is also beneficial to clamp the midpoint voltage VM 720 spikes.
In the example module of
Since the CX 350 is discrete and is quickly charged in nano-second range during the turn-off mode of the MOSFET 715, package parasitic inductance and quick charging loop should be minimized. By implementing the discrete capacitor CX 350 as part of the package 300, 500, the package parasitic inductance and charging loop may be minimised, so as to avoid comprising the product performance.
In some embodiments, the passive component 350 may be provided in a different type of conductive supporting structure of the package other than a clip lead.
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The package 800 comprises a supporting structure 825 that is connected to a base plate 820. The supporting structure 825 may be connected to an insulating pad 815 on the base plate 820. The passive component 350 is inserted into a slot formed in a surface of the supporting structure 825. The passive component 350 is soldered on a first terminal so as to form an electrical connection between the first terminal and the supporting structure 825. The supporting structure 825 is connected by a wire 835 to the connection pad 840 on the surface of the die 830 so as to form an electrical connection between circuitry of the die 830 and the first terminal of the passive component 350.
In each of the above described integrated circuit packages 300, 500, 800, a conductive supporting structure is provided in which the passive component 350 is provided. In the first and second example embodiments, this structure takes the form of a clip lead 335, 515, whilst in the third example embodiment, this structure takes the form of a separate structure 810 independent of the leads. In each case, the passive component is part of an encapsulated or molded semiconductor package 300, 500, 800.
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At S910, a die, e.g. die 325 or die 830, is provided. The die comprises circuitry and one or more bond pads on a first surface of the die.
At S920, a conductive supporting structure is provided. The conductive supporting structure may be structure 825, clip lead 335, or clip lead 515. The conductive supporting structure is provided with a slot.
At S930, a passive component 350 is inserted into the slot of the conductive supporting structure. This step is illustrated at S445 and S645 in
At S940, an electrical connection between a first terminal of the passive component 350 and the conductive supporting structure is formed. This step is illustrated at S450 in
At S950, the one of the bond pads of the die provided at S910 is connected to the conductive supporting structure.
It would be appreciated that the embodiments have been described by way of example only.
Number | Date | Country | Kind |
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23198859.3 | Sep 2023 | EP | regional |