Claims
- 1. An integrated circuit on a semiconductor chip, comprising:
an integrated temperature sensor detecting a temperature of the semiconductor chip and providing a measured temperature signal; a structure of electrical conductors; and a special circuit device connected to said integrated temperature sensor and to at least some of said conductors, said special circuit device generating, dependent upon said measured temperature signal, current flow through said at least some of said conductors when said detected temperature falls below a given temperature value.
- 2. The integrated circuit according to claim 1, including a memory having operating states, subregions, and address lines, said conductors forming at least some of said address lines in a respective one of said subregions, said at least some of said address lines connected to said special circuit device according to at least one of said operating states of said memory.
- 3. The integrated circuit according to claim 1, including a memory having operating states, subregions, and address lines, said conductors forming at least some of said address lines in a respective one of said subregions, said at least some of said address lines connected to said special circuit device.
- 4. The integrated circuit according to claim 1, including:
a memory cell field having a margin; and dummy cells being disposed at said margin and forming at least some of said conductors.
- 5. The integrated circuit according to claim 2, including:
a memory cell field having a margin; and dummy cells being disposed at said margin and forming at least some of said conductors.
- 6. The integrated circuit according to claim 3, including:
a memory cell field having a margin; and dummy cells being disposed at said margin and forming at least some of said conductors.
- 7. The integrated circuit according to claim 1, including a margin, said conductors being formed by dummy cells at said margin.
- 8. The integrated circuit according to claim 2, wherein said special circuit device is programmed to drive said memory and to modify said operating states of said memory.
- 9. The integrated circuit according to claim 3, wherein said special circuit device is programmed to drive said memory and to modify operating states of said memory.
- 10. The integrated circuit according to claim 2, wherein said special circuit device is to be driven by external commands to modify said operating states of said memory.
- 11. The integrated circuit according to claim 3, wherein said special circuit device to be driven by external commands to modify an operating state of said memory.
- 12. The integrated circuit according to claim 2, wherein said special circuit device is programmed to drive said memory with activate and precharge commands and to modify said operating states of said memory.
- 13. The integrated circuit according to claim 3, wherein said special circuit device is programmed to drive said memory with activate and precharge commands and to modify operating states of said memory.
- 14. The integrated circuit according to claim 2, wherein said special circuit device is to be driven by external activate and precharge commands to modify said operating states of said memory.
- 15. The integrated circuit according to claim 3, wherein said special circuit device to be driven by external activate and precharge commands to modify an operating state of said memory.
- 16. The integrated circuit according to claim 1, wherein said special circuit device generates signals in at least one given operating state of said memory effectuating a cutoff of current flow in at least some of said conductors when current is flowing through said conductors.
- 17. The integrated circuit according to claim 1, wherein:
the integrated circuit has operating states; and said special circuit device generates signals effectuating a cutoff of current flow in at least one of said operating states in at least some of said conductors when current is flowing through said conductors.
- 18. In a semiconductor chip, an integrated circuit comprising:
an integrated temperature sensor detecting a temperature of the semiconductor chip and providing a measured temperature signal; a structure of electrical conductors; and a special circuit device connected to said integrated temperature sensor and to at least some of said conductors, said special circuit device generating current flow through said at least some of said conductors when said detected temperature falls below a given temperature value.
- 19. A method for heating an integrated circuit, which comprises:
providing a semiconductor chip having a structure of electrical conductors, integrated temperature sensor, and the integrated circuit; detecting a temperature of the semiconductor chip with the integrated temperature sensor and generating a measured temperature signal; connecting a special circuit device to the integrated temperature sensor and to at least some of the conductors; and generating, dependent upon the measured temperature signal, current flow with the special circuit device through the at least some conductors when the detected temperature falls below a given temperature value.
Priority Claims (1)
Number |
Date |
Country |
Kind |
100 36 914.6 |
Jul 2000 |
DE |
|
CROSS-REFERENCE TO RELATED APPLICATION
[0001] This application is a continuation of copending International Application No. PCT/DE01/02802, filed Jul. 24, 2001, which designated the United States and was not published in English.
Continuations (1)
|
Number |
Date |
Country |
Parent |
PCT/DE01/02802 |
Jul 2001 |
US |
Child |
10352824 |
Jan 2003 |
US |