Claims
- 1. An automatic gain control circuit for a signal path comprising:
a resistive network in the signal path having a plurality of taps that represent different attenuations; an output circuit; means downstream of the output circuit for sensing the level of the signal in the signal path; a plurality of amplifiers connecting the respective taps of the resistive network to the output circuit; and means responsive to the sensing means for controlling the amplifiers so only those taps necessary to compensate for changes in the sensed level of the signal in the signal path are effectively connected across the output circuit.
- 2. The automatic gain control circuit of claim 1, in which the controlling means turns on fewer than all the plurality of amplifiers in a way that some of the amplifiers are fully turned on and some amplifiers are partially turned on.
- 3. The automatic gain control circuit of claim 2, in which the controlling means turns on different combinations of amplifiers as the sensed level changes.
- 4. The automatic gain control circuit of claim 3, in which the sensing means generates a control signal representative of the level of the signal in the signal path and the controlling means additionally comprises a comparator corresponding to each amplifier, each comparator having first and second inputs, means for feeding different threshold signals to the first input of the respective comparators, means for feeding the control signal to the second input of the respective comparators, and means for connecting the outputs of the respective comparators to the corresponding amplifiers so the amplifiers are turned on by those comparators fed by a threshold signal exceeded by the control signal.
- 5. An integrated receiver front end comprising:
a substrate; an attenuator disposed upon the substrate; and an amplifier disposed upon the substrate with its inputs coupled to the attenuator output.
- 6. The integrated receiver front end of claim 5 wherein the substrate is silicon processed by a standard CMOS process.
- 7. The integrated receiver front end of claim 5 wherein the attenuator is a resistive ladder network.
- 8. The integrated receiver front end of claim 5 wherein the resistive ladder network is implemented by combining identical valued resistors in series and parallel.
- 9. The integrated receiver front end of claim 5 wherein the attenuator comprises multiple attenuator stages each providing 1 dB of attenuation per stage.
- 10. The integrated receiver front end of claim 9 wherein the attenuator stages each comprise a 14.4 ohm series resistance and a 130 Ohm shunt resistance.
- 11. The integrated receiver front end of claim 9 wherein the attenuator stages each comprise a chain of series connected resistors connected in parallel;
whereby smaller steps in attenuation are provided at the interconnections of the chain of series connected resistors.
- 12. The integrated receiver front end of claim 5 wherein the amplifier comprises a differential pair amplifier.
- 13. The integrated receiver front end of claim 12 wherein the amplifier comprises multiple amplifiers each connected to an attenuator output.
- 14. The integrated receiver front end of claim 13 wherein the amplifiers comprise:
a variable current source; and a differential pair of transistors with a first gate coupled to ground and a second gate coupled to the attenuator tap point, sources coupled to each other, and drains coupled to a variable current source.
- 15. An integrated receiver front end comprising:
an attenuator that consists of a ladder network having multiple tap points, each providing a differing value of attenuation; and a differential pair amplifier connected to each tap point and selectively turned on, signally or as a group, to amplify the previously attenuated signal and provide a combined differential output with a low noise figure.
- 16. A method for processing a received radio frequency signal comprising:
receiving a radio frequency signal that is of varying strength; generating a control voltage to provide an indication of a desired signal strength; using the control voltage to turn on multiple contiguous differential pair amplifiers that are connected to contiguous tap points on a resistive ladder network to allow an attenuated signal to be amplified after being attenuated to the desired attenuation level; passing the signal through the resistive ladder; tapping the resistive ladder at contiguous points allowing the signal to attenuated to different levels at each point; amplifying each signal by a fixed gain to produce a differential output; and combining the amplified signals to produce a resultant signal of the desired signal strength.
- 17. An integrated receiver front end comprising:
a substrate means for disposing a CMOS circuit; an attenuator means for reducing a signal's level disposed upon the substrate; an amplifier means for increasing a signal's level, disposed upon the substrate with its inputs coupled to the attenuator output.
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application claims the benefit of U.S. Provisional Patent Application Nos. 60/108,459, 60/108,209, 60/108,210 filed Nov. 12, 1998; U.S. Provisional Application No. 60/117,609 filed Jan. 28, 1999; U.S. Provisional Application Nos. 60/136,115 and 60/136,116 filed May 26, 1999; U.S. Provisional Application No. 60/136,654 filed May 27, 1999; and U.S. Provisional Application No. 60/159,726 filed Oct. 15, 1999; the contents of which are hereby incorporated by reference.
Provisional Applications (8)
|
Number |
Date |
Country |
|
60108459 |
Nov 1998 |
US |
|
60108209 |
Nov 1998 |
US |
|
60108210 |
Nov 1998 |
US |
|
60117609 |
Jan 1999 |
US |
|
60136115 |
May 1999 |
US |
|
60136116 |
May 1999 |
US |
|
60136654 |
May 1999 |
US |
|
60159726 |
Oct 1999 |
US |