Claims
- 1. A light emitting device having a III-V compound semiconductor substrate which has a predetermined conductivity type, a III-V compound first semiconductor layer which is deposited on an upper surface of said III-V compound semiconductor substrate and which has the opposite conductivity type to that of said substrate, wherein a p-n junction is formed between said semiconductor substrate and said first semiconductor layer, a current control semiconductor layer which has the opposite conductivity type to that of said first semiconductor layer and which covers an upper surface of said first semiconductor layer and which has a hole therethrough, a second semiconductor layer positioned in said hole and contacting said first semiconductor layer, whereby current can flow through said current control semiconductor layer, said second semiconductor layer having the same conductivity type as said first semiconductor layer, a first electrode which is provided directly on said current control semiconductor layer and said second semiconductor layer and which is in current flow communication with said first semiconductor layer through said second semiconductor layer, and a second electrode which is provided on a bottom surface of said semiconductor substrate and which has a light extracting window at its center part for emitting light from said device, said current control semiconductor layer being made of a layer of higher carrier concentration than the carrier concentration in the first semiconductor layer, whereby light is adapted to be emitted from a radiation region adjacent said p-n junction, normal to said p-n junction, which radiation region is confined by said current control semiconductor layer, and adapted to pass through the semiconductor substrate to said light extracting window, and wherein the bandgap of said semiconductor substrate is wider than that of said radiation region.
- 2. A light emitting device according to claim 1, wherein the carrier concentration of said current control semiconductor layer is sufficiently high so as to lower the contact resistivity between the current control semiconductor layer and said first electrode.
- 3. A light emitting device according to claim 2, including a further semiconductor layer between said semiconductor substrate and said second electrode, said further semiconductor layer having an aperture arranged to transmit the light and having a higher carrier concentration than the carrier concentration of the passage in the semiconductor substrate through which the light passes to the light extracting window.
- 4. A light emitting device according to claim 3, wherein the carrier concentration of said further semiconductor layer is sufficiently high so as to lower the contact resistivity between the semiconductor substrate and the second electrode.
- 5. A light emitting device according to claim 1, wherein said second semiconductor layer is an upper part of said first semiconductor layer, which upper part has been doped to provide a conductivity type impurity in excess therein.
- 6. A light emitting device according to claim 1, wherein said second semiconductor layer is a separate crystal layer, said crystal layer having a conductivity type impurity in excess therein.
- 7. A light emitting device according to claim 1, wherein said p-n junction is formed by either liquid phase epitaxial growth or vapor phase epitaxial growth.
- 8. A light emitting device according to claim 1, wherein said semiconductor substrate has a p-conductivity type, said first semiconductor layer has an n-conductivity type, and said second semiconductor layer has an n.sup.+ -conductivity type.
- 9. A light emitting device according to claim 1, wherein said second electrode is provided directly on a bottom surface of said semiconductor substrate.
- 10. A light emitting device according to claim 5, wherein a bottom surface region of said semiconductor substrate covered by said second electrode is provided with a higher carrier concentration than the carrier concentration in the rest of the semiconductor substrate, with the second electrode contacting the bottom surface region provided with a higher carrier concentration, and wherein a depression, positioned corresponding, at the bottom surface of the semiconductor substrate, to the light extracting window, is formed in the bottom surface of said semiconductor substrate.
Priority Claims (1)
Number |
Date |
Country |
Kind |
86037/76 |
Jul 1976 |
JPX |
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Parent Case Info
This is a continuation of application Ser. No. 817,681, filed July 21, 1977.
US Referenced Citations (3)
Continuations (1)
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Number |
Date |
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Parent |
817681 |
Jul 1977 |
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