Patent Application
20180240671
Fields of the invention include semiconductor fabrication methods and optoelectronic devices. Example applications of the invention include forming p-n junctions and silicon photovoltaic devices, such as solar cells. Additional applications of the invention include the formation of doped layers and junctions in a variety of semiconductor devices, including, for example, applications such as—mobile power-generation applications, distributed generation systems, and central power production. Methods of the invention can also form silicon alloys. Another example application is in energy storage, where doped silicon alloys of the invention can provide for next-generation Li-ion battery anodes.
The best commercial solar cells suffer from poor efficiency, meaning that a small portion of the incident energy is converted to electrical energy. It is a goal of research to provide solar cells that are more efficient, such that the installation and use of solar panels becomes commercially viable without subsidies. One of the problems in current state-of-the-art silicon solar cells is the recombination of carriers in the emitter region of the solar cell (thin doped layer that receives solar energy), which prevents the carriers from contributing to the electrical energy generated by the solar cell. Such recombination of carriers in the emitter limits the potential efficiency of next generation state-of-the art solar cells to about 22.5% efficiency. Very expensive techniques with limited application for mass manufacture have pushed the efficiency to 25.8%. Cuevas and Russell found a 26.2% efficiency limit for silicon solar cells with a nearly perfect silicon absorber when co-optimizing a metallization grid and the emitter. A. Cuevas et al., “Co-optimisation of the emitter region and the metal grid of silicon solar cells,” Prog. Photovoltaics Res. Appl. 8, 603 (2000). The optimum emitter was 2-3 μm thick and 80-100 Ohm/sq. with a surface concentration of 4-6·1018 cm. Such an emitter would be nearly impossible to produce by prior P-diffusion techniques.
The present inventors have identified a primary factor contributing to this loss, which is the inflexible constraints of solid-state diffusion kinetics during emitter formation in a typical POCl3 process used to form the doped emitter layer. POCl3 is a gaseous precursor that in the state-of-the-art solar cell formation processes forms a phosphosilicate glass (SiO2 with P) on the front surface of the wafer during a chemical vapor deposition process at high temperature >800° C., which layer is then used for solid-state diffusion. The solid-state diffusion provides high concentrations of inactive phosphorus and a heavily-doped, difficult-to-passivate front surface.
Solid state diffusion or gas diffusion processes from gas sources, liquid sources (such as phosphoric acid) or solid sources also limit throughput and raise manufacturing costs for solar cells. P-n junction formation by such conventional diffusion processes is a critical step in the manufacture of current silicon solar cells and require the largest thermal budget during the solar cell manufacturing process. The high temperatures—800-950° C. is typical—of today's phosphorus or boron chemical vapor deposition processes can seriously degrade high-quality silicon wafers through the in-diffusion of metal impurities from the furnace environment at even single parts per billion concentration. Furthermore, process cost is directly correlated with temperature, and throughput is limited by furnace heating and cooling.
One reason that the state-of-the-art solar cells have efficiency limited by the solid state or gas diffusion processes is that those prior diffusion process provide shallow, non-uniform doping profiles, and fail to provide an abrupt junction to the undoped region. Some recent efforts have focused on attempting to create deep abrupt junctions. Deep abrupt junctions have been explored by incremental improvements to solid-solid state diffusion or through built-in emitters using grown-in doping via direct epitaxy [R. Hao et al., “Kerfless epitaxial mono crystalline Si wafers with built-in junction and from reused substrates for high-efficiency PERx cells,” in IEEE Journal of Photovoltaics, vol. 6, no. 6, pp. 1451-1455, November 2016] yielding low sheet resistance emitters, lowering series resistance loss and producing higher FF [V. Mertens, S. Bordihn, A. Mohr, K. Petter, J. W. Müller, D. J. W. Jeong, R. Hao, T. Ravi, “21.4% Efficient fully screen printed n-type solar cell on epitaxially grown silicon wafers with built-in boron rear side emitter,” in 31st European Photovoltaic Solar Energy Conference and Exhibition, vol. 4, no. 1, pp. 1000-1002, 2015]. By reducing the surface recombination, >0.5 mA/cm2 of photocurrent can be collected [B. Min et. al, “Incremental Efficiency Improvements of Mass-Produced PERC Cells up to 24%,” in Proc. 31st EU PVSEC, Hamburg, Germany, 2DO3.3 (2015)] producing more than a 15 mV gain in VOC [M. Rüdiger et al., “Numerical current density loss analysis of industrially relevant crystalline silicon solar cell concepts,” IEEE J Photovolt, 4, 533 (2014)], as surface dopant concentration and passivation are nearly perfectly correlated [B. Min et al., “Heavily doped Si:P emitters of crystalline Si solar cells: recombination due to phosphorus precipitation,” Phys. Status Solidi—Rapid Res. Lett. 8, 680 (2014)]. The incremental improvements have not provided significantly better efficiencies (predicted maximum of up to 24%) or commercially practical fabrication methods. The direct epitaxy of Hao et al. and Mertens et al. is also not presently suitable for large scale fabrication because it is slow in terms of growth rate (slow batches, though this is an area of research) and throughput (few wafers per batch), and expensive. It is also difficult to create junctions where dopants are incorporated of different types (p vs n). When a wafer is bulk doped with one type, a similarly doped layer can be formed for a back or front surface field but not for a junction—because depending on the method, the growth chamber will often be cross-contaminated, which does not allow control of doping. Hao et al have demonstrated the fabrication commercially under the company name CrystalSolar.
Liquid phase epitaxy has been investigated for back-surface field formation using the Al—Si system and low-temperature crystal growth for many years [P. Lolgen, C. Leguijt, J. A. Eikelboom, R. A. Steeman, vW. C. Sinke, L. A. Verhoef, P. F. A. Alkemade, E. Algra, “Aluminum back surface field doping profiles with surface recombination velocities below 200 cm/s.,” IEEE Photovoltaics Specialists Conference, vol. 23, pp. 236-242, 1993; M. G. Mauk, Silicon, Germanium and Silicon-Germanium Liquid Phase Epitaxy (2007)]. Recent work has reinforced the value of boron-doping the aluminum source for back-surface field formation [M. Rauer, C. Schmiga, M. Glatthaar, and S. W. Glunz, “Alloying from Screen-Printed Aluminum Pastes Containing Boron Additives. IEEE J. Photovoltaics 3, 206 (2013)], to enhance the field effect passivation.
The formation of back contacts via liquid phase epitaxy typically utilizes thick Al (sometimes with Boron additive) as the eutectic former/contact material. Typical thickness is between 3-6 μm, which prevents dewetting during the liquid phase epitaxy and provides sufficient metal to form the back contact. The silicon wafers used for the solar cells are typically P-type, and the back contact formation via liquid phase epitaxy creates a heavily P-type doped layer that interfaces with the back contact. Known liquid phase back contact epitaxy processes screen print a metal layers 10s of microns thick, anneal in the temperature range of about 700-800° C. for a very short time, and then cool to reconstitute the contact and the heavily P-type doped layer.
An embodiment of the invention is a method for forming a doped silicon layer or a silicon alloy that includes providing a silicon substrate having a silicon surface. An eutectic-former layer with dopant is formed on the silicon surface. Heating is conducted past a system eutectic temperature of the eutectic-former layer and silicon to form a liquid eutectic melt that incorporates some of the silicon near-surface into the liquid eutectic melt. Cooling to supersaturate the liquid eutectic melt with silicon and recrystallize silicon doped with the dopant. Further cooling can be conducted to solidify remaining liquid eutectic melt. Dewetting prevention is preferably used, for example, with a capping layer, to prevent dewetting of the eutectic former. For P-type emitters, preferred eutectic formers include Sn, Zn and Al, and dopants include B, Ga, and Al, e.g. combinations of preferred P type dopant-metal eutectic formers include B—Sn, Ga—Sn, B—Zn, Ga—Zn, Al—Zn, and B—Al. For N type emitters, preferred eutectic formers include Sn, Zn, Bi and dopants include P and Sb, e.g., combinations of preferred N type dopant-metal eutectic formers include P—Sn, Sb—Zn, P—Zn, P—Al and P—Bi. Generally, the eutectic-former should have a low silicon eutectic temperature (e.g., <650°, more preferably <600°) and preferably a lower solubility in silicon compared to the dopant included in the material.
A preferred silicon solar cell includes an emitter layer within a silicon substrate. A p-n junction is defined by a junction of the emitter layer with the remaining silicon substrate. The emitter has a doping profile with a doping concentration at the p-n junction that is equal or greater than the doping concentration at a surface of the emitter layer. The p-n junction can be 100 nm to tens of microns deep. The dopant concentration at the p-n junction preferably transitions from a maximum doping concentration at the p-n junction to a background doping concentration within 1-100 nm of depth
A preferred method for forming a doped silicon layer or a silicon alloy includes providing a silicon substrate having a silicon surface. An eutectic-former Al layer is deposited on the silicon surface. The Al layer is capped for dewetting prevention The system is heated beyond the eutectic temperature of the eutectic-former layer and silicon to form a liquid eutectic melt that incorporates some of the silicon near-surface into the liquid eutectic melt. Cooling is conducted to supersaturate the liquid eutectic melt with silicon and recrystallize silicon doped with Al dopant.
Preferred embodiments of the invention provide a transformative change in cell processing and p-n junction formation with value-added electronic properties of emitters formed via liquid phase epitaxy doping (LPE-D), and provide improved silicon solar cells. Preferred methods for forming p-n junctions in silicon solar cells provide improved electronic properties, lower process temperatures, and higher throughput compared to the state-of-the-art fabrication methods and solar cells. Preferred doped layer formation methods use liquid phase epitaxy doping (LPE-D) which enables precise, tunable control over the emitter concentration profile, thus reducing emitter saturation current and leading to improved solar cell efficiency. Preferred methods provide surface dopant concentration that is determined solely by the solubility of the dopant at the eutectic temperature. The high-concentration near-surface dead layer typical of diffused emitters can be reliably circumvented, while maintaining good contacting by alloy eutectic engineering as needed.
Preferred methods can be used to perform either P type or N type doping. Example preferred methods form a replacement of prior boron and/or phosphorus solid state and gas diffusion process. The doping methods of the invention decouple emitter formation from the slow solid-state kinetics of gas diffusion. With methods of the invention, the doping profile formed is largely time-independent and can proceed very quickly—theoretically, doping could be done in a brief firing step in several seconds or during bulk impurity gettering for 10-60 minutes, allowing throughput to be optimized without constraining cell architecture in next generation solar cells. The present methods' liquid phase epitaxy approach results in a nearly uniform doping concentration profile that can provide significantly lower saturation currents and improved surface passivation in comparison to existing and proposed industrial diffused emitters.
In a preferred method, highly-doped layers in solar cells are formed via liquid phase epitaxy doping (LPE-D). Initially, for LPE-D, a thin layer 10s nm to microns thick of a “eutectic-former”, a metal or metal alloy that also serves as or includes the dopant is deposited on the Si surface. A preferred thickness of the eutectic former layer is in the range of 10 nm to 3 μm. A practical limit is 10 μm. Multiple dopants could be used if desired, e.g. Al and B are both P-type dopants. The deposition of the eutectic-former layer can be via any suitable deposition processes, such as physical vapor deposition (evaporation/sputtering), electrodeposition, or the simple method of powder deposit. Any technique that deposits the eutectic former/dopant without oxidizing the eutectic former metal or metal alloy can be used. Other eutectic formers and dopants can be used. For P-type emitters, preferred eutectic formers include Sn, Zn and Al, and dopants include B, Ga, and Al, e.g. combinations of preferred P type dopant-metal eutectic formers include B—Sn, Ga—Sn, B—Zn, Ga—Zn, Al—Zn, and B—Al. For N type emitters, preferred eutectic formers include Sn, Zn, Bi and dopants include P and Sb, e.g., combinations of preferred N type dopant-metal eutectic formers include P—Sn, Sb—Zn, P—Zn, P—Al and P—Bi. Generally, the eutectic-former should have a low silicon eutectic temperature (e.g., <650°, more preferably <600°) and preferably a lower solubility in silicon compared to the dopant included in the material. Al represents a unique example that serves both as the eutectic former and the dopant, and will perform similarly to other combinations above to form a p-n junction though there is no difference in solubility. Methods of the invention permit co-optimization of dopant profile and gettering. Table 1 shows eutectic temperatures for example preferred metals that can be used as the eutectic formers:
The eutectic-former with dopant is deposited upon a silicon substrate, such as an Si wafer or bulk Si. Upon heating past the system eutectic temperature, the eutectic-former layer and a portion of the Si melts and the eutectic-former layer incorporates some of the Si near-surface as it forms a liquid eutectic. When cooling begins from the peak annealing temperature, the eutectic melt supersaturates with Si. With fast diffusion kinetics in the liquid layer, the Si recrystallizes on the wafer surface epitaxially, saturated with the eutectic-former—and any additional dopants—at a concentration equal to their solid solubilities in silicon at the temperature where that layer of Si epitaxially recrystallizes. Finally, when cooled to the eutectic temperature, the remaining melt solidifies completely at the eutectic composition. A single etch with HCl (or HF) can remove the solidified metallic eutectic layer with the doped Si itself serving as an etch stop. Phosphorus as an example dopant can produce an emitter that would result in an emitter saturation current density lower than that of most conventional diffused emitters (<50 fA/cm̂2).
Preferred methods permit the surface concentration to be fine-tuned by changing the eutectic-former and/or engineering a ternary eutectic temperature to ensure good contacting, e.g. via mixed-metal alloying (such as alloys of the examples above, e.g., e.g. Pb/Sn) that commonly lowers the system eutectic in Si. Surface doping concentration and surface passivation are nearly perfectly correlated. The depth of the doped emitter that is formed can be arbitrarily adjusted by changing the initial thickness of the eutectic-former layer. Thicker emitters are strongly protected from shunts. The peak doping concentration at the deepest part of the emitter can be controlled by changing the peak process temperature without changing the depth of the emitter by adjusting the eutectic-former loading (thickness) accordingly. A thicker layer provides more metal and the melt becomes richer with silicon at higher temperatures. Generally, this provides two variables that can be controlled to engineer the junction that is formed, as further detailed in Equation (1) below. The thickness of the eutectic former (gm) and the peak temperature (Tp) determine the thickness of the emitter (W). The peak temperature controls richness of the eutectic melt by determining the weight % of Si in the eutectic phase, which increases with temperature.
Preferred methods of the invention can be applied, for example, as an extension and improvement of the aluminum-silicon eutectic formation of the back-surface field and planar back contact of most of today's silicon solar cells that is discussed above in the background. Methods of the invention provide compositions and dopant compensation designed for the front surface and n-type doping. Surface and film properties during the melting reaction determine the morphology and uniformity of the recrystallized layer, and are applied toward junction formation to create silicon based photovoltaics. Methods of the invention provide liquid-phase epitaxy doping to tailor emitter profiles broadly for N and P types emitters, and can be engineered by selection of one or more dopant elements for a given eutectic temperature. Compared to solid-state diffusion, liquid phase epitaxy doping (LPE-D) is fundamentally different in the mechanism of how dopants are transported into the Si lattice.
Preferred methods provide many manufacturing advantages compared to prior solid-state diffusion and gas diffusion methods. Preferred methods are carried out at lower temperatures using eutectic melting and subsequent regrowth of the near-surface Si to incorporate the dopant, lowering equipment and process cost and preserving bulk lifetime. The emitter doping process can be shortened to several seconds. For an example solvent-dopant of Al-BSF (Back Surface Field—the process discussed in the background for back surface contact formation—which creates the heavily doped P-type layer, which in operation creates an electric field known as the Back Surface Field), the liquid film forms almost instantaneously when heating above the eutectic. Because lower process temperatures can be used, the doping profile is largely invariant with process time. Even with relatively high-temperature Sb as the eutectic former (T˜650° C.), dopants like P do not have the thermal energy required to overcome the significant diffusion activation energies that demand the higher temperatures of current processes (>800° C.). The dopant profile is thus largely fixed during re-solidification of the eutectic with little further solid-state diffusion. If beneficial, extended segregation gettering (e.g., 30 min at 600° C.) can be performed without affecting the final emitter profile. Segregation gettering has high segregation coefficients even at peak process temperature. One-sided local N- or P-type doping provides facile incorporation into advanced architectures. Printing of selective emitters can be achieved by varying thickness of the eutectic-former layer in a single step. All back-contact devices can use liquid phase epitaxy doping for both P- and N-type regions. Compared to prior methods, no net process steps are added. A doped-glass deposition, diffusion, and glass etch are replaced by one-sided evaporation or printing, low temperature annealing, and an etch. Other deposition methods include thermal evaporation, e-beam evaporation, electrodeposition, sputtering and screen-printing, which converts powder into a spreadable paste. Experiments to demonstrate the invention used a form a screen printing, with terpineol employed to create the spreadable paste of a metal/dopant powder. Electrodeposition is a preferred deposition process because it is scalable at low cost.
Preferred embodiments of the invention will now be discussed with respect to the drawings and experiments used to demonstrate the invention. The drawings may include schematic representations, which will be understood by artisans in view of the general knowledge in the art and the description that follows. Features may be exaggerated in the drawings for emphasis, and features may not be to scale.
The eutectic-former layer 12 includes a P or N type dopant. Upon heating past the solvent-silicon eutectic temperature, the metallic solvent layer melts and incorporates the near-surface Si as an eutectic composition layer forms. Until the peak annealing temperature is reached, more and more silicon is consumed, following the liquidus curve of the phase diagram in equilibrium. The silicon substrate 10 serves as an infinite source for silicon atoms during the heating process. As cooling from the peak temperature ensues, the eutectic melt becomes supersaturated with Si. The Si recrystallizes epitaxially onto the wafer surface and is saturated with any dopants at a concentration equal to their solid solubilities in Si at the temperature at which recrystallization occurs to form a doped emitter layer 14. Once cooled below the eutectic temperature, the remaining melt solidifies completely at the eutectic composition to form a solidified metallic eutectic layer 16 that is alloyed with silicon from the silicon substrate 10. To remove the solidified metallic eutectic layer, a single etch with a strong acid such as HCl (or HF) can be used with the Si itself serving as an etch stop to remove the metallic eutectic layer 16, leaving the doped emitter layer 14 that forms a uniform and abrupt p-n junction with the silicon 14.
The formed doped emitter layer and the p-n junction can be engineered. Eq. (1) can be used to calculate the width of the doped layer for a given solvent loading, gM [See, J. del Alamo, J. Eguren and A. Luque, “Operating Limits of Al-Alloyed High-Low Junctions for BSF Solar Cells,” Solid-State Electronics 24, pp. 415-420, 1981]. The depth of the emitter, Wemitter, is determined entirely by the binary phase diagram: by the amount of Si incorporated into the melt at the peak temperature, wt %SiT
As shown in Eq. 1, for a given loading (thickness) of the eutectic-former, gM, the depth of the final emitter, Wemitter, is determined by how much Si is incorporated in the eutectic melt at the peak temperature, wt %SiT
The shape of the dopant profile is determined thermodynamically in liquid phase epitaxy, rather than kinetically as in solid state diffusion. This difference stems from the rapid diffusion in the liquid melt layer, which homogenizes the dopant and keeps the system in equilibrium at reasonable cooling rates of even 10s ° C./min. Doping profiles can be tuned flexibly throughout the concentration profile design space by changing solvent load and peak temperature.
Cmd-PClD simulated emitter saturation current densities, J0e, for attractive n- and p-type dopant-solvent systems for the present LPE-D methods are shown as a function of process temperature in
The present methods allow for substantial tunability, as the depth and peak dopant concentration can be tuned independently (using solvent load and peak process temperature, respectively). The LPE-D approach also requires significantly less time than a typical tube diffusion (POCl3 chemical vapor deposition and diffusion), as the liquid forms almost immediately after heating above the eutectic. A reduction in processing temperature and duration translates to lower equipment and thermal processing costs.
The doping profile produced by methods of the invention can be flat or retrograde in character—where the dopant profile decreases from the bulk to the surface, which is opposite classical diffusion profiles that have a profile that increases substantially from the bulk to the surface with the highest concentration being at the surface of the emitter. With the present formation methods, the peak concentration of dopant occurs at the deepest point in the profile and is determined by the solid solubility of the dopant at the peak temperature. The surface concentration is determined by the solid solubility of the dopant at the eutectic temperature of the alloy.
With methods of the invention, to achieve a particular depth of the emitter, either the eutectic former loading or the peak temperature can be changed. Increasing the eutectic former loading at constant peak temperature effectively stretches the shape of the doping profile while keeping both the surface and peak concentrations the same. Alternatively, the degree of retrograde character in the present doping profile can be tuned by changing the peak temperature while keep eutectic former loading constant, which increases the retrograde character as the peak concentration increases at the deepest point. Thus, increasing the metal loading while minimizing the excursion in temperature above the eutectic will minimize the retrograde character and keep the dopant profile flat. Because the present process can be executed within seconds or minutes, there is little solid-state diffusion that occurs to soften the abruptness of the profile. At the furthest extent (depth) of doping into the bulk, there is an abrupt drop within 1-100 nm of up to four orders of magnitude in concentration until the doping is below the background dopant level within a span of tens of nanometers
If useful, extended segregation gettering can be performed without affecting the final emitter profile substantially. Segregation gettering to the liquid eutectic layer can provide a higher segregation coefficient than phosphorus gettering. One-sided local n- or p-type doping can also be achieved, providing facile incorporation into advanced architectures, such as selective emitters or back contact devices.
Experiments were conducted using B and Al powders as dopants and Al powder as the eutectic solvent (including Al—Al as former-dopant). A paste containing the powders was doctor bladed on the Si wafers depending upon the desired final thickness by adjusting the loading of the solvent applied, gM in Eq. (1). To prevent dewetting of the nanometric liquid film, a thin capping/wetting layer of spin on glass (SOG) was applied atop the paste. A typical experiment spin coated glass as a capping layer on top of a thin paste of the eutectic former/dopant, which may otherwise dewett due to its thinness.
Eutectic melting was confirmed to occur by differential scanning calorimetry. Other options for preventing dewetting include conventional thin film approaches. For example, preparation of the silicon surface prior to deposition to alter surface hydrophobicity can be used maintain wetting. In addition, a thin capping oxide can be used maintain the intended wetting. After annealing, the wafer was etched in 1% (vol) HF for 5 minutes and pure HCl for 20 minutes to get removed the glass and excess solidified eutectic melt. Four-point probe was used to measure the sheet resistance of the annealed Si wafers and their n/p type nature of the emitter layer was confirmed with the hot point probe method. Surface topography was analyzed via SEM and elemental mapping was performed via EDX. Other experiments were conducted using B powder and a sputtered Sn layer that was limited to 4.5 μm thick by equipment constraints as the dopant and solvent, respectively.
Sheet resistance as a function of annealing temperature was determined and is shown in
After etching removes the eutectic layer, wafers with Al—B emitters that are nominally 4.9 μm deep show a wavy topography on their surface as can be seen in
While specific embodiments of the present invention have been shown and described, it should be understood that other modifications, substitutions and alternatives are apparent to one of ordinary skill in the art. Such modifications, substitutions and alternatives can be made without departing from the spirit and scope of the invention, which should be determined from the appended claims.
Various features of the invention are set forth in the appended claims.
The application claims priority under 35 U.S.C. § 119 from prior provisional application Ser. No. 62/462,611, which was filed Feb. 23, 2017.
| Number | Date | Country | |
|---|---|---|---|
| 62462611 | Feb 2017 | US |
