Claims
- 1. A fast recovery diode comprising a silicon die having a substrate of a first conductivity type; a single central diffusion extending onto the upper surface of said die and of the other conductivity type defining a single continuous P-N junction; a termination region surrounding the outer periphery of said upper surface of said device and including a silicon dioxide layer which overlies the outer edge of said diffusion and which defined the diffusion window for said single diffusion; an anode contact metal in contact with the surface of said diffusion and overlying the inner peripheral edge of said silicon dioxide layer to define a field plate; an EQR conductive ring which is separated from said anode contact and which extends over the outer peripheral edge of said silicon dioxide layer; and platinum atoms diffused into the back surface of said die to act as life time killers.
- 2. The diode of claim 1, which further includes at least one floating guard ring diffusion disposed beneath and laterally adjacent to said filed plate.
- 3. The diode of claim 1, which further includes an amorphous silicon layer deposited atop said termination region.
- 4. The diode of claim 2, which further includes an amorphous silicon layer deposited atop said termination region.
- 5. The diode of claim 4, which further includes a further conductive field plate in said termination disposed between and spaced from said first named field plate and said EQR ring, with said amorphous silicon layer overlying said first named field plate, said second field plate and said EQR ring.
- 6. The diode of claim 5, which further includes a plurality of spaced floating guard ring diffusions in said upper surface and between said first named field plate and said second field plate and a guard ring in the peripheral edge of said die.
- 7. The device of claim 1, wherein said first conductivity type is the N type.
- 8. The device of claim 2 wherein said first conductivity type is the N type.
- 9. The device of claim 3, wherein said first conductivity type is the N type.
- 10. The device of claim 5, wherein said first conductivity type is the N type.
- 11. The device of claim 6, wherein said first conductivity type is the N type.
- 12. A reduced mask process for forming a fast recovery diode comprising the steps of forming a field oxide atop a silicon die; applying a first mask to said top surface of said field oxide and etching a large area window in the center thereof and leaving an outer oxide termination ring; diffusing impurity atoms through said window to define a large area P/N junction; applying a second mask to said surface and etching a window therein to clear said central area for the application of an anode contact; evaporating platinum metal on the back surface of said die and heating said die to drive platinum atoms into said die; depositing metal atop said top surface of said die and to the top of the P/N junction and over the oxide termination ring; and applying a third mask to said top surface and opening windows to etch said metal to define an anode contact which overlies the inner periphery of said termination ring and a separate EQR ring which overlies the outer periphery of said termination ring.
- 13. The process of claim 13, wherein said platinum metal has a thickness of about 10 Å and is driven at about 950° C. for about 30 minutes.
- 14. The process of claim 12, which includes the further step of depositing an amorphous silicon layer atop said die surface, and a further mask step for removing said amorphous silicon from atop the active P/N junction area and leaving it atop and in contact with said field plate and said EQR ring.
- 15. The process of claim 13, which includes the further step of depositing an amorphous silicon layer atop said die surface, and a further mask step for clearing said amorphous silicon from atop the active P/N junction area and leaving it atop and in contact with said field plate and said EQR ring.
- 16. The process of claim 14, which includes a further mask step for defining a plurality of spaced floating guard ring diffusions in said upper surface of said die which are spaced between said field plate and an adjacent outer field plate.
RELATED APPLICATION
[0001] This application claims the benefit of U.S. Provisional Application No. 60/280,972, filed Apr. 2, 2001.
Provisional Applications (1)
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Number |
Date |
Country |
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60280972 |
Apr 2001 |
US |