Patent Application
20240268236
Many modern day electronic devices contain electronic memory. Electronic memory may be volatile memory or non-volatile memory. Non-volatile memory is able to store data in the absence of power, whereas volatile memory is not. Some examples of next generation electronic memory include magnetoresistive random-access memory (MRAM), resistive random-access memory (RRAM), phase-change random-access memory (PCRAM), and conductive-bridging random-access memory (CBRAM).
Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It is noted that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.
The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.
An integrated chip includes a magnetic tunnel junction (MTJ) memory device. The magnetic tunnel junction includes a reference magnetic layer (e.g., a pinned or fixed magnetic layer), a free magnetic layer over the reference magnetic layer, and a barrier layer directly between the reference magnetic layer and the free magnetic layer. The free magnetic layer includes a first sublayer and a second sublayer. A spacer layer is disposed within the free magnetic layer directly between the first free magnetic sublayer and the second free magnetic sublayer. The spacer layer includes a transition metal such as, for example, tungsten, molybdenum, tantalum, hafnium, or the like. Back-end-of-line (BEOL) interconnects (e.g., metal lines, metal vias, or the like) are arranged over the MTJ.
During the formation of the BEOL interconnects, the MTJ is exposed to high temperatures (e.g., greater than 400 degrees Celsius). This high temperature exposure can cause atoms to diffuse out of the first free magnetic sublayer. This diffusion can reduce the data retention ability of the MTJ. Thus, the spacer layer is included over the first free magnetic sublayer to block atoms from diffusing out of the first free magnetic sublayer, thereby improving a thermal stability of the MTJ. The diffusion blocking ability of the spacer layer corresponds to the thickness of the spacer layer. For example, increasing the thickness of the spacer layer can improve the diffusion blocking ability of the spacer layer. However, as the thickness of the spacer layer is increased, the magnetic coupling between the free magnetic sublayers may be reduced. Consequently, a performance of the MTJ may be reduced.
In various embodiments of the present disclosure, the spacer layer further includes magnesium to improve the thermal stability of the MTJ without substantially reducing the magnetic coupling between the free magnetic sublayers. For example, in addition to a transition metal, the spacer layer further comprises magnesium, which has relatively low impact on the magnetic coupling between the free magnetic sublayers. Thus, by adding magnesium to the spacer layer, the thickness of spacer layer can be increased without reducing the magnetic coupling between the free magnetic sublayers. By increasing thickness of the spacer layer, the diffusion blocking ability of the spacer layer can be improved. By improving the diffusion blocking ability of the spacer layer, the thermal stability of the MTJ can be improved.
The MTJ 104 is between a first electrode layer 102 and a second electrode layer 118. The MTJ 104 comprises a reference magnetic layer 106, a barrier layer 108, the first free magnetic layer 110, the spacer layer 112, the second free magnetic layer 114, and a cap layer 116. In some embodiments, the MTJ 104 is disposed over a substrate (e.g., 502 of
The reference magnetic layer 106 has a fixed (e.g., pinned) magnetic orientation. The first free magnetic layer 110 and the second free magnetic layer 114 have free (e.g., variable) magnetic orientations. The magnetic orientations of the free magnetic layers 110, 114 can be controlled by passing current through the MTJ 104. The resistance of the MTJ 104 changes based on the magnetic orientations of the free magnetic layers 110, 114 relative to the magnetic orientation of the reference magnetic layer 106. The resistance of the MTJ 104 indicates the data (e.g., the value) stored by the MTJ 104.
In some embodiments, the first free magnetic layer 110 comprises cobalt-iron-boron (e.g., CoFeB) or some other suitable ferromagnetic material. In some instances, boron atoms can diffuse out of the first free magnetic layer 110 (e.g., towards the top of the MTJ 104) when the MTJ 104 is exposed to high temperatures (e.g., greater than 400 degrees Celsius) during the formation of the BEOL interconnects over the MTJ 104. When boron atoms diffuse out of the first free magnetic layer 110, the crystallinity of the first free magnetic layer 110 increases. If the first free magnetic layer becomes too crystalline (e.g., if the crystallinity of the first free magnetic layer 110 surpasses some optimal crystallinity threshold), the data retention (e.g., the perpendicular magnetic anisotropy (PMA) and/or the energy barrier) of the MTJ 104 can be reduced. Thus, the spacer layer 112 is included over the first free magnetic layer 110 to impede the diffusion of boron out of the first free magnetic layer 110. By impeding the diffusion of boron atoms out of the first free magnetic layer 110, the thermal stability of the MTJ 104 can be improved. For example, the amount of time that the MTJ 104 can be exposed to high temperatures (e.g., during BEOL interconnect formation) can be increased without the MTJ 104 experiencing substantial data retention degradation.
The spacer layer 112 comprises magnesium and one or more transition metals (e.g., tungsten, molybdenum, tantalum, hafnium, or the like). By including magnesium in the spacer layer 112, the ability of the spacer layer 112 to block boron atoms from diffusing out of the first free magnetic layer 110 can be improved (e.g., the speed at which boron atoms diffuse out of the first free magnetic layer 110 can be reduced) without substantially reducing magnetic coupling between the first free magnetic layer 110 and the second free magnetic layer 114. For example, magnesium has a relatively low impact on the magnetic coupling between the free magnetic layers 110, 114. Thus, by adding magnesium to the spacer layer 112, the thickness of spacer layer 112 can be increased without substantially reducing the magnetic coupling between the free magnetic layers 110, 114. By increasing the thickness of the spacer layer 112, the diffusion blocking ability of the spacer layer 112 can be improved. By improving the diffusion blocking ability of the spacer layer 112, the thermal stability of the MTJ 104 can be improved. For example, the amount of time which the MTJ 104 can withstand high temperatures can be increased. Thus, the number of BEOL interconnect layers than can be formed over the MTJ 104 can be increased.
In addition, by including the transition metal(s) with the magnesium in the spacer layer 112, the magnesium in the spacer layer 112 has a reduced susceptibility to oxidation. Thus, a performance of the MTJ 104 can be improved.
In some embodiments, the thickness of the spacer layer 112 ranges from 5%-100% of the sum of the thickness of the first free magnetic layer 110 and the thickness of the second free magnetic layer 114, the thickness of the spacer layer 112 ranges from 10%-90% of the sum of the thickness of the first free magnetic layer 110 and the thickness of the second free magnetic layer 114, or the thickness of the spacer layer 112 is some other suitable value. For example, in some embodiments, the thickness of the spacer layer 112 ranges from 0.1 nanometers to 1 nanometer, from 0.2 nanometers to 0.9 nanometers, or some other suitable range and the sum of the thickness of the first free magnetic layer 110 and the thickness of the second free magnetic layer 114 ranges from 1 nanometer to 2 nanometers, from 1.2 nanometers to 1.8 nanometers, or some other suitable range. If the thickness of the spacer layer 112 is too low (e.g., less than 5% of the sum of the thickness of the first free magnetic layer 110 and the thickness of the second free magnetic layer 114), a rate of boron diffusion from the first free magnetic layer 110 may be increased and thus the thermal stability of the MTJ 104 may be reduced. If the thickness of the spacer layer 112 is too high (e.g., greater than 100% of the sum of the thickness of the first free magnetic layer 110 and the thickness of the second free magnetic layer 114), the magnetic coupling between the free magnetic layers 110, 114 may be reduced and thus a performance of the MTJ 104 may be reduced.
In some embodiments, the atomic ratio of the magnesium to the transition metal(s) in the spacer layer 112 ranges from 10%-90%, from 15% to 80%, or some other suitable range. In some embodiments, if the atomic ratio of the magnesium to the transition metal(s) is too high (e.g., greater than 90% magnesium, greater than 80% magnesium, or some other suitable value), the magnesium may have an increased susceptibility to oxidization and thus a performance of the MTJ 104 may be reduced. If the atomic ratio of the magnesium to the transition metal(s) is too low (e.g., greater than 90% transition metal(s), greater than 85% transition metal(s), or some other suitable value), the magnetic coupling between the free magnetic layers 110, 114 may be reduced.
In some embodiments, the first electrode layer 102 and the second electrode layer 118 comprise metals such as, for example, copper, aluminum, tungsten, ruthenium, or some other suitable materials. In some embodiments, the reference magnetic layer 106, the first free magnetic layer 110, and the second free magnetic layer 114 comprise ferromagnetic materials such as, for example, cobalt-iron-boron or some other suitable material. In some embodiments, the barrier layer 108 and the cap layer 116 comprise dielectric materials such as, for example, magnesium oxide or some other suitable material.
The first spacer film 202 is over the first free magnetic layer 110. The second spacer film 204 is over the first spacer film 202. The second free magnetic layer 114 is over the second spacer film 204. The first spacer film 202 comprises a first material and the second spacer film 204 comprises a second material, different than the first material.
In some embodiments, the first spacer film 202 comprises magnesium and the second spacer film 204 comprises a transition metal (e.g., tungsten, molybdenum, tantalum, hafnium, or the like). In some other embodiments, the first spacer film 202 comprises a transition metal (e.g., tungsten, molybdenum, tantalum, hafnium, or the like) and the second spacer film 204 comprises magnesium. In some other embodiments, the first spacer film 202 comprises magnesium and a first transition metal, and the second spacer film 204 comprises magnesium and a second transition metal, different than the first transition metal.
The third spacer film 302 is between the second spacer film 204 and the second free magnetic layer 114. The second spacer film 204 comprises a different material than the first spacer film 202 and the third spacer film 302. For example, first spacer film 202 comprises a first material, the second spacer film 204 comprises a second material, and the third spacer film 302 comprises a third material, where the second material is different from the first material and the third material. In some embodiments, the third material is the same as the first material.
In some embodiments, the first spacer film 202 comprises magnesium, the second spacer film 204 comprises a transition metal (e.g., tungsten, molybdenum, tantalum, hafnium, or the like), and the third spacer film 302 comprises magnesium. In some other embodiments, the first spacer film 202 comprises a transition metal, the second spacer film 204 comprises magnesium, and the third spacer film 302 comprises a transition metal. In some other embodiments, the first spacer film 202 comprises magnesium and a first transition metal, the second spacer film 204 comprises magnesium and a second transition metal, and the third spacer film 302 comprises magnesium and a third transition metal, where the second transition metal is different than the first transition metal and the third transition metal.
For example, a plurality of boron atoms 402 are within the first free magnetic layer 110 along the top surface of the first free magnetic layer 110 where the first free magnetic layer 110 borders the spacer layer 112. This region along the top surface of the first free magnetic layer 110 where the boron atoms 402 are accumulated may be referred to as a boron accumulation region 404. These atoms 402 may accumulate along the interface (e.g., at the accumulation region 404) due to being blocked at the interface by the spacer layer 112. In some embodiments, a concentration of boron atoms 402 in the first free magnetic layer 110 decreases as a distance from the interface between the first free magnetic layer 110 and the spacer layer 112.
In some embodiments, a plurality of boron atoms 402 are within the spacer layer 112. These atoms have diffused into the spacer layer 112 from the first free magnetic layer 110. In some embodiments, the concentration of boron atoms in the spacer layer 112 decreases as the distance from the first free magnetic layer 110 increases. Further, in some embodiments where the spacer layer 112 includes multiple spacer films (e.g., as illustrated in
In some embodiments (e.g., as illustrated in
In some embodiments (e.g., as illustrated in
In some embodiments, the transistor device 504 is a metal-oxide field effect transistor, a junction field effect transistor, a fin field effect transistor, a gate all-around field effect transistor, or some other suitable device. In some embodiments, source/drain region(s) may refer to a source or a drain, individually or collectively dependent upon the context. In some embodiments, the source line 512, the bit line 514, and the write word line 602 comprise metals (e.g., copper, tungsten, aluminum, or the like) or some other suitable material.
As shown in cross-sectional view 700 of
Further, a barrier layer 108 is deposited over the reference magnetic layer 106. In some embodiments, the barrier layer 108 comprises magnesium oxide or some other suitable material. In some embodiments, the barrier layer 108 is deposited by a CVD process, a PVD process, an ALD process, or some other suitable process.
Furthermore, a first free magnetic layer 110 is deposited over the barrier layer 108. In some embodiments, the first free magnetic layer 110 comprises cobalt-iron-boron or some other suitable material. In some embodiments, the first free magnetic layer 110 is deposited by a CVD process, a PVD process, an ALD process, or some other suitable process.
The spacer layer 112 is formed so that the atomic ratio of magnesium to the transition metal in the spacer layer 112 ranges from 10%-90%, from 15% to 80%, or some other suitable range. Further, spacer layer 112 is formed so that the thickness of the spacer layer 112 ranges from 5%-100% of the sum of the thickness of the first free magnetic layer 110 and the thickness of the second free magnetic layer 114, from 10%-90% of the sum, or some other suitable percentage of the sum. For example, in some embodiments, the thickness of the spacer layer 112 ranges from 0.1 nanometers to 1 nanometer, from 0.2 nanometers to 0.9 nanometers, or some other suitable range and the sum of the thickness of the first free magnetic layer 110 and the thickness of the second free magnetic layer 114 ranges from 1 nanometer to 2 nanometers, from 1.2 nanometers to 1.8 nanometers, or some other suitable range.
In some embodiments, multiple spacer films (e.g., first spacer film 202, second spacer film 204, and third spacer film 302 of
As shown in cross-sectional view 1100 of
A cap layer 116 is deposited over the second free magnetic layer 114. In some embodiments, the cap layer 116 comprises magnesium oxide or some other suitable material. In some embodiments, the cap layer 116 is deposited by a CVD process, a PVD process, an ALD process, or some other suitable process.
A second electrode layer 118 is deposited over the cap layer 116. In some embodiments, the second electrode layer 118 comprises copper, tungsten, aluminum, or some other suitable material. In some embodiments, the second electrode layer 118 is deposited by a CVD process, a PVD process, an ALD process, or some other suitable process.
As shown in cross-sectional view 1200 of
As shown in cross-sectional view 1300 of
In some embodiments, some boron atoms from the first free magnetic layer 110 diffuse out of the first free magnetic layer 110 during the formation of the metal interconnects 1304 (e.g., while the MTJ 104 is exposed to the high temperatures). By including the spacer layer 112 over the first free magnetic layer 110, the rate at which the boron diffuses out of the first free magnetic layer 110 can be reduced. In some embodiments, boron atoms are arranged within the spacer layer 112 after the BEOL interconnect formation as a result of diffusion. In some embodiments, boron atoms accumulate along the interface between the first free magnetic layer 110 and the spacer layer 112 during the BEOL formation (e.g., as illustrated in
In some embodiments, the data retention of the MTJ 104 after the exposure to high temperatures is substantially the same as before the exposure due to improved thermal stability provided by the spacer layer 112. For example, in some embodiments, the MTJ 104 has a first energy barrier (e.g., the amount of energy required to change the state of the MTJ from a parallel magnetic state to an anti-parallel magnetic state, or vice versa) before the forming of the BEOL interconnects 1304 and a second energy barrier after the forming of the BEOL interconnects 1304 (e.g., after the exposure to the high temperatures for the prolonged period of time), where the first energy barrier is approximately equal to the second energy barrier. In some embodiments, a difference between the first energy barrier and the second energy barrier is less than 10%, less than 5%, or some other suitable value. Thus, the spacer layer 112 can prevent reduction of the data retention of the MTJ 104 during the exposure to high temperatures.
At block 1402, form a magnetic tunnel junction over a substrate.
At block 1404, deposit a first electrode layer over the substrate.
At block 1406, deposit a reference magnetic layer over the first electrode layer.
At block 1408, deposit a barrier layer over the reference magnetic layer.
At block 1410, deposit a first free magnetic layer over the barrier layer.
At block 1412, deposit a spacer layer comprising magnesium and a transition metal over the first free magnetic layer.
At block 1414, deposit a second free magnetic layer over the spacer layer.
At block 1416, deposit a cap layer over the second free magnetic layer.
At block 1418, deposit a second electrode layer over the cap layer.
At block 1420, etch the second electrode layer, the cap layer, the second free magnetic layer, the spacer layer, the first free magnetic layer, the barrier layer, the reference magnetic layer, and the first electrode layer. The etching delimits the magnetic tunnel junction.
At block 1422, form a plurality of back-end-of-line metal interconnects over the magnetic tunnel junction. In some embodiments, the magnetic tunnel junction is exposed to high temperatures during the BEOL interconnect fabrication. Because the spacer layer improves the thermal stability of the magnetic tunnel junction, the magnetic tunnel junction is able to withstand the BEOL interconnect fabrication without suffering substantial performance degradation.
Thus, the present disclosure relates to a magnetic tunnel junction including a spacer layer and a method for forming the magnetic tunnel junction, the spacer layer comprising magnesium and a transition metal to reduce diffusion in the magnetic tunnel junction.
Accordingly, in some embodiments, the present disclosure relates to an integrated chip including a reference magnetic layer and a barrier layer over the reference magnetic layer. A first free magnetic layer is over the barrier layer. A second free magnetic layer is over the first free magnetic layer. A spacer layer is between the first free magnetic layer and the second free magnetic layer. The spacer layer includes magnesium and a transition metal. An atomic ratio of the magnesium to the transition metal ranges from 15% to 80%.
In other embodiments, the present disclosure relates to a method for forming an integrated chip. The method includes depositing a reference magnetic layer over a substrate. A barrier layer is deposited over the reference magnetic layer. A first free magnetic layer is deposited over the barrier layer. A spacer layer is deposited over the first free magnetic layer. The spacer layer includes magnesium and a transition metal. An atomic ratio of the magnesium to the transition metal ranges from 15% to 80%. A second free magnetic layer is deposited over the spacer layer.
In yet other embodiments, the present disclosure relates to a method for forming an integrated chip. The method includes forming a magnetic tunnel junction (MTJ) over a substrate. Forming the MTJ includes depositing a reference magnetic layer over the substrate. A barrier layer is deposited over the reference magnetic layer. A first free magnetic layer is deposited over the barrier layer. A spacer layer is deposited over the first free magnetic layer. The spacer layer includes magnesium and a transition metal. A second free magnetic layer is deposited over the spacer layer. The method further includes forming a plurality of metal interconnects over the MTJ. The MTJ has a first energy barrier before the forming of the metal interconnects and a second energy barrier after the forming of the metal interconnects. A difference between the first energy barrier and the second energy barrier is less than 10%.
The foregoing outlines features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.
