Claims
- 1. An apparatus for filtering snoops without stalling during an atomic operation, the apparatus comprising:a first request queue storing an entry for each cache access request, each entry of the first request queue including a first set of address bits and an atomic bit, the first set of address bits indicating a first cache address associated with the cache access request, the atomic bit indication whether the cache access request is associated with the atomic operation; a second request queue storing an entry for each snoop to be filtered, each entry of the second request queue including a second set of address bits, the second set of address bits indicating a second cache address associated with the snoop; a cache with a first port and a second port, the first port being a data-and-tag port dedicated to the first request queue and the second port being a tag-only port dedicated to the second request queue, the cache permitting simultaneous access by the first and the second port to a same address during a same clock cycle.
- 2. The apparatus of claim 1 wherein the first port of the cache is a read-write port.
- 3. The apparatus of claim 1 wherein the second port of the cache is a read-write port.
- 4. The apparatus of claim 1, includingan atomic address register for storing the first set of address bits from an entry of the first request queue corresponding to a cache access request when the atomic bit of the entry indicates that the cache access request is associated with the atomic operation.
- 5. A method of filtering snoops without stalling access to a cache of a processor implementing an atomic operation, the method comprising:during a first clock cycle receiving a first cache access request associated with a first cache address and a first snoop associated with a second cache address; determining whether the first cache access request is associated with the atomic operation; if the first cache access request is associated with the atomic operation setting a first set of address bits of an atomic address register to a value indicative of the first cache address; and filtering the first snoop during a second clock cycle in which the atomic operation is being executed.
- 6. The method of claim 5 wherein the second cache address of the first snoop is the same as the first cache address.
- 7. The method of claim 5 includingstoring the first cache access request as an entry in a first request queue; storing the first snoop as an entry in a second cache request queue; wherein the first request queue is coupled to a first port of the cache and the second request queue is coupled to a distinct, second port of the cache.
- 8. The method of claim 7, wherein each entry of the first request queue represents a respective cache access request and includes a first set of address bits and an atomic bit, the first set of address bits indicating a first cache address associated with the respective cache access request, the atomic bit indication whether the respective cache access request is associated with the atomic operation.
- 9. The method of claim 8, wherein each entry of the second request queue represents a respective snoop and includes a second set of address bits, the second set of address bits indicating a second cache address associated with the respective snoop.
- 10. The method of claim 9, wherein the first port is a data-and-tag port dedicated to the first request queue and the second port is a tag-only port dedicated to the second request queue, the method including permitting simultaneous access by the first and the second port to a same address during a same clock cycle.
- 11. The method of claim 7, wherein the first port is a data-and-tag port dedicated to the first request queue and the second port is a tag-only port dedicated to the second request queue, the method including permitting simultaneous access by the first and the second port to a same address during a same clock cycle.
CROSS REFERENCE TO RELATED APPLICATIONS
The present application is related to co-pending U.S. non-provisional patent application No. 09/513033, filed Feb. 25, 2000, entitled “Apparatus and Method for Preventing Cache Data Eviction During an Atomic Operation”.
US Referenced Citations (12)