MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT

Abstract

An object of the present invention is to provide a method of depositing yttrium-stabilized hafnia use for a DRAM capacitor insulating film while controlling the composition at a high accuracy by an atomic layer deposition method. The atomic deposition method is performed by introducing a hafnium compound precursor, introducing a yttrium compound precursor and introducing an oxidant as one cycle. In the atomic deposition method, the addition amount of yttrium into hafnia is controlled accurately by controlling the time of introducing the hafnium compound precursor and the yttrium compound precursor and controlling the replacement ratio of OH groups on a sample surface by each of the precursors.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

Preferred embodiments of the present invention will be described in details with reference to the drawings, wherein

FIG. 1 is a constitutional view of an apparatus necessary to achieve a deposition method according to the present invention;

FIG. 2 is a constitutional view of an apparatus necessary for deposition by an atomic layer deposition method;

FIG. 3 is a timing chart upon depositing by the atomic layer deposition method;

FIG. 4 is a model view for the arrangement of atoms on a sample surface upon deposition of alumina by an atomic layer deposition method;

FIG. 5 is a graph showing the dependence of an alumina deposition rate on the time of water introduction;

FIG. 6 is a graph showing the dependence of an alumina deposition rate on the time of water purge;

FIG. 7 is a graph showing the dependence of thickness-leak current density on deposition condition;

FIG. 8 is a timing chart upon deposition of yttrium-stabilized hafnia;

FIG. 9 is a model view for the arrangement of atoms on a sample surface upon deposition of yttrium-stabilized hafnia;

FIG. 10 is a graph showing a replacement ratio of OH groups on a sample surface by a hafnium compound precursor and an yttrium compound precursor for obtaining a desired yttrium addition amount;

FIG. 11 is a graph showing the optimal time of introduction of a hafnium compound precursor for controlling the yttrium addition amount to 10%;

FIG. 12 is a graph showing the optimal time of introduction of a yttrium compound precursor for controlling the yttrium addition amount to 10%;

FIG. 13 is a graph showing an optimal time of introduction of an oxidant;

FIG. 14 is a cross sectional view showing a portion in the vicinity of a DRAM memory cell;

FIG. 15 is a cross sectional view showing a portion in the vicinity of a DRAM memory cell;

FIG. 16 is a cross sectional view showing a portion in the vicinity of a DRAM memory cell;

FIG. 17 is a cross sectional view showing a portion in the vicinity of a DRAM memory cell;

FIG. 18 is a cross sectional view showing a portion in the vicinity of a DRAM memory cell;

FIG. 19 is a cross sectional view showing a portion in the vicinity of a DRAM memory cell;

FIG. 20 is a cross sectional view showing a portion in the vicinity of a DRAM memory cell;

FIG. 21 is a cross sectional view showing a portion in the vicinity of a DRAM memory cell;

FIG. 22 is a cross sectional view showing a portion in the vicinity of a DRAM memory cell;

FIG. 23 is a process chart of atomic layer deposition of yttrium-stabilized hafnia;

FIG. 24 is a graph showing the ratio of each deposition cycle for obtaining a desired yttrium addition amount;

FIG. 25 is a timing chart upon deposition of yttrium-stabilized hafnia;

FIG. 26 is a graph showing an optimal time of yttrium compound precursor introduction for controlling the yttrium stabilization amount to 10%;

FIG. 27 is a graph showing an optimal time of an oxidant introduction for controlling the yttrium stabilization amount to 10%;

FIG. 28 is a process chart upon atomic layer deposition of yttrium-stabilized hafnia;

FIG. 29 is a constitutional view of an apparatus for atomic layer deposition of yttrium-stabilized hafnia;

FIG. 30 is a graph showing an adsorption possibility ratio of an yttrium compound precursor and a hafnium compound precursor to adsorption sites on a sample surface for obtaining a desired yttrium stabilization amount;

FIG. 31 is a process chart upon atomic layer deposition of yttrium-stabilized hafnia;

FIG. 32 is a graph showing a composition ratio of elements in yttrium-stabilized hafnia except for oxygen for obtaining a desired yttrium stabilization amount; and

FIG. 33 is a view showing a ratio of yttrium film thickness to a hafnia film thickness for obtaining a desired yttrium stabilization amount.

Claims

1. A method of manufacturing a semiconductor integrated circuit device provided with a memory cell having an information storing capacitor formed above a semiconductor substrate, wherein the information storing capacitor has a lower electrode, an upper electrode, and an insulating film disposed between the lower electrode and the upper electrode,the insulating film comprises a first element, a second element, and oxygen,the insulating film is deposited by a method of alternately exposing a first precursor as a compound containing the first element, a second precursor as a compound containing the second element and an oxidant containing oxygen to a deposition surface, andan adsorption ratio of the first precursor to the adsorption site on the deposition surface is 100% or less and the second precursor is adsorbed to the remaining adsorption site in the step of exposing the first precursor to the sample.

2. A method of manufacturing a semiconductor integrated circuit device provided with a memory cell having an information storing capacitor formed above a semiconductor substrate, wherein the information storing capacitor has a lower electrode, an upper electrode, and an insulating film disposed between the lower electrode and the upper electrode,the insulating film comprises a third element, a fourth element, and oxygen,the insulating film is deposited by combining a first cycle of exposing a third precursor as a compound containing the third element to the deposition surface and then exposing an oxidant containing oxygen to the deposition surface, and a second cycle of exposing a fourth precursor as a compound containing the fourth element to the deposition surface and then exposing an oxidant containing oxygen to the deposition surface, andsubstantially all the adsorption sites on the deposition surface are replaced with the third precursor by exposing the third precursor to the deposition surface, and substantially the all adsorption sites on the deposition surface are replaced with the fourth precursor by exposing the fourth precursor to the deposition surface.

3. A method of manufacturing a semiconductor integrated circuit device provided with a memory cell having an information storing capacitor formed above a semiconductor substrate, wherein the information storing capacitor has a lower electrode, an upper electrode, and an insulating film disposed between the lower electrode and the upper electrode,the insulating film comprises a fifth element, a sixth element, and oxygen,the insulating film is deposited by repeating a third cycle of exposing a fifth precursor as a compound containing the fifth element and a sixth precursor as a compound containing the sixth element simultaneously on the deposition surface and then exposing an oxidant containing oxygen to the deposition surface, and100% or less of adsorption sites on the deposition surface is replaced with the fifth precursor by exposing the fifth precursor and the sixth precursor to the deposition surface, and the remaining adsorption sites are replaced with the sixth precursor.

4. A method of manufacturing a semiconductor integrated circuit device provided with a memory cell having an information storing capacitor formed above a semiconductor substrate, wherein the information storing capacitor has a lower electrode, an upper electrode and an insulating film disposed between the lower electrode and the upper electrode,the insulating film comprises a seventh element, an eighth element, and oxygen,the insulating film is deposited by combining a forth deposition cycle of exposing a seventh precursor containing the seventh element to a deposition surface and then exposing an oxidant containing oxygen to the deposition surface and a fifth deposition cycle of depositing the eighth element or an eighth oxide as the oxide of the eighth elements, andsubstantially all the adsorption sites on the deposition surface are replaced with the seventh precursor by exposing the seventh precursor to the deposition surface.