Claims
- 1. An electroplating system for semiconductor wafers comprising:a power supply having a negative terminal and a positive terminal; a semiconductor wafer electrically connected to the negative terminal; a plating bath holding a plating solution; an anode positioned in the plating solution and electrically connected to the positive terminal; a pump for creating a flow of plating solution generally in a direction from the anode towards the wafer; and a porous membrane positioned downstream from the anode in the flow of plating solution.
- 2. The electroplating system of claim 1 wherein the anode comprises a plurality of granules.
- 3. The electroplating system of claim 1 wherein the anode consists essentially of a single piece of material.
- 4. The electroplating system of claim 1 wherein the anode is a single piece of material.
- 5. The electroplating system of claim 3 or 4 wherein the anode is in the shape of a disk.
- 6. The electroplating system of claim 1 wherein the flow of plating solution is generally upward, the porous membrane being positioned above the anode.
- 7. The electroplating system of claim 1 wherein the porous membrane is fitted against a wall of the plating bath.
- 8. The electroplating system of claim 1 wherein the membrane has a porosity sufficient to allow ions from the anode to pass through the membrane.
- 9. The electroplating system of claim 1 wherein the membrane has a porosity sufficient to allow the plating solution to pass through the membrane.
- 10. The electroplating system of claim 1 wherein the membrane has a porosity sufficient to prevent particulates from the anode greater than one micron in size to pass through the membrane.
- 11. The electroplating system of claim 1 wherein the porous membrane is disk shaped.
- 12. The electroplating system of claim 1 wherein the anode comprises a plurality of apertures through which the plating solution passes.
- 13. The electroplating system of claim 1 comprising a nonconductive shield positioned downstream from the anode in the flow of plating solution, the shield comprising an annular member with an aperture having a diameter less than a diameter of the anode.
- 14. The electroplating system of claim 13 wherein the diameter of the aperture of the shield is less than a diameter of the wafer.
CROSS REFERENCE TO RELATED APPLICATION
This application is related to Patton et al., co-filed application Ser. No. 08/969,984, filed Nov. 13, 1997, now U.S. Pat. No. 6,156,167, Reid et al., co-filed application Ser. No. 08/969,267, filed Nov. 13, 1997, and now U.S. Pat. No. 6,179,983, and Contolini et al., co-filed application Ser. No. 08/970,120, filed Nov. 13, 1997, and now U.S. Pat. No. 6,159,354, all of which are incorporated herein by reference in their entirety.
This Application is a continuation of Ser. No. 08/969,196 filed Nov. 13, 1997, now U.S. Pat. No. 6,126,798.
US Referenced Citations (34)
Non-Patent Literature Citations (1)
Entry |
“Upside-Down Resist Coating of Semiconductor Wafers”, IBM Technical Disclosure Bulletin, vol. 32, No. 1, Jun. 1989, pp. 311-313. |
Continuations (1)
|
Number |
Date |
Country |
Parent |
08/969196 |
Nov 1997 |
US |
Child |
09/574666 |
|
US |