The present invention relates to a novel MEMS fixed capacitor with a gas-containing gap forming a dielectric layer, to an Integrated Circuit (IC) comprising at least one electric interconnection line embedding such a novel MEMS fixed capacitor, and to a process for manufacturing said MEMS fixed capacitor.
Capacitors are well known in the art and are implemented by inserting a dielectric insulator material between two metal electrodes. The quality of the dielectric material has a very strong impact on the quality factor (Q) of the capacitor. It is usual to find discrete capacitor products suitable for microwave operations with high quality factors as high as 100 or more. Such high values require however the use of very high quality dielectric films, which requires special and well controlled manufacturing process.
Micro-Elecro-Mechanical Systems (MEMS) capacitors are also well known and described for example in PCT application WO 2006/063257 and in U.S. Pat. No. 6,437,965.
In particular, a MEMS capacitor having a substantially fixed capacitance value, and referred therein as “MEMS fixed capacitor” is disclosed in PCT application WO 2006/063257. Said MEMS fixed capacitor (see notably
MEMS capacitor having a variable capacitance value are also known and disclosed for example in PCT application WO 2009/57988 and in American patent U.S. Pat. No. 6,437,965. The capacitor disclosed in U.S. Pat. No. 6,437,965 comprises a bottom capacitive electrode on a substrate and a movable bridge forming a top capacitive electrode suspended above the bottom capacitive electrode. Said bridge is deformable and movable between a lower position and an upper position under electric actuation forces, in order to provide high and low selectable capacitive values.
Such a MEMS capacitor having a variable capacitance value involves a thick air gap between the bottom and top capacitive electrodes at rest, and an upper capacitive electrode of small thickness in order to be easily bendable under electric actuation forces. MEMS capacitors having a variable capacitance value have inherently the following drawbacks:
dielectric stiction,
dielectric charging modifying the mechanical behavior of the MEMS,
mechanical fatigue,
self-actuation (or self-biasing) and self-maintaining (or latching),
low Con/Coff ratio (typically between 3 to 10),
low accuracy on the Con value due to the surface roughness,
large contact area.
An objective of the invention is to propose a novel MEMS fixed capacitor, i.e. a capacitor manufactured by using a MEMS process and having a substantially fixed capacitance value (i.e. having a top metal electrode that is substantially not deformable under electrostatic force attraction), and which can have a high capacitance density and a high quality factor.
Another objective of the invention is to propose a novel MEMS fixed capacitor that can be manufactured with a MEMS process making use of sacrificial layer(s).
This objective is achieved by the MEMS fixed capacitor of claim 1, which comprises a bottom metal electrode formed onto a substrate, a top metal electrode supported by metal pillars above the bottom metal electrode, and a gas-containing gap forming a non-solid dielectric layer between said top and bottom metal electrodes, wherein the distance (D) between the top and bottom metal electrodes (i.e. the thickness of the gas-containing gap) is not more than 1 μm and the thickness (E) of the top metal electrode is not less than 1 μm.
When a strong potential difference exists between the top and bottom electrodes, there is a risk that the top electrode can bend under the large electrostatic force attraction, thereby detrimentally modifying the capacitance value of the MEMS capacitor. This phenomenon increases obviously when the surface of the electrodes is enlarged, and also when the distance between the top and bottom electrodes is decreased.
The applicant has demonstrated that an increase of the distance between the top and bottom electrodes is detrimentally decreasing the capacitance density, but that a smaller distance between the top and bottom electrodes also detrimentally increases the deformability of the top electrode. In return, the applicant has demonstrated that the thickness of the top electrode does not substantially affect the capacitance density of the capacitor, and that a thicker top electrode is better for reducing the deformability of the top electrode. Within the scope of the invention, the use of a thicker top metal electrode (not less than 1 μm) combined with a smaller distance between the top and bottom metal electrodes (i.e. not more than 1 μm) enables to achieve a MEMS fixed capacitor which can advantageously have a high capacitance density, and whose top metal electrode is advantageously less easily deformable under electrostatic force attraction.
Furthermore the use in the invention of a gas-containing gap between the top and bottom electrodes, instead of a solid dielectric layer, and the use of a thicker top metal electrode, enable to achieve more easily, and at lower manufacturing costs, a capacitor having a high quality factor within a broad frequency range, and typically for low-frequency applications to multi-gigahertz frequency applications.
The deformability of the top electrode of the MEMS fixed capacitor of the invention can be defined by the following deformability parameter DEF:
DEF=ΔC/(V2·C0), wherein:
V is the value of a voltage applied between the top and bottom metal electrodes;
C0 is the capacitance value of the MEMS fixed capacitor with no voltage applied between the top and bottom metal electrodes;
ΔC is the variation of the capacitance value when a voltage V is applied between the top and bottom metal electrodes; ΔC=C1−C0, C1, being the capacitance value of the MEMS fixed capacitor when a voltage V is applied between the top and bottom metal electrodes.
In a preferred embodiment of the invention, the MEMS fixed capacitor is characterized by a deformability parameter DEF that is not more than 10−4 (i.e. ΔC/(V2·C0)≦10−4) for a voltage V ranging at least up to 45V, and more preferably at least up to 100V.
The invention also relates to an Integrated Circuit (IC) comprising at least one electric interconnection line embedding at least one MEMS fixed capacitor as defined above.
The invention further relates to a novel process for manufacturing a MEMS fixed capacitor, comprising the following steps:
(a) depositing a bottom metal layer onto a substrate;
(b) patterning the bottom metal layer in such a way to create at least one bottom metal electrode in the bottom layer;
(c) depositing a sacrificial layer onto the bottom layer and the substrate;
(d) patterning the sacrificial layer in such a way to create wells through the whole thickness of the sacrificial layer;
(e) filling the wells in the sacrificial layer with a metal in order to form supporting pillars;
(f) depositing at least one top metal layer onto the sacrificial layer;
(g) patterning the top metal layer(s) in order to form at least one top metal electrode;
(h) etching the sacrificial layer in order to remove the whole sacrificial layer and create the air gap between the top metal electrode and the bottom metal electrode.
In a first variant, aforesaid steps (e) and (f) are performed separately and successively. In another variant, aforesaid steps (e) and (f) are performed simultaneously by depositing the at least one top metal layer onto the sacrificial layer, in such a way to also fill the wells previously formed in the sacrificial layer.
A final drying step (i) which is already known per se, can be also performed after the etching step (h), by blowing a drying gas, such as for example supercritical CO2, or by practicing a marangoni effect, or by alcohol sublimation.
The characteristics and advantages of the invention will appear more clearly on reading the following detailed description which is made by way of non-exhaustive and non limiting examples, and with reference to the accompanying drawing on which:
In reference to the variant of
The MEMS fixed capacitor 1 comprises a top metal electrode 2 of constant thickness E, formed in the top metal layer L3, and a bottom metal electrode 3 formed in the bottom metal layer L1. The top electrode 2 is supported above the bottom electrode 3 only by metal pillars 5 that are not in contact with the bottom metal electrode 3. In this particular variant, the metal pillars 5 are formed in the intermediate metal layer L2.
An air gap 4 is provided between the top electrode 2 and bottom electrode 3. In this particular variant, the distance D between the top electrode 2 and bottom electrode 3 (i.e. thickness of the air gap 4) is constant over the whole surface of the electrodes.
In reference to
In reference to
The metallic layer L1, L2 and L3 can be made of any metal having high electric conductivity, like for example gold, aluminium, copper, or any electrically conductive alloy.
In the variant of
Simulations of the capacitance density (Capacitance_Density) and deformability (DEF) have been performed on different structures of MEMS fixed capacitor of the invention made of gold layers L1, L2, L3.
The parameter DEF for characterizing the deformability of the top electrode has already been previously defined. The capacitance density (Capacitance_Density) is given by the following formula:
Capacitance_Density=C/Stot, wherein:
C is the capacitance of the capacitor;
Stot is the total surface of the capacitor, including notably the pillars.
For sake of clarity, in reference to
In particular, the results of the simulations performed on the structure of
For each set of parameter the capacitance density (
For the graphs of
Within the scope of the invention, in order to achieve a MEMS fixed capacitor having a top electrode 2 that is advantageously substantially not deformable under electrostatic force attraction, the parameter DEF is preferably not more than 10−4 for voltage at least up to 45V, and even more preferably for voltage at least up to 100V.
More particularly, in order to achieve a MEMS fixed capacitor of high capacitance density and having a top electrode 2 that is advantageously substantially not deformable under electrostatic force attraction, the thickness E of the top electrode 2 is not less than 1 μm, and is preferably not less than 1.5 μm, and even more preferably not less than 2 μm; the distance D between the top and bottom electrodes 2, 3 is preferably not more than 1 μm, even more preferably not more than 0.4 μm, and is also preferably not less than 0.15 μm.
In the invention, the use of a gas-containing gap 4 between the top and bottom electrodes, instead of a solid dielectric layer, enables to achieve more easily, and at lower manufacturing costs, a capacitor having a high quality factor within a broad frequency range, and typically for low-frequency applications to multi-gigahertz frequency applications. In particular, with the invention it is for example possible to make fixed MEMS capacitor having a quality factor higher than 100, and even more higher than 1000, at very high frequencies, and typically at frequencies higher than 700 MHz, and even more preferably at frequencies higher than 2 GHz.
Within the scope of the invention, said gas-containing gap 4 can be gap containing a dielectric gas. Although air is preferred as dielectric gas for ease of manufacture, the invention is however not limited to an air gap, and gap 4 can be filled with any other dielectric gas, including for example nitrogen, argon. In a variant, the gap 4 can also contain a gas, and notably air, under partial vacuum.
The MEMS fixed capacitor 1 or 1′ of the invention can be manufactured easily and at low cost by performing the successive manufacturing steps that are going now to be described in reference to
A first layer (bottom layer) L1 of metal is deposited on a substrate S. The metal of layer L1 is for example gold and the substrate S is for example made of silicon.
The layer L1 is patterned in such a way to create interruptions 7 and at least one bottom electrode 3 in the bottom layer L1.
A sacrificial layer SL is deposited onto the bottom layer L1 and substrate S. This sacrificial layer SL can be for a monolayer, or can be a multilayer, and notably a bi-layer made of two superposed layers for example made of chrome ad silicon dioxide (SiO2) respectively. The sacrificial SL layer can also be made of metal such as for example copper, chrome, . . . . The sacrificial SL layer can also be made of any photosensitive resin used in microelectronics, such as for example PMGI (Polydimethylglutarimide), AZ1518, . . . .
The sacrificial layer SL is patterned in such a way to create wells through the whole thickness of the sacrificial layer SL. Said wells will be used afterwards for the building of the pillars 5 (and also for the building of the additional pillars 5′ in the variant of
A second metal deposition step (intermediate layer L2) is performed by electroplating, in order to fill the well W with a metal, like for example gold.
A third metal layer (for example a gold layer) is deposited onto the sacrificial layer SL, in order to form the top metal layer L3 covering the top surface of the sacrificial layer SL.
The top metal layer L3 is patterned in order to form the interruption 9 and the top metal electrode 2
A final releasing step is performed by etching the sacrificial layer SL in order to remove the whole sacrificial layer SL and create notably the air gap 4 between the top electrodes 2 and the bottom electrode 3.
A final drying step, which is already well known per se, can be also performed after the etching step 8/8, by blowing a drying gas, such as for example supercritical CO2, or by practicing a marangoni effect, or by alcohol sublimation.
In the variant of
In the variant of
In this variant, only two metal layers L1 and L3 are used and the pillars 5 are processed and formed simultaneously with the top electrode 2 and from the same metal layer L1.
Standard Integrated Circuit (IC) always comprises electric interconnection lines for connecting for example two electric functional circuits or elements, including for example capacitive or ohmic switches, inductances, ohmic resistances. Said interconnection lines can be for example a simple metal strip, a microstrip, a CoPlanar Waveguide (CPW), a stripline. Advantageously MEMS fixed capacitors 1 or 1′ of the invention can be easily embedded in the electric interconnection lines of a standard Integrated Circuit (IC) without increasing the IC's area. This smart use of the interconnection lines of an IC for a monolithic integration of MEMS fixed capacitors in the IC can be useful for example for making capacitor banks embedded in a standard IC or for adding capacitive functionalities to an IC.
In reference to
Number | Date | Country | Kind |
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12306326.5 | Oct 2012 | EP | regional |
Filing Document | Filing Date | Country | Kind |
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PCT/EP2013/072252 | 10/24/2013 | WO | 00 |