"Testing and Diagnosis of Interconnects Using Boundary Scan Architecture", A. Hassan, J. Rajski, and V. K. Agarwal, IEEE 1988 International Test Conference Paper 7.1, pp. 126-137 (1988). |
"Interconnect Testing with Boundary Scan, P. T. Wagner", IEEE 1987 International Test Conference, Paper 2.2, pp. 52-57 (1987). |
"Electronic Chip-In-Place Test", P. Goel and M. T. McMahon, 1982 IEEE Test Conference, Paper 3.6, pp. 83-89 (1982). |
IEEE P1149.1 Standard Test Access Port and Boundary Scan Architecture Standard Proposal (draft Jun. 20, 1989). |