Claims
- 1. A method for creating and transporting low-energy ions for use in plasma processing of a semiconductor wafer, the method comprising:
generating plasma from a gas species to produce a plasma exhaust for introduction into a processing chamber containing the wafer; enhancing the ion content of said plasma exhaust by activating a supplemental ion source, thereby creating a primary plasma discharge within said processing chamber; directing said primary plasma discharge into a baffle plate assembly; and generating a secondary plasma discharge from said baffle plate assembly, wherein ions in said secondary plasma discharge are subjected to an electric field determined by a floating potential of the wafer such that said ions are caused to bombard the wafer at an energy insufficient to cause damage to semiconductor devices formed on the wafer.
- 2. The method of claim 1, further comprising:
generating a first plasma density proximate a first electrode; and generating a second plasma density proximate a second electrode; wherein said second plasma density is greater than said first plasma density, and said second electrode has a surface area greater than a surface area of said first electrode.
- 3. The method of claim 2, wherein said generating said second plasma density further comprises configuring said baffle plate assembly so as to cause said secondary plasma discharge to comprise a plurality of micro-jets.
- 4. The method of claim 3, wherein:
said baffle plate assembly is configured to include an upper baffle plate and a lower baffle plate; and at least one of said upper and said lower baffle plates is further configured with a plurality of chamfered holes located therethrough.
- 5. The method of claim 4, wherein said chamfered holes further comprise a frustoconical section and a cylindrical section.
- 6. The method of claim 4, wherein said at least one of said upper and said lower baffle plates is configured to isolate the wafer from a sheath potential created by said primary plasma discharge.
- 7. The method of claim 4, further comprising configuring said at least one of said upper and said lower baffle plate as said second electrode.
- 8. The method of claim 4, wherein said at least one of said upper and said lower baffle plates comprises one of quartz, sapphire, ceramic or sapphire-coated quartz.
- 9. The method of claim 4, wherein said at least one of said upper and said lower baffle plates is comprised of a conductive material.
- 10. The method of claim 9, wherein said conductive material is coated with a dielectric and wherein said conductive material is grounded.
- 11. The method of claim 10, wherein said dielectric is anodized aluminum.
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] The present application is a divisional application of application Ser. No. 09/905,043, filed Jul. 31, 2001, which is a continuation in part of application Ser. No. 09/828,055, filed on Apr. 6, 2001, the disclosures of which are incorporated by reference herein in their entirety.
Divisions (1)
|
Number |
Date |
Country |
Parent |
09905043 |
Jul 2001 |
US |
Child |
10752906 |
Jan 2004 |
US |
Continuation in Parts (1)
|
Number |
Date |
Country |
Parent |
09828055 |
Apr 2001 |
US |
Child |
09905043 |
Jul 2001 |
US |