The present invention generally relates to method and apparatus for testing a device, in particular to method and apparatus for testing a semiconductor device, such as a wafer, with a preheating element.
In recent years, Integrated circuits (ICs) are manufactured and tested in a wafer before being diced from the wafer and mounted in packages, modules, or directly on a printed circuit board. Wafer level IC testing is a critical part of the IC manufacturing process that identifies the ICs to judge if the ICs function properly and provides feedback for improving product design and reducing manufacturing cost. Wafer level IC testing also prevents non-functioning ICs from going through the cost of packaging and in some applications can be used for stress testing or burn-in testing at high temperature to screen ICs to assure long-term reliability.
In the conventional wafer level IC testing, probe cards are used to provide an electrical path between a test device and the pads on integrated circuits in wafer form. The probe cards generally have electrical contact points (pogo pins) that match the size and density of the electrical pads on an IC and conductive patterns that provide an output of electrical signals from these high-density probes to the IC test device. The probe card is typically held in place above of the wafer, for moving the wafer into position to make an electrical connection between the IC pads and the probe tips of the probe card.
The semiconductor industry's growth has been driven by delivering smaller, more complex ICs, which requires the number of interconnect pads on each IC to increase while the size of each pad shrinks. Also, to reduce the cost of wafer testing IC manufacturers are testing a larger number of ICs at the same time. This higher parallelism improves the IC test device utilization and reduces the total wafer test time and thus reduces the overall cost of tests. The industry has introduced probe cards that can contact all of the ICs on a popular 300 mm wafer. These types of single touchdown memory probe cards may have up to 60,000 pins. These high pin count probe cards can require 2-5 grams of force for each probe to make contact during testing. This means that the probe card can exert a force of up to 300 Kg on the probe causing both the probe and the probe card to deflect and change the position of where the probes contact the IC pads. The traditional test devices for integrated circuit probe cards evolved from testing needle probe cards where there was a requirement to stop IC testing when yields dropped to analyze and adjust the needle's position and then go back to IC testing. The probe cards consist of an array of resilient conductors or wires terminating in an array of respective probe pins. The wires forming the array of probe points are mounted on a printed circuit board, and the probe points are positioned so that they are precisely aligned with the integrated circuit's bonding pads. A different probe card is generally used for each type of integrated circuit since the bonding pad patterns vary with each integrated circuit. During use, an integrated circuit is positioned below the probe array, with the probe pins aligned with respective bonding pads. The wafer and probe array are then brought together so that the probe pins slightly deflect as they make contact with their respective bonding pads. The electrical stimulus and the responses to the electrical stimulus are conducted through the probe card wired to suitable electronic testing devices. The probe card and the IC are then separated, and the probe pins are aligned with another IC on the wafer to repeat the test until all of the ICs on the wafer have been tested.
Refer to
The disadvantages of using the prior art's method is a time-consuming process, and after a device is tested completely, the test carrier has to move away to replace the device to be tested with a new device to test carrier. It will be led to that the probe card becomes cooler and needs to be heated to a working temperature again before new testing begins.
An objective of the present invention is to provide method and apparatus for testing semiconductor devices with preheating, which heating a probe card and a plurality of pogo pins prior to installation for testing and heating the probe card to first default temperature, deforming the probe card and maintaining the temperature of the probe card during the testing process, for reducing the consumed time to heat the probe card again.
For above objective, the present invention discloses a method for testing a semiconductor device of the present invention comprising the steps of using a first heater to heat a probe card and a second heater to heat a device to be tested, and testing the device to be tested by electrically connecting a plurality of pogo pins of the probe card to the device to be tested; wherein the first heater and the second heater being at least a direct current heater or a hot air heater.
According to an embodiment of the present invention, wherein the first heater heats the probe card with half a temperature±10 DC of an actual temperature of the second heater.
According to an embodiment of the present invention, wherein the first heater and the second heater are direct current heater, hot air heater or combination thereof.
The present invention discloses a method for testing a semiconductor device comprising the steps of controlling a first heater to heat a probe card to a first default temperature and a second heater to heat an element to be tested to a second default temperature individually by a controller, testing the device to be tested by a plurality of pogo pins of the probe card electrically connecting to the device to be tested.
According to an embodiment of the present invention, wherein the first heater heats the probe card with half a temperature±10° C. of an actual temperature of the second heater.
According to an embodiment of the present invention, wherein the first heater and the second heater are direct current heater, hot air heater or combination thereof.
The present invention discloses a method for testing a semiconductor device comprising the steps of installing a first heater on a probe carrier placed underneath a probe card and heating the probe card to a first default temperature and stabilizing the deformation of the probe card during testing, wherein the probe card including a plurality of pogo pins. The method further including placing a device to be tested on a test carrier and heating the test carrier to a second default temperature and electrically connecting the plurality of pogo pins of the probe card to the test carrier for providing an electrical path between an electronic test device and the device to be tested to perform the testing, moving the test carrier away from a bottom of the probe card after completing the testing and replacing a new element to be tested while the first heater maintains the first default temperature.
According to an embodiment of the present invention, wherein the movement of said test carrier during the testing said probe card remains stable.
According to an embodiment of the present invention, wherein the first heater is a direct current heater or a hot air heater, and the test carrier further installed with a direct current heater or a hot air heater.
According to an embodiment of the present invention, after completely testing said first device to be tested, during the process of replacing said new element to be tested and beyond, the deformation of said probe card remains.
According to an embodiment of the present invention, wherein the first heater heats said probe card with half a temperature±10° C. of an actual temperature of a second heater disposed in the test carrier.
According to an embodiment of the present invention, wherein the first heater transfers heat to said probe card and the probe card transfer the heat to the plurality of pogo pins which eventually deformed said probe card.
The present invention discloses an apparatus for testing a semiconductor device of the present invention, comprising an electronic test device including a probe card having a plurality of pogo pins disposed under the electronic test device, and deposed a first heater underneath the probe card for heating the probe card to a first default temperature before testing and stabilizing the deformation of the probe card during testing; and a test carrier, carrying a device to be tested and being heated to a second default temperature.
According to an embodiment of the present invention, the apparatus for testing a semiconductor device of the present invention further comprising a controller device coupled to sense the temperatures of said probe card and said second test carrier and perform actions to regulate their temperatures at a default level.
According to an embodiment of the present invention, the apparatus for testing a semiconductor device of the present invention further comprising a second heater disposed in the test carrier to heat the test carrier to the second default temperature.
The present invention discloses an apparatus for testing a semiconductor device, comprising an electronic test device including a probe card having a plurality of pogo pins disposed under the electronic test device, and carrying a first heater underneath the probe card for heating the probe card to a first default temperature before testing and stabilizing the deformation of the probe card during testing; and a test carrier, carrying a device to be tested and being heated to a second default temperature.
According to an embodiment of the present invention, the apparatus further comprising a controller device coupled to sense the temperatures of the probe card and the test carrier and perform actions to regulate their temperatures at a default level.
According to an embodiment of the present invention, the apparatus further comprising a second heater disposed in the test carrier to heat the test carrier to the second default temperature.
According to an embodiment of the present invention, wherein the probe card is deformed due to a high-temperature state of the first heater and the test carrier.
This specification describes exemplary embodiments and applications of the invention. The invention, however, is not limited to these exemplary embodiments and applications or to the manner in which the exemplary embodiments and applications operate or are described herein. In addition, as the terms “on” and “attached to are used herein, one object (e.g., a material, a layer, a Substrate, etc.) can be “on” or “attached to another object regardless of whether the one object is directly on or attached to the other object or there are one or more intervening objects between the one object and the other object. Also, directions (e.g., above, below, top, bottom, side, up, down, “X.” “Y.” “Z. etc.), if provided, are relative and provided solely by way of example and for ease of illustration and discussion and not by way of limitation. In addition, where reference is made to a list of elements (e.g., elements A, B, C). Such reference is intended to include any one or more of the listed elements by itself or in any combination.
The conventional test process is directed to an test carrier stage and determined that it is easier to properly position a wafer on the test carrier, together with the desired theta orientation of the wafer with respect to the test carrier, when the carrier stage is extended at least partially outside of the chamber. Unfortunately, in the event that the test carrier is heated or cooled, such as to 300 degrees Celsius or cooled significantly below ambient temperature, placing an ambient temperature wafer on the carrier tends to result in damage to the devices on the wafer or otherwise results in fracturing the wafer itself. In either case, the wafer is susceptible to becoming damaged. In some cases, the user could manually hold the wafer on a wafer holder in the vicinity of the test carrier until the wafer is sufficiently heated, but this is difficult at best, for the user to accomplish. Further, it is difficult to achieve similar such temperatures using a wafer holder because of the insulating effect of the wafer holder and the distance of the wafer from the surface of the test carrier. Also, the user has a tendency to accidentally touch the surface of the carrier with his hand, thus resulting in painful burning or freezing of his hand. In addition, even with a test carrier at ambient temperature the wafer is typically placed on the upper surface of the carrier using a motion that is at an acute angle to the upper surface of the carrier, and accordingly, the wafer tends to slide across the carrier surface thus coming to rest at a non-desirable location, if it remains on the chuck at all. The probe card must be designed to compensate for any mechanical movement due to heating of the wafer from the power generated by integrated circuits or by the prober performing high-temperature testing as a reliability screen. The flexing or bending of the probe card under the force applied by the prober during testing must be limited, otherwise, the probe tips will not stay in electrical contact with the IC pads. The probe card must maintain low contact resistance, consistent probe force, and alignment during its operating life.
Refer to
As shown in
Continuously, As shown in
As shown in Table 1, when the actual temperature of the test carrier is 85° C., the actual temperature set on the first heater 40 to heat the probe card 20 would be balanced to only about 32.5° C.˜52.5° C., when the actual temperature of the test carrier 30 is 100° C., the actual temperature set on the first heater 40 to heat the probe card 20 would be higher to only about 40° C.˜60° C., and so and so forth. Thus, the first heater heats the probe card with half a temperature±10° C. of an actual temperature of the second heater 34. As a result of the movement of the test carrier 30 during the testing, the probe card 20 of the present invention will remain stable.
Referring to
During the testing process, the probe card 20 having the plurality of pogo pins 22 attached underneath the electronic test device 10 and the test carrier 30 carrying the device to be tested 32. After the first heater 40 heats the probe card 20 and the second heater 34 heats the device to be tested 32. The test carrier 30 is moved to the bottom of the probe card 20, then the electronic test device 10 with the probe card 20 moves down allowing the plurality of pogo pins 22 contacting with the device to be tested 32 on top of the test carrier 30 to conduct the testing.
During the testing process, the probe card 20 having the plurality of pogo pins 22 attached underneath the electronic test device 10 and the test carrier 30 carrying the device to be tested 32. After the first heater 40 heats the probe card 20 and the second heater 34 heats the device to be tested 32. The test carrier 30 is moved to the bottom of the probe card 20, then the electronic test device 10 with the probe card 20 moves down allowing the plurality of pogo pins 22 contacting with the device to be tested 32 on top of the test carrier 30 to conduct the testing.
Refer to
During the testing process, the probe card 20 having the plurality of pogo pins 22 attached underneath the electronic test device 10 and the test carrier 30 carrying the device to be tested 32. After the first heater 40 heats the probe card 20 and the second heater 34 heats the device to be tested 32. The test carrier 30 is moved to the bottom of the probe card 20, then the electronic test device 10 with the probe card 20 moves down allowing the plurality of pogo pins 22 contacting with the device to be tested 32 on top of the test carrier 30 to conduct the testing.
Refer to
During the testing process, the probe card 20 having the plurality of pogo pins 22 attached underneath the electronic test device 10 and the test carrier 30 carrying the device to be tested 32. After the first heater 40 heats the probe card 20 and the second heater 34 heats the device to be tested 32. The test carrier 30 is moved to the bottom of the probe card 20, then the electronic test device 10 with the probe card 20 moves down allowing the plurality of pogo pins 22 contacting with the device to be tested 32 on top of the test carrier 30 to conduct the testing.
Number | Date | Country | |
---|---|---|---|
62774941 | Dec 2018 | US |