Claims
- 1. A method of testing a system board having an area of interest, comprising:
removing a cover to provide access to the area of interest on said system board; positioning a pattern plate having a plurality of guide holes therethrough relative to the area of interest, said pattern plate comprised of an insulating material; inserting through a desired said guide hole of said pattern plate a signal probe to provide an electrical connection with a first signal at the area of interest; inserting through another desired said guide hole of said pattern plate a ground probe to provide an electrical connection with a ground at the area of interest, said ground probe being electrically coupled with said signal probe to provide a return ground path; connecting said signal probe to an external device for testing of said first signal; and replacing said cover to prohibit access to the area of interest on said system board.
Parent Case Info
[0001] This application is a divisional of U.S. patent application Ser. No. 09/527,577, filed Mar. 16, 2000, which was a divisional of U.S. patent application Ser. No. 09/143,228, filed Aug. 28, 1998, entitled “Method and Apparatus of Interconnecting With a System Board”, the entirety of which is hereby incorporated by reference.
Divisions (2)
|
Number |
Date |
Country |
Parent |
09527577 |
Mar 2000 |
US |
Child |
10199392 |
Jul 2002 |
US |
Parent |
09143228 |
Aug 1998 |
US |
Child |
09527577 |
Mar 2000 |
US |