METHOD FOR FABRICATING CMOS IMAGE SENSOR

Abstract

There is provided a method of manufacturing a CMOS image sensor, in which an anti-reflection coating layer is additionally formed on a pad electrode so that it is possible to prevent the pad electrode from being corroded by development solution of a sequential photolithography process and to bond an external driving circuit and the pad electrode to each other without defect.

Description

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is an equivalent circuit diagram of a 3T-type CMOS image sensor;

FIG. 2 is a layout diagram illustrating a unit pixel of the 3T-type CMOS image sensor;

FIGS. 3A to 3C are sectional views illustrating a method of manufacturing a CMOS image sensor;

FIGS. 4A and 4B are photographs illustrating corrosion of semiconductor elements; and

FIGS. 5A to 5C are sectional views illustrating processes of a method of manufacturing a CMOS image sensor according to embodiments.

Claims

1. A method of manufacturing a CMOS image sensor, the method comprising: providing a semiconductor substrate divided into a pixel array area and a logic circuit area;forming interconnections over the semiconductor substrate;forming an interlayer insulating layer over an entire surface of the semiconductor substrate including the interconnections;depositing a metal layer and an anti-reflection coating layer over the interlayer insulating layer and patterning the deposited metal layer and anti-reflection coating layer to form a pad electrode;forming a protective layer over the entire surface including the pad electrode;selectively removing the protective layer over the pad electrode to form a via hole;forming a color filter layer over the protective layer;forming a planarization layer for covering the color filter layer;forming micro lenses corresponding to the color filter layer over the planarization layer; andremoving the anti-reflection coating layer over the pad electrode exposed through the via hole.

2. The method of claim 1, wherein the color filter layer, the planarization layer, and the micro lenses are formed only in the pixel array area.

3. The method of claim 1, wherein the color filter layer, the planarization layer, and the micro lenses are patterned through a photolithographic process.

4. The method of claim 1, wherein the pad electrode is formed in a logic circuit area.

5. The method of claim 1, wherein the metal layer comprises aluminum.

6. The method of claim 1, wherein the anti-reflection coating layer comprises one of the group including SiN or SiON.

7. The method of claim 1, wherein the anti-reflection coating layer has a thickness between 50 Å and 1,000 Å.

8. The method of claim 1, the step of removing the anti-reflection coating layer over the pad electrode exposed through the via hole is performed by a reactive ion etch (RIE) method.

9. The method of claim 1, the step of removing the anti-reflection coating layer over the pad electrode exposed through the via hole is performed by a chemical dry etching method.

10. The method of claim 1, wherein an external driving circuit is bonded to the pad electrode through a via hole from which the anti-reflection coating layer is removed.