This application claims the benefit of Korean Patent Application No. 10-2004-0114843, filed on Dec. 29, 2004, which is hereby incorporated by reference for all purposes as if fully set forth herein.
1. Field of the Invention
The present invention relates to a method for forming an isolation region in a semiconductor device, and more particularly, to a method for forming an isolation region in a semiconductor device, suitable to effect electrical isolation between adjacent photodiodes in an image sensor.
2. Discussion of the Related Art
A highly integrated semiconductor device, e.g., a CMOS image sensor, can be used to convert an optical signal into an electrical signal output using an array of active devices, e.g., photodiodes, for forming an optical image based on an incident light signal. Arrays arranged to be increasingly more dense result in increased device integration, that is, the number of pixel units on a single substrate or the number of photodiodes per pixel is increased. Thus, the distance between photodiodes is reduced. Shallow trench isolation (STI) technology is used to minimize the negative effects of such integration, such as, electrical interference experienced by adjacent photodiodes.
Referring to
The above-mentioned high-temperature processes, however, reduce a pinning effect in the photodiodes, which are to be formed between isolation regions of the substrate 11. The pinning effect is reduced due to diffusion of impurity ions in the substrate. In addition, interface defects occurring at a junction of the substrate 11 and isolation region degrade the electrical characteristics of the photodiode by increasing leakage current.
Accordingly, the present invention is directed to a method for forming an isolation region in a semiconductor device that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An advantage of the present invention is to provide a method for forming an isolation region in a semiconductor device which can maximize a pinning effect of a semiconductor device formed between isolation regions of a substrate.
Another advantage of the present invention is to provide a method for forming an isolation region in a semiconductor device which can minimize a leakage current caused by defects occurring at a junction of a substrate and isolation region.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the method particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, there is provided a method for forming an isolation region in a semiconductor device. The method comprises forming a trench region in a substrate; forming an ion injection layer by injecting impurity ions into an inner sidewall of the trench region; and forming an isolation region for a semiconductor device by filling the trench region with an undoped silicate glass film interposing the ion injection layer.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiment(s) of the invention and together with the description serve to explain the principles of the invention. In the drawings:
Reference will now be made in detail to embodiment(s) of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, like reference designations will be used throughout the drawings to refer to the same or similar parts.
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Meanwhile, the reactive ion etching for forming the trench region T generates specific surface characteristics and a lattice structure of a surface of the substrate 21. Such etching defects can be restored, as in the related art method, by the high temperature thermal oxidation applied in forming the thermal oxide film 12 (see
By adopting the method of the present invention, in which depletion layers are formed at boundary regions between the N-type regions of the photodiode and the P-type ion injection layer and between the N-type regions of the photodiode and the P-type semiconductor substrate, leakage current can be minimized by eliminating interface defects that may occur between the isolation region and the substrate. Thus, the electrical characteristics of a semiconductor device are enhanced. Moreover, an application of low-temperature processes prevents impurity ions in the substrate from diffusing undesirably, thus, maximizing the pinning effect of the semiconductor device.
It will be apparent to those skilled in the art that various modifications and variation can be made in the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.
Number | Date | Country | Kind |
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2004-0114843 | Dec 2004 | KR | national |