The priority of Korean patent application No. 10-2010-0057505 filed on 17 Jun. 2010, the disclosure of which is hereby incorporated in its entirety by reference, is claimed.
Embodiments of the present invention relate to a method for forming a pattern of a semiconductor device, and more particularly to a method for forming a pattern of a semiconductor device using a method for forming a contact hole using Spacer Patterning Technology (SPT).
Although an entire chip area is increased in proportion to an increase in memory capacity as a semiconductor device is becoming super miniaturized and highly integrated, the area of a cell area where patterns of a semiconductor device are actually formed is decreased.
Accordingly, since a greater number of patterns should be formed in a limited cell area in order to achieve a desired memory capacity, the size of such pattern, for example, the critical dimension (CD) or spacing between patterns, is being gradually decreased. Such microscopic patterns are formed by a photolithography process.
In the photolithography process, a photoresist layer is deposited over a substrate, an exposure process is performed using a laser beam having a wavelength of 365 nm, 248 nm (KrF), 193 nm (ArF) or 153 nm and an exposure mask on which a circuit pattern is drawn, and a development process is finally performed to form a pattern.
Increases in the degree of integration of semiconductor devices necessitate a reduction in design rules, causing the pitch size of patterns of the semiconductor device to be increasingly reduced. However, photographic devices capable of forming such patterns generally have a limited resolution, so that it is difficult to form patterns having a microscopic (or fine) pitch. In particular, in order to form patterns having a microscopic pitch, a pattern mask should be used several times, and fabrication of the pattern mask is also complicated, so that there are limitations in forming a microscopic pattern. For example, since the pattern mask is used multiple times, it is difficult to solve the problem of misaligning a mask, a semiconductor device is unexpectedly contaminated in each fabrication process.
In conclusion, a method for simplifying a fabrication process and at the same time forming a microscopic pattern such as a contact hole is needed.
Various embodiments of the present invention are directed to providing a method for forming a pattern of a semiconductor device that substantially obviates one or more problems due to limitations and disadvantages of the conventional art.
An object of the present invention is to provide a method for forming a pattern of a semiconductor device using a method for forming a contact hole using a Spacer Patterning Technology (SPT).
In accordance with an aspect of the present invention, In accordance with an aspect of the present invention, A method for forming a pattern of a semiconductor device comprising: forming a photoresist film pattern over an underlying layer and a hard mask layer; forming a plurality of first spacers over sidewalls of the photoresist film pattern; removing the photoresist film; forming a sacrificial film pattern between the first spacers; removing the first spacers after forming the sacrificial film pattern; forming a plurality of second spacers over sidewalls of the sacrificial film pattern; removing the sacrificial film; and etching the hard mask layer using the second spacers as an etch mask.
The photoresist film pattern may be a pillar pattern. Forming of the photoresist film pattern may be performed through a single patterning using a single exposure mask or a double exposure process using a line/space mask.
Forming of the photoresist film pattern may include forming a hard mask layer and a photoresist film over the underlying layer to be etched; performing pillar patterning using an exposure mask on the photoresist film, forming a first pillar pattern having critical dimension (CD) grater than a target CD; and trimming the first pillar pattern to change the CD to the target CD.
The method may further include forming a Bottom Anti Reflection Coating (BARC) film between the photoresist film pattern and the underlying layer including the hard mask layer. The first spacers are formed to be in contact with one another in a first direction. The first spacers are formed to be spaced apart from one in a second direction. The first direction is diagonal to the second direction.
The region between the first spacers, the region between the first spacers may include a region the sidewalls of first spacers. The first spacer and the second spacer are formed using any one of a nitride film, an oxide film, or a combination thereof.
The forming of the first spacer and the second spacer may be performed through an Atomic Layer Deposition (ALD) process. The ALD process may be performed at a temperature of about 0° C.˜ about 200° C.
The hard mask layer may be configured in a stacked structure of an amorphous carbon (a-carbon) layer and a silicon oxide nitride (SiON) film. The forming of the sacrificial film may include forming a polysilicon layer over the hard mask layer including the first spacer; and planarizing the hard mask layer until the first spacer is exposed. The polysilicon layer may be formed at a temperature of about 300˜ about 500° C. The etching of the underlying layer may include forming a hard mask layer pattern by etching the hard mask layer; and etching the underlying layer using the hard mask layer pattern as a mask, and forming a contact hole pattern.
The second spacers are formed to be in contact with one another in a first direction. The second spacers may be formed to be spaced apart from one another in a second direction.
The first direction is diagonal to the second. A contact hole pattern region may be defined by a space between the second spacers.
A method for forming a pattern of a semiconductor device comprising: providing a semiconductor substrate having a target etch layer thereover; forming pillar patterns over the target etch layer, the pillar patterns being arranged in a diamond format; forming a first spacer over a sidewall of each of the pillar patterns so as to generate a first trench at the center of the diamond format; removing the pillar patterns to form a second trench at each vertex of the diamond format; providing sacrificial material into the first and the second trenches to form sacrificial film patterns, the sacrificial film patterns being arranged in a square format; removing the first spacers after forming the sacrificial film patterns; forming a second spacer over a sidewall of the sacrificial film pattern; removing the sacrificial film pattern after forming the second spacer; and etching the target etch layer layer using the second spacer as an etch mask.
A diagonal length of the square defined by the sacrificial film patterns is shorter than a diagonal length of the diamond defined by the pillar patterns. The length of one side of the square formed of the sacrificial film patterns is half a diagonal length of the diamond formed of the pillar patterns, wherein the width of the second spacer is half a width of the sacrificial film pattern. The pillar pattern is formed to have a first dimension, the second spacer is formed to have a second dimension smaller than the first dimension, and the sacrificial film pattern is formed to have a size smaller than the first dimension.
Reference will now be made in detail to the embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts. A semiconductor device and a method for manufacturing the same according to the present invention will hereinafter be described with reference to the accompanying drawings.
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In addition, if a Critical Dimension (CD) of the photoresist film pattern 115 is too small, patterns may collapse during the pattern forming. In order to prevent the collapse of patterns, a CD of the photoresist film pattern 115 is formed to be larger than a target CD, and the pattern may be subsequently reduced through a trimming process
The hard mask layer 110 may be a stacked structure of an amorphous carbon (a-carbon) and a silicon oxide nitride (SiON) film. A Bottom Anti Reflection Coating (BARC) layer (not shown) may be formed at the bottom of the photoresist film (not shown). If the BARC layer is formed at the bottom of the photoresist film pattern 115, a process for etching the BARC layer may be carried out using the photoresist film pattern 115 before a spacer layer is formed.
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Afterwards, an etch-back process is performed until the sacrificial film pattern 125a is exposed, so that second spacers 130 are formed over sidewalls of the sacrificial film pattern 125a. In this case, as shown in
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As apparent from the above description, a method for forming a pattern of a semiconductor device according to the embodiment of the present invention can form a microscopic hole pattern or pillar pattern through only one photographic process, resulting in a reduction in production costs of the semiconductor device.
The above embodiments of the present invention are illustrative and not limitative. Various alternatives and equivalents are possible. The invention is not limited by the type of deposition, etching polishing, and patterning steps described herein. Nor is the invention limited to any specific type of semiconductor device. For example, the present invention may be implemented in a dynamic random access memory (DRAM) device or a nonvolatile memory device. Other additions, subtractions, or modifications are obvious in view of the present disclosure and are intended to fall within the scope of the appended claims.
Number | Date | Country | Kind |
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10-2010-0057505 | Jun 2010 | KR | national |