Patent Grant
12052829
The present invention relates in general to functional, integrated structures, such as electronic (multilayer) assemblies, and methods for manufacturing thereof. In particular, however, not exclusively, the present invention concerns electrical nodes, and methods for manufacturing thereof, for implementing functionality or functionalities in such structures or assemblies including, for example, a molded, optionally injection molded, material layer.
There exists a variety of different stacked assemblies and structures in the context of electronics and electronic products. The motivation behind the integration of electronics and related products may be as diverse as the related use contexts. Relatively often size savings, weight savings, cost savings, or just efficient integration of components is sought for when the resulting solution ultimately exhibits a multilayer nature. In turn, the associated use scenarios may relate to product packages or food casings, visual design of device housings, wearable electronics, personal electronic devices, displays, detectors or sensors, vehicle interiors, antennae, labels, vehicle electronics, etc.
Electronics such as electronic components, ICs (integrated circuit), and conductors, may be generally provided onto a substrate element by a plurality of different techniques. For example, ready-made electronics such as various surface mount devices (SMD) may be mounted on a substrate surface that ultimately forms an inner or outer interface layer of a multilayer structure. Additionally, technologies falling under the term “printed electronics” may be applied to actually produce electronics directly and additively to the associated substrate. The term “printed” refers in this context to various printing techniques capable of producing electronics/electrical elements from the printed matter, including but not limited to screen printing, flexography, and inkjet printing, through a substantially additive printing process. The used substrates may be flexible and printed materials organic, which is however, not always the case.
Furthermore, the concept of injection molded structural electronics (IMSE) involves building functional devices and parts therefor in the form of a multilayer structure, which encapsulates electronic functionality as seamlessly as possible. Characteristic to IMSE is also that the electronics is commonly manufactured into a true 3D (non-planar) form in accordance with the 3D models of the overall target product, part or generally design. To achieve desired 3D layout of electronics on a 3D substrate and in the associated end product, the electronics may be still provided on an initially planar substrate, such as a film, using two dimensional (2D) methods of electronics assembly, whereupon the substrate, already accommodating the electronics, may be formed into a desired three-dimensional, i.e. 3D, shape and subjected to overmolding, for ex-ample, by suitable plastic material that covers and embeds the underlying elements such as electronics, thus protecting and potentially hiding the elements from the environment.
In typical solutions, electrical circuits have been produced on a printed circuit board (PCB) or a on substrate film, after which they have been overmolded by plastic material. Known structures and methods have, however, some drawbacks, still depending on the associated use scenario. In order to produce an electronic assembly having one or more functionalities, typically rather complex electrical circuits for achieving these functionalities have to be produced on a substrate by printing and/or utilizing SMDs, and then be overmolded by plastic material.
However, in the known solutions, the implementation of complex functionalities may face reliability risks and assembly yield related issues arising from challenges in integrating very dense components and components with complex geometries. Furthermore, the electronic assembly may require, for example, the use of external control electronics which reduces degree of integration and makes the structures less attractive. Directly integrating a possibly large number of dense components and components of complex geometry onto a potentially considerable larger substrate can be challenging and potentially very risky, as reliability will often be affected by molding pressure, for instance, and the assembly yields in different production phases can be very low. Subassemblies mounted or arranged on a PCB and covered with a plastic layer can suffer from mismatch e.g. in terms of thermal expansion, be difficult to be overmolded due to their complex structure, and exhibit stresses in the structure which can tear the subassemblies off their electrical contacts. Challenges in thermal management may also generally cause issues such as overheating.
Accordingly, both direct provision of functional or specifically electrical elements such as related components on a larger host substrate and preparation of collective subassemblies upfront for subsequent mounting thereon have their own downsides in terms of electronics vulnerability, structural and installation complexity as well as thermal management, for example, whereupon there remains room for improvement in terms of related improved or alternative manufacturing techniques and resulting end structures. There is thus still need to develop structures and methods related both to IMSE technology and integrated electronics in general.
Furthermore, in some known attempts, the electronics on the substrate may be protected by a separate cover or shell. Alignment between the cover and the circuit board is very difficult to control. Furthermore, when placing the component or sub-assembly on a substrate, both the misalignment and rotation of the board relative to the cover or shell may cause it more difficult for the pick & place machine vision to correctly identify the actual board orientation and place the contact pads directly on their counterparts on a substrate. Typical issues related to this type of misalignment are misplacement and picking rejects when the machine vision completely fails to recognize the circuit board orientation. Furthermore, the space between the cover and the board has a very complex shape due to component geometry. This makes it challenging to fill the space reliably without leaving voids and those voids will collapse in injection molding, thereby damaging the components. Injection method results in the greatest number of voids and while a pre-fill applying a small amount of filler on the board, allowing it to flow and settle and only then sealing the boards on the shell and then injecting the space full of filler may improve the results, there is still hardly any control of voiding. Vacuum dispensing also helps with voiding but is prohibitively expensive. This increases the amount of process-related costs in the total cost of each of such sub-assemblies.
The objective of the present invention is to at least alleviate one or more of the above drawbacks associated with the known solutions in the context of integral structures including functional elements such as electronics and utilizing molded or cast material layers or structures.
The objectives of the invention are reached by a method for manufacturing a number of electrical nodes, an electrical node module, an electrical node, and a multilayer structure as defined by the respective independent claims.
According to a first aspect, a method for manufacturing a number of electrical nodes is provided. The method comprises:
The obtaining or providing of the number of electronic circuits on or onto, respectively, the first substrate as referred to herein may mean obtaining a ready-made substrate to which at least the circuit pattern(s), and optionally also the electronics component(s), have been provided. The circuit pattern(s) may (have) be(en) done additively, such as by printing or dispensing, or at least partially in a subtractive manner, such as by etching. For example, the provision of circuit pattern(s) may (have) be(en) done by etching, while the electronics component(s) may be added by mounting an electronics component of surface-mount technology (SMT) onto the first substrate to be in connection with the circuit pattern.
The method may, preferably, further comprise providing a barrier or dam element around the number of electronic circuits to confine the potting or casting material, such as flowing thereof, during the provision of the potting or casting material. In some embodiments, the barrier or dam element may be provided prior to the provision of the potting or casting material.
The barrier or dam element may be of initially solid material, such as a (plastic) frame or the like, or it may be provided by initially flowable or dispensable material which is then solidified to form the barrier or dam element.
In other embodiments, the barrier or dam element may be provided after the provision of the potting or casting material, such as pushing a roller or mold or the like, preferably being shaped to correspond at least partly to the shape of the blank area, at least partially towards and into the provided layer of potting or casting material.
In various embodiments, the barrier or dam element defines individual barrier portions around each one of the number of electronic circuits, respectively.
The barrier element may be provided at least partly to a peripheral portion of the first substrate.
The potting or casting material and/or the flowable or dispensable material of the barrier or dam element preferably exhibits quite low viscosity. In various embodiments, the potting or casting material may have a dynamic viscosity less than 5000 centipoises, preferably less than 2500 centipoises, at a temperature of about 20 degrees Celsius.
In some exemplary embodiments, the potting or casting material and/or the flowable or dispensable material of the barrier or dam element may comprise at least one of polyurethane, acrylic, polyester, silicone, polysiloxane, epoxy, and co-polymers thereof. Furthermore, the potting or casting material may comprise a hardener, a cross-linking agent, a polymerization catalyst, or a chain extender.
In some embodiments, the method may comprise applying low pressure, such as substantially a vacuum, at least onto a side of the first substrate comprising the filler material layer for removing bubbles from the filler material layer prior to the hardening.
In some embodiments, the method may, preferably, comprise separating, after the hardening of the filler material layer, the embedded number of electronic circuits from each other along the blank areas so as to provide the number of electrical nodes. The separation may comprise milling, cutting, such as bypass shear cutting, sawing, stamping, waterjet cutting, laser cutting, or abrasive cutting.
Alternatively or in addition, the separating may comprise at least removing portions of the first substrate and the filler material layer at the position of the blank area.
In various embodiments, the separating may only or additionally comprise removing portions of the barrier or dam element and the first substrate below or in contact with the barrier or dam element.
In some embodiments, the separating may comprise removing portions of the first substrate, the barrier or dam element, and the filler material layer at the position of the blank area.
In various embodiments, the separating may comprise alignment of the first substrate based on optical or mechanical alignment markers on the first substrate.
The electrical nodes may be system-in-package (SiP) modules.
In various embodiments, a dimension of the number electrical nodes in a first lateral direction, and optionally in a second perpendicular lateral direction, may be in the range of 5 to 25 millimeters, such as 10, 15, or 20 millimeters.
In various embodiments, a thickness of the number of electrical nodes may be in the range from 1 to 10 or 5 millimeters, preferably in the range from 1.5 to 4 millimeters, and most preferably in the range from 1.8 to 3.5 millimeters.
Furthermore, the at least one electronics component may be a surface-mount or a through-hole device or component.
In various embodiments, the at least one electronics component may be mounted in connection with the circuit pattern with solder paste and/or a number of adhesives.
Furthermore, the method may comprise providing a number of contact pads or patterns at least partly on the opposite side of the first substrate relative and correspondingly to the number of electronic circuits, wherein the contact pads or patterns are connected at least to the corresponding electronic circuits.
In addition, the number of contact pads or patterns may be arranged at least partly adjacent to the blank area, such as less than 2 millimeters from an edge of the blank area.
In various embodiments, the number of electronic circuits on the first substrate may be at least two, such as in the range of 2-50, for example, 2, 4, 9, 16, 25, 30, 36, 40, 45, or 50, or even more, such as up to 500.
Just as an example, there may be “5 times 5” or “7 times 8” circuit patterns on the first substrate 11, or “8 times 9”, for instance.
Furthermore, the at least one electronics component may be selected from the group consisting of: a microcontroller, an integrated circuit, a transistor, a resistor, a capacitor, an inductor, a diode, a photodiode, a light-emitting diode, a semiconductor switch.
Furthermore, the at least one electronics component, the electronic circuits and/or the remaining multilayer structure may comprise at least one component selected from the group consisting of: electronic component, electromechanical component, electro-optical component, radiation-emitting component, light-emitting component, LED (light-emitting diode), OLED (organic LED), side-shooting LED or other light source, topshooting LED or other light source, bottom-shooting LED or other light source, radiation detecting component, light-detecting or light-sensitive component, photodiode, phototransistor, photovoltaic device, sensor, micromechanical component, switch, touch switch, touch panel, proximity switch, touch sensor, atmospheric sensor, temperature sensor, pressure sensor, moisture sensor, gas sensor, proximity sensor, capacitive switch, capacitive sensor, projected capacitive sensor or switch, single-electrode capacitive switch or sensor, capacitive button, multi-electrode capacitive switch or sensor, self-capacitance sensor, mutual capacitive sensor, inductive sensor, sensor electrode, micromechanical component, UI element, user input element, vibration element, sound producing element, communication element, transmitter, receiver, transceiver, antenna, infrared (IR) receiver or transmitter, wireless communication element, wireless tag, radio tag, tag reader, data processing element, microprocessor, microcontroller, digital signal processor, signal processor, programmable logic chip, ASIC (application-specific integrated circuit), data storage element, and electronic sub-assembly.
According to a second aspect, an electrical node module is provided. The electrical node module comprises a first substrate, preferably a rigid substrate, such as a printed circuit board or other electronics substrate, optionally, a low-temperature co-fired ceramic substrate (LTCC). The electrical node module also comprises a number of electronic circuits on the first substrate, each one of the electronic circuits comprising a circuit pattern and at least one electronics component in connection with the circuit pattern, wherein the number of electronic circuits are spaced from each other on the first substrate, thereby defining a blank area surrounding each one of the number of electronic circuits, respectively. Furthermore, the electrical node module comprises a filler material layer, preferably of potting or casting material, embedding the number of electronic circuits, and extending in a lateral direction being perpendicular relative to a thickness direction of the filler material layer along at least 80 percent of, and/or preferably substantially, the whole length of an electrical node in the lateral direction.
Furthermore, the number of electronic circuits on the first substrate may be at least two, such as in the range of 2-50, for example, 2, 4, 9, 16, 25, 30, 36, 40, 45, or 50, or even more, such as up to 500.
According to a third aspect, an electrical node is provided. The electrical node comprises a first substrate, such as a printed circuit board or other electronics substrate, optionally, a low-temperature co-fired ceramic substrate, and an electronic circuit on the first substrate, the electronic circuit comprising a circuit pattern and at least one electronics component in connection with the circuit pattern. The electrical node also comprises a filler material layer embedding the electronic circuit, embedding the number of electronic circuits, and extending in a lateral direction being perpendicular relative to a thickness direction of the filler material layer, preferably of potting or casting material, along at least 80 percent of, and/or preferably substantially, the whole length of an electrical node in the lateral direction.
According to a fourth aspect, a multilayer structure is provided. The multilayer structure comprises a second substrate, such as a flexible, optionally being thermoformable and/or of plastic, film or sheet, and an electrical node in accordance with the third aspect described hereinabove, the electrical node being arranged onto the second substrate, such as mounted onto a surface thereof. The multilayer structure also comprises a molded material layer, such as injection molded material layer, on the opposite side of the electrical node relative to the second substrate and at least partially, if not completely (except for the portions in contact with other elements, for example, the second substrate) embedding the electrical node in the molded material layer.
The multilayer structure may comprise a second circuit pattern on the second substrate, wherein the electrical node is connected to the second circuit pattern, such as via the number of contact pads or patterns at least partly on the opposite side of the first substrate of the node relative to the electronic circuit thereon.
Furthermore, the second substrate may be a flexible (thermo)plastic film or sheet, preferably having a thickness of 1 millimeter at maximum.
In various embodiments, the second substrate may exhibit a non-planar shape, such as at least locally a 3D shape, for example, being concave or convex.
The present invention provides a method for manufacturing a number of electrical nodes, an electrical node module, an electrical node, and a multilayer structure. The present invention provides advantages over known solutions in that each module can have many, even a very high number of, electrical nodes being manufactured and/or processed simultaneously. Before singulation or separation, electrical nodes move in large panels for which manipulators, such as robots, exist and are affordable. Existing circuit board manipulation, storage and handling equipment are perfectly suitable. Furthermore, control of voiding in the potting or casting material is much easier than in the known attempts. Also, circuit board space may be utilized very efficiently, reducing cost per electrical node.
The manufacturing method and process is moved dramatically towards processes and equipment that are widely available and do not require special expertise to be used. This means that all processing equipment is applicable as-is with no need for specific picking nozzles, grabbers or other expensive equipment. This has the potential to drastically reduce cost and the adoption threshold is very low.
The components can be arranged on the substrate as is most convenient or best for electrical performance, then the filler simplifies the geometry for picking, so there is no need to pay attention to it during design to, for example, always place a flat component in the center or the like.
Various other advantages will become clear to a skilled person based on the following detailed description.
The expression “a number of” may herein refer to any positive integer starting from one (1), that is being one, at least one, or several.
The expression “a plurality of” may refer to any positive integer starting from two (2), that is being two, at least two, or any integer higher than two.
The terms “first”, “second” and “third” are herein used to distinguish one element from other element, and not to specially prioritize or order them, if not otherwise explicitly stated.
The exemplary embodiments of the present invention presented herein are not to be interpreted to pose limitations to the applicability of the appended claims. The verb “to comprise” is used herein as an open limitation that does not exclude the existence of also unrecited features. The features recited in the dependent claims are mutually freely combinable unless otherwise explicitly stated.
The novel features which are considered as characteristic of the present invention are set forth in particular in the appended claims. The present invention itself, however, both as to its construction and its method of operation, together with additional objectives and advantages thereof, will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
Some embodiments of the invention are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings.
The electrical node module 100 may comprise a first substrate 11, preferable a rigid substrate, for example, however, not limited to a printed circuit board or other electronics substrate, optionally, a (low-temperature) co-fired ceramic substrate. Furthermore, the electrical node module 100 may comprise a number of electronic circuits on the first substrate 11, each one of the electronic circuits comprising a circuit pattern 14 and at least one electronics component 12 in connection with the circuit pattern 14. The number of electronic circuits may be spaced from each other on the first substrate 11, thereby defining a blank area 30 surrounding each one of the number of electronic circuits, respectively. Furthermore, the electrical node module 100 may comprises a filler material layer 16 embedding the number of electronic circuits, and extending in a lateral direction being perpendicular relative to a thickness direction TH of the filler material layer 16 along at least 80 percent of, and/or preferably substantially, the whole length of an electrical node in the lateral direction.
As visible in
In
Furthermore, there may be optical or mechanical alignment markers on the first substrate 11 based on or via which the separation may be done.
In some embodiments, the mechanical alignment markers may be alignment pins 104 that fit into evenly spaced holes 102 on the electrical node module 100 edge (preferably at center points of each “slice” containing one row of electronic circuits, though there may be more than one alignment pin-hole pair per slice and they do not strictly need to be centered, for example, if the center mass of the electrical nodes 10 is not at the center), outside the actual electronic circuit area (where the barrier or dam element 20 confining the potting compound/filler, if any, would also be). The slices may then be further diced to finished electrical nodes 10 using, for example, a grabber that picks up the slice based on the location of alignment pins 104 and stepwise passes it through a sawblade, finally dropping the row of separated electrical node 10 into a container, for instance.
Furthermore, as shown in
The barrier or dam element 20 may also define individual barrier portions 20B around each one of the number of electronic circuits, respectively, or around sets of the electronic circuits as will be shown in
Furthermore, in some embodiments, the number of contact pads or patterns 19 may be arranged at least partly adjacent to the blank area 30, such as less than 2 millimeters from an edge of the blank area 30, such that the separation may be done close to the contact pads or patterns 19. Thus, in some embodiments, the contact pads or patterns 19 may be arranged to a peripheral portion of first substrate 11.
As can be seen in
Step or item 400 refers to a start-up phase of the method. Suitable equipment and components are obtained and systems assembled and configured for operation.
Step or item 410 refers to obtaining a number of electronic circuits on or, alternatively, providing a number of electronic circuits onto a first substrate 11, preferably a substantially rigid substrate, such as on a printed circuit board or other electronics substrate, optionally, a low-temperature co-fired ceramic substrate or FR-4 substrate, wherein each one of the electronic circuits comprises a circuit pattern 14 and at least one electronics component 12 in connection with the circuit pattern 14, wherein the electronic circuits are spaced from each other on the first substrate 11, thereby defining a blank area 30 surrounding each one of the number of electronic circuits, respectively.
Step or item 420 refers to providing potting or casting material to embed each one of the number of electronic circuits in the potting or casting material.
Step or item 430 refers to hardening, optionally including curing, the potting or casting material to form a filler material layer of the number of electrical nodes.
In various embodiments, steps 410, 420, and 430 are performed in that order.
Thus, the result is an electrical node module 100 comprising a number of electrical nodes 10 ready to be singulated or separated.
In various embodiments, the method may further comprise, as an optional feature, separating 440, after the hardening of the filler material layer, the embedded number of electronic circuits from each other along the blank areas 30 so as to provide the number of electrical nodes 10. The separation may comprise milling, cutting, such as bypass shear cutting, sawing, stamping, waterjet cutting, laser cutting, or abrasive cutting. Alternatively or in addition, the separating 440 may comprise at least removing portions of the first substrate 11 and the filler material layer 16 at the position of the blank area 30. Still further alternatively or in addition, the separating 440 may comprise alignment of the first substrate 11 based on optical or mechanical alignment markers on the first substrate 11.
In various embodiments, the separating 440 may only or additionally comprise removing portions of the barrier or dam element 20, 20B and the first substrate 11 below or in contact with the barrier or dam element 20, 20B.
In some embodiments, the separating 440 may comprise removing portions of the first substrate 11, the barrier or dam element 20, 20B, and the filler material layer 16 at the position of the blank area 30.
Method execution may be stopped at step or item 499.
In various preferable embodiments, the method may comprise providing a barrier or dam element 20 around the number of electronic circuits to confine the potting or casting material, such as flowing thereof, during the provision 420 of the potting or casting material. The barrier or dam element may be provided prior to the provision 420 of the potting or casting material. The barrier or dam element 20 may be of initially solid material, such as a (plastic) frame or the like, or it may be provided by initially flowable or dispensable material which is then solidified to form the barrier or dam element. The solidification may be done by curing. In some embodiments, the material of the initially flowable or dispensable barrier or dam element 20 may even be the same as that of the potting or casting material, however, not necessarily. Alternatively, the barrier or dam element 20 may be provided after the provision 420 of the potting or casting material. These two alternatives are further explained in connection with
Preferably, in various embodiments, the barrier or dam element 20 is anyway arranged after the electronic circuits have been arranged onto the first substrate 11, regardless of the potting or casting material being provided before or after the barrier or dam element 20. However, in some embodiments, the barrier or dam element 20 may be arranged before the electronic circuits or at least before the at least one electronics component 12.
In various embodiments, the barrier or dam element 20 may define individual barrier portions 20B around each one of the number of electronic circuits, respectively. Alternatively or in addition, the barrier or dam element 20 may be provided at least partly to a peripheral portion of the first substrate 11.
Regarding the properties of the potting or casting material, the potting or casting material may have a dynamic viscosity less than 5000 centipoises, preferably less than 2500 centipoises, at a temperature of about 20 degrees Celsius.
Alternatively or in addition, the potting or casting material may comprise at least one of polyurethane, acrylic, polyester, silicone, polysiloxane, epoxy, and co-polymers thereof.
In some embodiments, the potting or casting material may further comprise a hardener, a cross-linking agent, a polymerization catalyst, or a chain extender.
Regarding the materials, in some embodiments, two-component oligomeric/polymeric resin and a reactive hardener material may be used. In other embodiments, polymerization of smaller monomers to form the polyester mentioned before may be used.
In various embodiments, two-component potting or casting materials may be mixed and then the curing/cross-linking/polymerization may be arranged to happen at room temperature over time. However, it can alternatively be accelerated with added heat if that is considered necessary.
In an embodiment, the method may comprise applying low pressure, such as substantially a vacuum, at least onto a side of the first substrate 11 comprising the filler material layer 16 for removing bubbles from the filler material layer 16 prior to the hardening.
In some embodiments, the method may comprise applying hot gas to the filler material layer 16 for destroying bubbles within the filler material layer 16 prior to the hardening 430.
In various embodiments, the electrical nodes may be system-in-package (SiP) modules.
Furthermore, a dimension of the number electrical nodes 11 in a first lateral direction, and optionally in a second perpendicular lateral direction, is in the range of 5 to 25 millimeters, such as 10, 15, or 20 millimeters. The lateral directions are perpendicular relative to the thickness direction TH of the filler material layer 16.
Alternatively or in addition, a thickness of the number of electrical nodes 11 in the direction of the thickness TH is in the range from 1 to 10 or 5 millimeters, preferably in the range from 1.5 to 4 millimeters, and most preferably in the range from 1.8 to 3.5 millimeters.
Alternatively or in addition, the at least one electronics component 12 may be a surface-mount or a through-hole device or component.
In various embodiments, the at least one electronics component 12 may be mounted in connection with the circuit pattern 14 with solder paste and/or a number of adhesives. For example, solder paste and reflow soldering may be used.
In various embodiments, the method may comprise providing a number of contact pads or patterns 19 at least partly on the opposite side of the first substrate 11 relative and correspondingly to the number of electronic circuits, wherein the contact pads or patterns 19 are connected at least to the corresponding electronic circuits.
Furthermore, the number of contact pads or patterns 19 may be arranged at least partly adjacent to the blank area 30, such as less than 1 or 2 millimeters from an edge of the blank area 30. Thus, during the singulation or separation 440, the contact pads or patterns 19 may be left close to the edge of the electrical node 10, that is on the peripheral portion thereof.
The number of electronic circuits on the first substrate 11 may at least two, such as in the range of 2-50, for example, 2, 4, 9, 16, 25, 30, 36, 40, 45, or 50, or even more, such as up to 500.
The at least one electronics component 12 may selected, for example, from the group consisting of: a microcontroller, an integrated circuit, a transistor, a resistor, a capacitor, an inductor, a diode, a photodiode, a light-emitting diode, a semiconductor switch. Other known electronics components may also be utilized.
Furthermore, the electronic circuits and/or the remaining multilayer structure may comprise at least one component selected from the group consisting of: electronic component, electromechanical component, electro-optical component, radiation-emitting component, light-emitting component, LED (light-emitting diode), OLED (organic LED), side-shooting LED or other light source, top-shooting LED or other light source, bottom-shooting LED or other light source, radiation detecting component, light-detecting or light-sensitive component, photodiode, phototransistor, photovoltaic device, sensor, micromechanical component, switch, touch switch, touch panel, proximity switch, touch sensor, atmospheric sensor, temperature sensor, pressure sensor, moisture sensor, gas sensor, proximity sensor, capacitive switch, capacitive sensor, projected capacitive sensor or switch, single-electrode capacitive switch or sensor, capacitive button, multi-electrode capacitive switch or sensor, self-capacitance sensor, mutual capacitive sensor, inductive sensor, sensor electrode, micromechanical component, UI element, user input element, vibration element, sound producing element, communication element, transmitter, receiver, transceiver, antenna, infrared (IR) receiver or transmitter, wireless communication element, wireless tag, radio tag, tag reader, data processing element, microprocessor, microcontroller, digital signal processor, signal processor, programmable logic chip, ASIC (application-specific integrated circuit), data storage element, and electronic sub-assembly.
The multilayer structure 150 may comprise a second circuit pattern 42 on the second substrate 40, wherein the electrical node 10 is connected to the second circuit pattern 42.
Alternatively or in addition, the second substrate 40 may be a flexible plastic film or sheet, preferably having a thickness of 1 millimeter at maximum.
Furthermore, the second substrate 40 may exhibit a non-planar shape, such as at least locally a 3D shape, for example, being concave or convex.
In various embodiments, the second substrate 40 may have been formed, such as thermoformed, to exhibit a non-planar shape, at least locally. The forming may have been performed prior to arranging the electrical node 10 onto the second substrate 40 or alternatively after the arranging the electrical node 10 onto the second substrate 40. Vacuum forming, thermoforming, cold forming, negative pressure forming, high pressure forming, or the like may be utilized in the forming.
As shown in
The structure 150 may be and in many use scenarios will be connected to an external system or device such as a host device or host arrangement of the structure, which may be implemented by a connector, e.g. electrical connector, or connector cable that may be attached to the structure 150 and its elements such as the electrical node 10 in a selected fashion, e.g. communications and/or power supply wise. The attachment point may be on a side or bottom of the structure (e.g. via a through-hole in the second substrate 40), for example.
In various embodiments, electrically conductive elements of the electronic circuits and/or the multilayer structure 150, such as conductive traces, conductors, pads, etc., may include at least one material selected from the group consisting of: conductive ink, conductive nanoparticle ink, copper, steel, iron, tin, aluminium, silver, gold, platinum, conductive adhesive, car-bon fibre, alloy, silver alloy, zinc, brass, titanium, solder, and any component thereof. The used conductive materials may be optically opaque, translucent and/or transparent at desired wavelengths, such as at least portion of visible light, so as to mask or let the radiation such as visible light to be reflected therefrom, absorbed therein or let through, for instance.
Typically, ready-made components including electronic components such as various SMDs may be attached to the contact areas on the substrate(s) e.g. by solder and/or adhesives. For example, light source(s) (e.g. LEDs) of selected technology and packaging may be provided here as well as e.g. different elements of control electronics, communication, sensing, connecting (e.g. connectors), hosting (circuit board(s), carrier(s), etc.) and/or power provision (e.g. battery) depending on the embodiment. A suitable pick-and-place or other mounting device may be utilized for the purpose, for instance. Alternatively or additionally, printed electronics technology may be applied to actually manufacture at least part of the components, such as OLEDs, directly onto the substrates(s), or specifically the film(s) or sheet(s).
In various embodiments, possible additional layers or generally features, may be added into the multilayer structure 150 by molding, lamination or suitable coating (e.g. deposition) procedure not forgetting other possible positioning or fixing techniques. The layers may be of protective, indicative and/or aesthetic value (graphics, colors, figures, text, numeric data, etc.) and contain e.g. textile, leather or rubber materials instead of or in addition to further plastics. Additional elements such as electronics, modules, module internals or parts, and/or optics may be installed and fixed e.g. at the outer surface(s) of the structure, such as the exterior surface of an included film or a molded layer depending on the embodiment. Necessary material shaping/cutting may take place. For example, a diffuser may be produced from locally lasering lightguide material. If provided with a connector, the connector of the multilayer structure may be connected to a desired external connecting element such as an external connector of an external device, system or structure, e.g. a host device. For example, these two connectors may together form a plug-and-socket type connection and interface. The multilayer structure may also be generally positioned and attached herein to a larger ensemble such as an electronic device such as a personal communications device, computer, household apparatus, industrial device, or e.g. a vehicle in embodiments wherein the multilayer structure establishes a part of vehicle exterior or interior, such as a dashboard.
In various embodiments, the barrier or dam element 20 may be provided after the provision of the potting or casting material layer by pushing a roller or mold 70 at least partly into the unhardened potting or casting material so that surface of the potting or casting material lowers in such portions. Thus, the barrier or dam element 20 may thus be formed at the thinner portions where the step of separation is to be performed. However, this does not have to be done in all blank areas but only some of them. In various embodiments, the roller or mold 70 may preferably have been shaped so as to correspond to the shape at least portion of the blank areas 30 on the first substrate 11.
In some embodiments, the roller or mold 70 or some other element which can be used to press or push into the potting or casting material may be heated prior to being pushed into the potting or casting material. The heating provides curing effect at least to portions coming in contact with the potting or casting material. Thus, the electrical nodes 10 may be more quickly separated from each other since the potting or casting material is substantially hardened at those portions where the separation occurs, even if other portions are still at least not completely, if at all, hardened.
The scope of the present invention is determined by the attached claims together with the equivalents thereof. A person skilled in the art will appreciate the fact that the disclosed embodiments were constructed for illustrative purposes only, and other arrangements applying many of the above principles could be readily prepared to best suit each potential use scenario.
This application is a continuation of U.S. patent application Ser. No. 17/700,657 filed Mar. 22, 2022, the disclosure of this application is expressly incorporated herein by reference in its entirety.
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| 3851363 | Booe | Dec 1974 | A |
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| Entry |
|---|
| Office Action issued in U.S. Appl. No. 17/700,657 dated May 4, 2023 (18 pages). |
| Office Action issued in U.S. Appl. No. 17/700,657 dated Jul. 11, 2022 (22 pages). |
| Office Action issued in U.S. Appl. No. 17/700,657 dated Sep. 29, 2022 (16 pages). |
| Office Action issued in U.S. Appl. No. 17/700,657 dated Jan. 6, 2023 (19 pages). |
| International Search Report issued by the European Patent Office acting as the International Searching Authority in relation to International Application No. PCT/FI2023/050150 dated Jun. 15, 2023 (3 pages). |
| Written Opinion of the International Searching Authority issued by the European Patent Office acting as the International Searching Authority in relation to International Application No. PCT/FI2023/050150 dated Jun. 15, 2023 (10 pages). |
| Written Opinion of the International Preliminary Examining Authority dated Mar. 7, 2024, issued in corresponding international application No. PCT/FI2023/050150, 9 pages. |
| Number | Date | Country | |
|---|---|---|---|
| 20230309242 A1 | Sep 2023 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 17700657 | Mar 2022 | US |
| Child | 18191427 | US |
