Claims
- 1. A method of manufacturing a monolithic integrated circuit of either the MOS or CMOS type, comprising the following sequential steps of:
- providing a layer of polycrystalline silicon;
- depositing a layer of a silicide of a refractory metal over said layer of polycrystalline silicon;
- applying a mask onto said silicide layer to define regions of preset area;
- removing the silicide from said preset area regions to form resistance in an intermediate connection level;
- applying a mask onto said silicide layer and said regions to define preset paths adapted to form interconnection lines for said intermediate connection level; and
- removing the silicide layer and polycrystalline silicon layer from outside said mask.
- 2. A method of manufacturing a monolithic integrated circuit of either the MOS or CMOS type, comprising the following sequential steps of:
- providing a layer of polycrystalline silicon;
- depositing a layer of a silicide of a refractory metal over said layer of polycrystalline silicon;
- applying a mask onto said silicide layer to define regions of preset area and preset lines adapted to form interconnection lines for an intermediate connection level;
- removing the silicide layer and polycrystalline silicon layer from outside said mask;
- applying a mask onto said silicide layer to define said preset area regions; and
- removing the silicide from said preset area regions forming resistance in said intermediate connection level.
- 3. A method according to any of claims 1 or 2, comprising an intermediate step of doping said polycrystalline silicon layer by ion implantation.
Priority Claims (1)
Number |
Date |
Country |
Kind |
23323 A/85 |
Dec 1985 |
ITX |
|
Parent Case Info
This is a division of application Ser. No. 940,501, filed Dec. 11, 1986, now abandoned.
US Referenced Citations (13)
Foreign Referenced Citations (1)
Number |
Date |
Country |
WO8504049 |
Sep 1985 |
WOX |
Divisions (1)
|
Number |
Date |
Country |
Parent |
940501 |
Dec 1986 |
|