Claims
- 1. A method of patterning semiconductor devices with a resolution down to 0.12 μm on a substrate structure comprising the steps of:a. forming an oxide layer on a silicon layer overlying a substrate structure; said oxide layer being composed of silicon glass; b. forming a silicon oxynitride layer on said oxide layer; said silicon oxynitride layer having a refractive index of between about 1.85 and 2.35 at a wavelength of 248 nm, an extinction coefficient of between 0.45 and 0.75 at a wavelength of 248 nm, and a thickness of between about 130 Angstroms and 850 Angstroms; c. forming a photoresist layer over said silicon oxynitride layer; and d. exposing said photoresist layer at a wavelength of between about 245 nm and 250 nm; whereby during exposure at a wavelength of between 245 nm and 250 nm, said silicon oxynitride layer provides a phase-cancel effect.
- 2. The method of claim 1 wherein said oxide layer is composed of undoped silicon glass, has a thickness of between about 1000 Angstroms and 5000 Angstroms, has a refractive index of between about 1.4 and 1.65, and is formed using an O3— TEOS process.
- 3. The method of claim 1 wherein said oxide layer is composed of phosphorous doped silicon glass and has a thickness of between about 1000 Angstroms and 5000 Angstroms, has a refractive index of between about 1.4 and 1.65, and is formed using an O3— TEOS process.
- 4. The method of claim 1 wherein said oxide layer is composed of boron and phosphorous doped silicon glass and has a thickness of between about 1000 Angstroms and 5000 Angstroms, has a refractive index of between about 1.4 and 1.65, and is formed using an O3— TEOS process.
- 5. The method of claim 1 which further includes etching said oxynitride layer and said oxide layer to form a contact opening and removing said photoresist layer.
- 6. The method of claim 1 wherein said photoresist layer has a thickness of between about 3000 Angstroms and 8000 Angstroms.
- 7. The method of claim 1 wherein said silicon oxynitride layer is formed by reacting silane, nitric oxide and helium in a plasma at temperatures between about 200° C. and 550° C., at a pressure of between about 3 torr and 8 torr, and at a power of between about 120 watts and 200 watts.
Parent Case Info
This is a division of patent application Ser. No. 09/356,006, filing date Jul. 16, 1999, now U.S. Pat. No. 6,258,734, A Method For Patterning Semiconductor Devices On A Silicon Using Oxynitride Film, assigned to the same assignee as the present invention.
US Referenced Citations (7)
Number |
Name |
Date |
Kind |
4717631 |
Kaganowicz et al. |
Jan 1988 |
A |
5252515 |
Tsai et al. |
Oct 1993 |
A |
5600165 |
Tsukamoto et al. |
Feb 1997 |
A |
5639687 |
Roman et al. |
Jun 1997 |
A |
6153541 |
Yao et al. |
Nov 2000 |
A |
6221558 |
Yao et al. |
Apr 2001 |
B1 |
6228760 |
Yu et al. |
May 2001 |
B1 |
Non-Patent Literature Citations (1)
Entry |
W. W. Lee et al., “Inorganic ARC for 0.18um and Sub-0.18um Multilevel Metal Interconnects,” Proccedings of the IEEE 1998 International Interconnect Technology Conference, Jun. 1998, pp. 84-86. |