Patent Application
20250067771
The present application claims priority from EP 23192489.5, filed on Aug. 21, 2023, which is incorporated by reference in its entirety.
The present disclosure relates to the field of scanning probe microscopy (SPM), and more in particular to the production of tips for SPM.
In most setups for Scanning Probe Microscopy (SPM), an elongated strip probe moves relative to a sample. The probe has a holder at one end and a sharp tip at the other. This strip is known as the cantilever, while the tip, which is often pyramid- or cone-shaped, is fixed to the flat side of the cantilever. During an SPM data collection process, the tip either touches or comes very close to the sample's surface, while the probe follows a pre-determined route, commonly a series of parallel lines.
The interaction between the tip and the surface can translate into information about the surface's physical properties, such as its topography, electrical or magnetic qualities, or even its composition, depending on the tip characteristics and the measurement setup. The probe can maintain continuous contact with the sample, or use an intermittent contact approach, where the surface features are assessed through changes in the impedance (electrical or other) of the link between the probe and the surface. A non-contact approach is also possible, dominated by non-contact forces like Van der Waals forces.
One notable issue with contact-based SPM measurements is that the tip often wears out after numerous scans, necessitating its frequent replacement. Moreover, performing different types of SPM measurements on the same sample requires changing the probe type, which is a complex and time-consuming process. It involves not only the actual replacement of the probe but also re-finding the area of interest on the sample.
To address these issues, a ‘reverse setup’ was developed, where the sample is affixed to a cantilever and scanned relative to a substrate embedded with several tips. This concept, hereinafter referred to as reverse-tip-sample scanning probe microscopy (RTS-SPM) is outlined in patent publication EP 3809143 B1. The current methods for creating such a ‘tip substrate’ are primarily derived from techniques used for cantilever-based tips. These involve making pyramid-shaped cavities in a silicon substrate, filling them with a tip material like diamond, and transferring these diamond tips to a carrier substrate. However, these methods are not capable of producing tips in large quantities as would be necessary for industrial-scale SPM applications, such as in a semiconductor production setting.
US patent application publication no. 2016/0068384 A1 relates to a method of creating a substrate containing 480 silicon SPM tips per 100 cm2 on its surface. Despite the innovation in this patent application, there is still a critical need for new methods that can facilitate the reliable formation of extremely sharp tips, usually at a very high density on the substrate. This demand remains unmet, emphasizing the requirement for further advances in the production methods of tip substrates suitable for large-scale SPM applications.
It is an object of the present disclosure to establish an efficient and reproducible method for fabricating a substrate comprising on its surface one or more scanning probe microscopy tips applicable in RTS-SPM.
In a first aspect, the present disclosure relates to a method of fabricating a substrate comprising on its surface one or more scanning probe microscopy tips, the method comprising:
In a second aspect, the present disclosure relates to the use of a substrate comprising on its surface a plurality of scanning probe microscopy tips obtainable by the method of any embodiment of the first aspect, for performing a scanning probe microscopy measurement, by attaching a sample to the end of a cantilever, and moving said sample relative to one or more of said scanning probe microscopy tips.
It is a benefit of the embodiments of the present disclosure that a highly efficient fabrication of tip-array structures suitable for RTS-SPM can be achieved.
A further benefit of the present disclosure is that it allows the creation of very sharp tips placed on a pedestal structure, achieving the ideal shape for a universal RTS-SPM tip.
It is also a benefit of the present disclosure that the fabrication process utilizes a dry etching technique which addresses the problem of low reproducibility and sensitivity to parameter adjustments experienced with previous techniques.
Another benefit of embodiments of the present disclosure is that it permits wafer-scale fabrication with high process reproducibility and high tip uniformity, essential for commercial applications.
The present disclosure's ability to execute the fabrication process using a single lithography step and a single etching step reduces the processing time and costs, making it another benefit of the present disclosure.
A significant benefit of the disclosure is its capability to use conventional and widely available lithography equipment, making the fabrication process suitable for standard cleanroom microfabrication facilities.
The ability of the present disclosure to produce a vast number of high-performance RTS-SPM tips on a single wafer, such as about 50 million Si tips on a 300 mm Si wafer, is yet another benefit.
It is a benefit of embodiments of the present disclosure that it allows for the possibility of layer coating the fabricated Si tips with other materials, facilitating their use in different specialized modes of SPM measurement.
A further benefit of the present disclosure is that it offers the potential for its method to be applied to many substrate materials, such as Si, SiGe, Ge, SiC, diamond, quartz, and glass, as well as layered substrate materials.
The benefit of the present disclosure that the process allows for high-resolution measurements and tip switching in SPM, which improves the quality and statistical relevancy of the data, is also noteworthy.
These stated benefits underline the potential of the present disclosure to revolutionize the fabrication of tip-array structures for use in SPM, providing a more efficient, reliable, and versatile method compared to previous techniques.
Particular aspects of the present disclosure are set out in the accompanying independent and dependent claims. Features from the dependent claims may be combined with features of the independent claims and with features of other dependent claims as appropriate and not merely as explicitly set out in the claims.
Although there has been constant improvement, change, and evolution of devices in this field, the present concepts are believed to represent substantial new and novel improvements, including departures from prior practices, resulting in the provision of more efficient, stable, and reliable devices of this nature.
The above and other characteristics, features, and benefits of the present disclosure will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, which illustrate, by way of example, the principles of the present disclosure. This description is given for the sake of example only, without limiting the scope of the present disclosure. The reference figures quoted below refer to the attached drawings.
In the different figures, the same reference signs refer to the same or analogous elements.
The present disclosure will be described with respect to particular embodiments and with reference to certain drawings, but the disclosure is not limited thereto but only by the claims. The drawings described are only schematic and are non-limiting. In the drawings, the size of some of the elements may be exaggerated and not drawn on scale for illustrative purposes. The dimensions and the relative dimensions do not correspond to actual reductions to practice of the disclosure.
Furthermore, the terms first, second, third, and the like in the description and in the claims, are used for distinguishing between similar elements and not necessarily for describing a sequence, either temporally, spatially, in ranking, or in any other manner. It is to be understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments of the disclosure described herein are capable of operation in other sequences than described or illustrated herein.
Moreover, the terms top, bottom, over, under and the like in the description and the claims are used for descriptive purposes and not necessarily for describing relative positions. It is to be understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments of the disclosure described herein are capable of operation in other orientations than described or illustrated herein.
The terms “over” and “above” are used as synonyms and cover situations with and without physical contacts. The term “on” means “over and in physical contact with”.
It is to be noticed that the term “comprising”, used in the claims, should not be interpreted as being restricted to the means listed thereafter; it does not exclude other elements or steps. It is thus to be interpreted as specifying the presence of the stated features, integers, steps, or components as referred to, but does not preclude the presence or addition of one or more other features, integers, steps or components, or groups thereof. The term “comprising” therefore covers the situation where only the stated features are present (and can therefore always be replaced by “consisting of” in order to restrict the scope to said stated features) and the situation where these features and one or more other features are present. The word “comprising” according to the disclosure therefore also includes as one embodiment that no further components are present. Thus, the scope of the expression “a device comprising means A and B” should not be interpreted as being limited to devices consisting only of components A and B. It means that with respect to the present disclosure, the only relevant components of the device are A and B.
a. Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present disclosure. Thus, appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment, but may. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner, as would be apparent to one of ordinary skill in the art from this disclosure, in one or more embodiments.
Similarly, it should be appreciated that in the description of exemplary embodiments of the disclosure, various features of the disclosure are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various inventive aspects. This method of disclosure, however, is not to be interpreted as reflecting an intention that the claimed disclosure requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this disclosure.
Furthermore, while some embodiments described herein include some, but not other features included in other embodiments, combinations of features of different embodiments are meant to be within the scope of the disclosure, and form different embodiments, as would be understood by those in the art. For example, in the following claims, any of the claimed embodiments can be used in any combination.
Furthermore, some of the embodiments are described herein as a method or combination of elements of a method that can be implemented by a processor of a computer system or by other means of carrying out the function. Thus, a processor with the necessary instructions for carrying out such a method or element of a method forms a means for carrying out the method or element of a method. Furthermore, an element described herein of an apparatus embodiment is an example of a means for carrying out the function performed by the element for the purpose of carrying out the disclosure.
In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the disclosure may be practiced without these specific details. In other instances, well-known methods, structures, and techniques have not been shown in detail in order not to obscure an understanding of this description.
The initial RTS-SPM tip substrates at imec were fabricated using the molding technique. Inverted pyramids were etched into silicon (Si), these etch pits were then filled with diamond, and finally, the silicon substrate material was dissolved.
While these prototypes were instrumental in demonstrating the functionality and potential of RTS-SPM, they come with several drawbacks. Firstly, they possess a low aspect ratio, indicating a lack of ideal shape and structure for specific applications. Secondly, they lack sharpness, which can affect their precision. Moreover, their fabrication is restricted to a few select materials, such as diamond, silicon nitride, and certain metals. Finally, their fabrication process is quite intricate, involving numerous steps, which may not be ideal for large scale production.
We now refer to
Unfortunately, although some suitable tip (3) array structures were created, this method lacks consistency. It's extremely sensitive to minute changes in the parameters. A notable problematic stage is the resist shrinkage phase, which proved to be unreliable, rendering this method unfit for mass-production of commercial tip-arrays.
We now refer to
In embodiments, the method may be used for fabricating a substrate (1) comprising on its surface (2) an array of at least 100, at least 1000, at least 10000, or at least 500000 scanning probe microscopy tip (3). As shown later on, this would require the method to underetch below a corresponding number of hardmasks (4) in step a.
When a plurality of tip (3) are formed by the method, they usually form a regular 2-dimensional array. A regular array is an array with constant pitch in two orthogonal directions x and y. The pitch p may however be different in the x and y directions. Other distributions, including hexagonal or staggered distributions, as well as more random distributions of nano-sized tip (3) are also possible within the scope of the disclosure.
The distance between adjacent tip (3) may be chosen so as to enable the use of each tip (3) as an SPM tip (3) that is usable in a reverse-setup SPM measurement, by attaching a sample to a cantilever and moving the sample in contact with or in close vicinity to a tip (3). The large number of available tip (3) enables the performance of SPM acquisitions basically without requiring any physical/manual tip (3) replacements as would be the case in conventional SPM. In embodiments, the scanning probe microscopy tip (3) may be separated, in average, by 10 to 40 μm, e.g., by 15 to 35 μm, or by 20 to 30 μm, e.g. by 25 μm.
In embodiments, the scanning probe microscopy tip (3) may have, as a number average, a height of from 5 to 15 μm.
In embodiments, the scanning probe microscopy tip (3) may have, as a number average, a width at mid-height of from 1 to 5 μm.
In embodiments, the scanning probe microscopy tip (3) may comprise an apex having a radius of curvature below 200 nm, usually below 150 nm. For instance, the apex may be from 5 nm to 200 nm or from 80 nm to 150 nm.
The tip (3) are integral with the substrate (1), i.e. they are obtained by removing material from a substrate (1), typically having a planar upper surface (2), in areas around well-defined positions of the tip (3).
Referring to
In embodiments, the top surface (2) of the substrate (1) may comprise one or more layers selected from layers made of silicon, silicon-germanium, germanium, silicon carbide, diamond, quartz and glass.
Typically, the substrate (1) may comprise one or more layers selected from layers made of silicon, silicon-germanium, germanium, silicon carbide, diamond, quartz and glass. Generally, the top layer of the substrate (1) or the only layer constituting the substrate (1) may be a layer selected from layers made of silicon, silicon-germanium, germanium, silicon carbide, diamond, quartz and glass.
Some examples of substrates (1) composed of multiple layers are a Si bottom wafer with an SiO2 top layer, a Si bottom wafer with a SiGe top layer, or a Si bottom wafer with a diamond top layer, etc.
For instance, the entire substrate (1) could be made of silicon, silicon-germanium, germanium, silicon carbide, diamond, quartz or glass. In embodiments, the substrate (1) is a silicon substrate (1), in particular a monocrystalline silicon substrate (1) such as a silicon wafer.
The top layer of the substrate (1), or if the substrate (1) is made of a single material, the substrate (1) usually has a thickness of at least 20 μm.
In embodiments, the top surface (2) of the substrate (1) comprising the tip (3) is globally flat.
Step a consists in underetching beneath one or more hardmasks (4), each having rotational symmetry, present on a substrate (1), thereby forming a corresponding number of pre-tip (5) structures having an upper part (6), a lower part (7), and a neck region (8) linking the upper part (6) to the lower part (7).
Step a is generally a dry etching step. For instance, step a can be a step of isotropically underetching beneath the one or more hard mask.
In embodiments, it may be an inductively coupled plasma etching step. In embodiments, either the top surface (2) of the substrate (1) is made of silicon, silicon-germanium, germanium, silicon carbide, or glass and step a is an inductively coupled plasma etching step making use of halogen-containing etching gases, or the top surface (2) of the substrate (1) is made of diamond and step a is an inductively coupled plasma etching step making use of oxygen-containing gases.
In embodiments, either the top surface (2) of the substrate (1) is made of silicon, and step a is an inductively coupled plasma etching step alternating etching with SF6, CF4, or a mixture thereof with etching with C4F8. In embodiments, in step a the flow rate used for SF6, CF4, or the mixture thereof is larger than the flow rate used for C4F8.
Although the method of the present disclosure is suitable for forming a single tip (3), it is a benefit when a plurality of tip (3) are formed on the substrate (1).
In embodiments, the method may be for fabricating a substrate (1) comprising on its surface (2) an array of at least 100, at least 1000, at least 10000, or at least 500000 scanning probe microscopy tip (3), wherein the one or more hardmasks (4) are an array of at least 100, at least 1000, at least 10000 hardmasks (4), or at least 500000 hardmasks (4).
The hardmask (4) can be any hardmask (4) but a photoresist is convenient.
In embodiments, the hardmask (4) is circular but they could also be square, triangular, or in the shape of a regular polygon such as a pentagon, hexagon, heptagon, and so on, amongst others.
The base of the tip (3) typically has a shape corresponding to the shape of the hardmask (4) that has been used for their formation.
In embodiments, the density of hard masks may be at least one hardmask (4) per 10000 μm2, at least one hardmask (4) per 8000 μm2, at least one hardmask (4) per 6000 μm2. Higher densities such as at least one hardmask (4) per 1000 μm2, at least one hardmask (4) per 500 μm2 can easily be achieved and permit the formation of a corresponding density of tip (3) and form embodiments of the present disclosure. However, for the purpose of use in a scanning probe microscopy measurement, and in particular for RTS-SPM, generally if the density of hardmask (4) is from one hardmask (4) per 10000 μm2 to one hardmask (4) per 2000 μm2, from one hardmask (4) per 8000 μm2 to one hardmask (4) per 3000 μm2, or from one hardmask (4) per 5000 μm2 to one hardmask (4) per 6000 μm2. The use of such densities of hardmasks (4) lead to a corresponding density of tip (3).
For instance, step a forms a pre-tip (5) structure by isotropically under-etching a circular photoresist hardmask (4), as shown in
The pre-tip (5) structures have, below the hardmask (4), an upper part (6), a neck region (8), and a lower part (7). The neck region (8) is the thinner region of the pre-tip (5) structure. Typically, the maximum thickness of the upper part (6) is thinner than the maximum thickness of the lower part (7).
Then, step b is performed by etching the substrate (1) underneath each pre-tip (5) structure in a vertical manner using the respective hardmask (4) as an etching mask, thereby forming a pedestal (9) beneath the lower part (7) of each pre-tip (5) structure.
This step typically uses a more anisotropic etch to establish the pedestal (9).
Step b is generally a dry etching step. For instance, step b can be a step of anisotropically etching the substrate (1) underneath each pre-tip (5) structure in a vertical manner using the respective hardmask (4) as an etching mask.
In embodiments, it may be an inductively coupled plasma etching step. In embodiments, either the top surface (2) of the substrate (1) is made of silicon, silicon-germanium, germanium, silicon carbide, or glass and step b is an inductively coupled plasma etching step making use of halogen-containing etching gases, or the top surface (2) of the substrate (1) is made of diamond and step b is an inductively coupled plasma etching step making use of oxygen-containing gases.
In embodiments, either the top surface (2) of the substrate (1) is made of silicon, and step b is an inductively coupled plasma etching step alternating etching with SF6, CF4, or a mixture thereof with etching with C4F8. In embodiments, in step b the flow rate used for SF6, CF4, or the mixture thereof may be lower than the flow rate used for C4F8.
In embodiments, step b can last, for instance, until a pedestal (9) of from 5 to 15 μm has been etched.
Then, step c is performed by selectively removing the hardmask (4) from each structure. By selectively, it is meant that the hardmask (4) is consumed at a slower rate than the tip (3) material, i.e., the than the material forming the top surface (2) of the substrate (1). Step c is generally a dry etching step.
In embodiments, it may be an inductively coupled plasma etching step.
The result of step c can be seen in an exemplary embodiment in the SEM picture of
Step d concerns the formation of the tip (3) from the tapered neck structure by thinning down the neck until the upper part (6) is physically detached from the lower part (7).
Step d is generally a dry etching step. For instance, step d can be a step of isotropically underetching beneath the one or more hard mask.
In embodiments, it may be an inductively coupled plasma etching step. In embodiments, either the top surface (2) of the substrate (1) is made of silicon, silicon-germanium, germanium, silicon carbide, or glass and step d is an inductively coupled plasma etching step making use of halogen-containing etching gases, or the top surface (2) of the substrate (1) is made of diamond and step d is an inductively coupled plasma etching step making use of oxygen-containing gases.
In embodiments, either the top surface (2) of the substrate (1) is made of silicon, and step d is an inductively coupled plasma etching step alternating etching with SF6, CF4, or a mixture thereof with etching with C4F8. In embodiments, in step d the flow rate used for SF6, CF4, or the mixture thereof is larger than the flow rate used for C4F8.
After this step, the tip (3) could already be used as such. However, it is not unusual that remnants of the separated neck piece remain close to the tip (3) apex. This is visible in the left SEM picture of
In embodiments, steps a, b, c, and d, as well as the one or more sharpening and/or cleaning steps if performed, may be dry etching steps.
In embodiments, the dry etching steps may be inductively coupled plasma etching steps.
In embodiments, either the top surface (2) of the substrate (1) is made of silicon, silicon-germanium, germanium, silicon carbide, or glass and steps a, b, and d are inductively coupled plasma etching steps making use of halogen-containing etching gases, or the top surface (2) of the substrate (1) is made of diamond and steps a, b, and d are inductively coupled plasma etching steps making use of oxygen-containing gases.
In embodiments, either the top surface (2) of the substrate (1) is made of silicon, and steps a, b, and d are inductively coupled plasma etching steps, each step alternating etching with SF6, CF4, or a mixture thereof with etching with C4F8.
In embodiments, in steps a and d the flow rate used for SF6, CF4, or the mixture thereof is larger than the flow rate used for C4F8 while in step b, the flow rate used for SF6, CF4, or the mixture thereof is lower than the flow rate used for C4F8.
In embodiments, the method may further comprise one or more sharpening and/or cleaning steps after step d, thereby forming the substrate (1) comprising on its surface (2) the one or more scanning probe microscopy tip (3). For instance, optional steps e to g depicted in
In embodiments, the one or more sharpening and/or cleaning steps performed after step d may be a cleaning step e to remove residues (10) potentially present after step d on the one or more scanning probe microscopy tip (3), followed by a sharpening step f comprising removing material from the one or more scanning probe microscopy tip (3) cleaned in step e, followed by a further cleaning step g to remove residues (10) potentially present after step f on the one or more scanning probe microscopy tip (3).
The result of each step is shown for an exemplary embodiment in
In embodiments, the one or more cleaning steps are inductively coupled plasma etching steps making use of oxygen-containing gases.
In embodiments, the one or more sharpening steps (e.g., step f) are inductively coupled plasma etching steps making use of halogen-containing etching gases. Step f is generally a dry etching step. For instance, step f can be a step of isotropically underetching beneath the one or more hard mask.
In embodiments, it may be an inductively coupled plasma etching step. In embodiments, either the top surface (2) of the substrate (1) is made of silicon, silicon-germanium, germanium, silicon carbide, or glass and step f is an inductively coupled plasma etching step making use of halogen-containing etching gases, or the top surface (2) of the substrate (1) is made of diamond and step f is an inductively coupled plasma etching step making use of oxygen-containing gases.
In embodiments, either the top surface (2) of the substrate (1) is made of silicon, and step f is an inductively coupled plasma etching step alternating etching with SF6, CF4, or a mixture thereof with etching with C4F8. In embodiments, in step f the flow rate used for SF6, CF4, or the mixture thereof is larger than the flow rate used for C4F8.
In embodiments, the method may further comprise, after the last of steps d, and the one or more sharpening and/or cleaning steps, applying a coating to the fabricated scanning probe microscopy tip (3), wherein said coating is one of diamond, doped diamond (e.g., B-doped diamond), a metal (e.g., Pt), a metal alloy (e.g., Pt-Ir), an oxide, or a nitride.
Typically, a coating applied to the tip (3) is a few nanometres thick and can enhance various properties such as wear resistance, conductivity, magnetism, or chemical functionality. Hard metallic alloys such as TIN, diamond, and diamond-like carbon (DLC) may be used as coatings to bolster the wear resistance of the tip (3). The conductivity of the tip (3) can be improved with the use of metals or metallic alloys like Pt, Ptlr, Au, or Ni as coatings. Metallic or metallic alloy coatings such as Co or CoCr can imbue the tip (3) with magnetic properties.
Chemical functionalization, which is used for chemical force microscopy and single molecule detection applications, is achieved through the grafting of specific self-assembled monolayers (SAMs) with particular chemical functional groups on the tip (3). Silanization, etherification, hydrosilylation, or the immobilization of alkane thiols can be used to carry out such chemical modifications.
The principles of standard SPM technology, where the tip (3) is attached to a cantilever, determine the applicable thicknesses and materials of these coatings. The same parameters are relevant in the context of this present disclosure.
Various methods like physical vapor deposition (PVD), atomic layer deposition (ALD), or chemical vapor deposition (CVD) can be employed to apply these functional coatings.
In some embodiments, the entire method can be performed in the same etch tool.
It should be emphasized that the process developed herein facilitates the creation of high-performance tip-array structures, e.g., Si tip-array structures, in a cost-efficient way. This can be achieved by employing one lithography step (using a single mask) and usually carrying out the multiple-step etching sequence in one go, using the same etch tool. The fabrication sequence (steps a-d) consists of just two main steps: one lithography step and one etching step, allowing the entire process to be completed in a short duration, with the total processing time for an Si array wafer being approximately 6-8 hours, or within a single working day.
The developed process employs micrometer-scale hardmask (4) patterning, making use of conventional and readily accessible lithography equipment, such as mask aligners, thereby eliminating the need for Deep Ultraviolet (DUV) or Extreme Ultraviolet (EUV) technology. The fabrication process can thus be carried out in a typical cleanroom microfabrication facility equipped with standard lithography tools and dry etching systems.
Initially, the etching process was developed and optimized on Si wafer pieces and was subsequently validated by etching Si tip-array structures on entire 100-mm diameter Si wafers.
Fabricated Si tip (3) chip prototypes underwent extensive testing in SPM measurements. An illustration of this can be found in
Example of tip (3) fabrication procedure:
This table shows the sequence of process steps and parameters which were used to fabricate the tip (3) array prototypes. Note that the specified parameters represent the optimized values for the used Oxford Instruments ICP dry etching system, photoresist and mask design. Other dry etching tools, hardmasks (4) and mask designs may need other parameter values.
While the present disclosure has been illustrated and described in detail in the drawings and foregoing description, such illustration and description are to be considered illustrative or exemplary and not restrictive. Other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the present disclosure, from a study of the drawings, the disclosure and the appended claims. In the claims, the word “comprising” does not exclude other elements or steps, and the indefinite article “a” or “an” does not exclude a plurality. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used beneficially. Any reference signs in the claims should not be construed as limiting the scope.
| Number | Date | Country | Kind |
|---|---|---|---|
| 23192489.5 | Aug 2023 | EP | regional |
