A new method for recognition of full-word saturating addition and subtraction, in general and more specifically to a method based on solution of data-flow equations derived from the analyzed computer programs. This is in contrast to currently employed methods that are based on matching fixed patterns in program code.
Reference made herein and listed at the end are incorporated herein as necessary for understanding and implementing of the present invention.
Saturating arithmetic is widely used in digital signal processing (DSP) applications. Full-word saturating arithmetic operations work by setting their result to a pre-defined maximum or minimum in those situations where the corresponding basic 2's complement operations overflow or underflow.
Modern digital signal processors provide fast implementations of saturating operations. At the same time, many DSP applications are written in a standard programming language (such as ANSI C) with saturating operations coded as subroutines or macros in terms of basic 2's complement operations. In order to provide fast execution of such programs it is important to have an optimizing compiler automatically recognize and convert code fragments to individual saturating operations whenever possible.
The prior art in compiling for digital signal processors with saturating operations can be divided into two categories: a) special data types or intrinsic functions are used to signal to the compiler which +/− operations should be treated as saturating; and b) pattern matching of program fragments is used to discover saturating operations. The task of automatically recognizing saturating operations is complicated by the fact that there are many ways of programming such operations. An optimizing compiler relying on simple pattern recognition would have to test for a large number of patterns.
The present invention solves the problem of recognizing saturating addition and subtraction by capturing the essence of these operations in a set of data-flow program analysis equations that can be solved using well-known techniques in the area of optimizing compilers (see Ref 1, 5, 6, 7).
The method of formulating and solving equations that facilitate recognition of full word saturating addition and subtraction, includes formulating, for each basis addition statement z=x+y or subtraction statement z=x−y, data flow equations that describe properties of the program statements being analyzed; and solving the data flow equations.
The following properties of the program can be used:
The method includes replacing z in a statement S of the program that uses z with the use of zsat if and only if all of the following conditions hold for that statement S: a) the only values of z that reach S assigns SATMAX to z when overflow has occurred, c) the only values of z that reach S assigns SATMIN to z if underflow has occurred, and d) the only values of z that reaches S is from the basis statement A if no underflow and no overflow has occurred. Finally the statements made unnecessary by the replacement of uses of z with zsat are removed.
The equations for BITS, COND and REACH may use dense techniques or sparse program representation. The method values and conditions are approximated using global data flow analysis, which includes a lattice for approximating the properties (the values and conditions BITS, COND, REACH) and a system of equations relating approximations to various program points. Lattice vectors assigned to the variables can be compressed.
The REACH properties include a constant value COF(E,v) taken by the variable v when the edge E is executed, if overflow had occurred; a constant value CUF(E,v) taken by the variable v when the edge E is executed, if underflow had occurred; and a Boolean flag ISZ(E,v) which indicates whether v carries the same value as the variable z in the basis statement A when the edge E is executed and neither overflow nor underflow had occurred.
These and other aspects of the present invention will become apparent from the following detailed description of the invention, when considered in conjunction with accompanying drawings.
First is a description of how program are represented for the purposes of deriving the equations. The notion of full-word saturating addition and subtraction is formalized. Next, how the systems of equations are formulated and present an algorithm for recognition of full-word saturating addition and subtraction is described.
Program Representation
The source language programs are decomposed into individual procedures. The present technique is an intra-procedural in that it works on one procedure at a time, independently of others. Herein, the terms “program” and “procedure” are used interchangeably.
Each procedure is represented using its Control-Flow Graph (CFG). The nodes in the graph are program statements. The edges in the graph represent possible transfer of program flow between statements. It is assumed that compound expressions in assignment statements have been translated into sequences of simple assignment statements that involve only a single operator each. Such representation is standard and is referred to in the literature as three-address form (Ref 1).
There are four kinds of program statements:
1. The unique entry statement.
2. Assignment statements compute new values through arithmetic operations, perform memory loads or stores, or perform procedure calls. Without loss of generality, the description will be restricted to the assignment statements enumerated below.
Arithmetic operations OPB (x, y) are parameterized by bit width. For example, signed addition of 8 bit integer values is translated into add8 (x, y) . The arithmetic operations include saturating addition addsatB and subtraction subsatB. These are not present in the initially lowered source program.
3. Control statements provide alternative directions in program flow. Without loss of generality, assume that there is only two kinds of control statement: IFB(ν) and RETURN. Switch statement IFB(ν) has two descendants in the Control Flow Graph and transfers the control to the first one if the value of v, taken as a B bit integer, is non-zero, and to the second one, otherwise. Other kinds of control-flow statements (e.g. loops, multi-way switches) can be translated into sequences of assignment statements and IF statement.
There can only be one RETURN statement in a procedure. It indicates that the program control should be transferred to the calling procedure. Optionally, it can specify a value to return: RETURN(ν).
4. Merge statements are points where alternative paths in program execution merge.
Observe the following facts about such representation:
Possible kinds of assignment statements and their descriptions are listed in the table below:
DEFINITION OF FULL-WORD SATURATING OPERATIONS
Full-word saturating addition and subtraction are defined relative to the basic B-bit 2's complement addition and subtraction as follows:
Where the saturation values SATMIN and SATMAX are the smallest and largest numbers, respectively, that can be represented using B-bit 2's complement arithmetic:
Problem
There are many possible ways of programming the full-word ADDSAT and SUBSAT operators in a high-level programming language such as ANSI C. Below are some possible (but not exclusive) implementations of ADDSAT:
The above program fragments differ in the way they test for the combinations of the sign bits of x, y and z in order to detect overflow and underflow.
In general, a program in three-address intermediate form that does not contain ADDSAT and SUBSAT operations is provided. The goal is to recognize program fragments that can be replaced with ADDSAT and SUBSAT operations.
Program Analysis Techniques
Let G=(N, E) be the control-flow graph. N is the set of nodes (statements), and E is the set of edges. Let ν be the set of variables in the program.
The algorithm proceeds by computing, for each addition statement addB (x, y) , the set of uses of the assigned variable z that receive the saturated value. The addition statement under consideration is the basis statement. The variables x, y and z involved in the basis statement are the basis variables. The uses that receive the saturated value of z is the saturated uses. The sign bits of x, y and z are the basis sign bits and are referred to as X, Y and Z, respectively.
In order to identify saturated uses, the values of variables and the conditions under which statements are executed as Boolean functions are represented in terms of the basis sign bits in the basis statement. Also computed are values which reach a given use in the case of overflow, underflow or normal execution.
Given a basis statement, the present algorithm computes for the edges E and the variables v in the program the following properties:
COF, CUF and ISZ as a group are considered REACH properties or conditions indicating which values of the variable v reaches a use of variable z in statement S at edges E in the program for overflow or underflow or normal occurrences. They are used directly to identify saturated uses. A variable v used in an assignment or a switch statement receives a saturated value if all of the following conditions are satisfied:
In the following subsection, the lattices used in the formulation and solution of data-flow equations for the properties are defined. Then, the equations relating the properties and the source program are described.
The Lattices
The following three lattices are used:
Let X, Y, Z be the sign bits of the variables x, y, z, respectively. Let F be the set of all possible Boolean functions (predicates) in three variables X, Y, Z. 0 denotes the trivially false predicate: 0(X,Y,Z)=0. 1 denotes the trivially true predicate: 1(X,Y,Z)=1.
The lattice for approximating Boolean predicates is Λ=F∪{T, ⊥}. The comparison operator < on Λ is defined as: ⊥<F<T, for all F∈F. The meet operator Π is defined as:
The Boolean operations (and , or , xor ⊕) are extended to elements of lattice Λ, as follows (observe that 1⊕F=F, so xor subsumes bit inversion), in the order of precedence of the rules:
ΛB is the set of all vectors of length B of lattice elements. The elements of such vectors are numbered from 0 to (B−1) and displayed with the element (B−1) on the left, as in:
The meet operation Π is extended to the vectors as:
It is convenient to treat vectors of bits as vectors in FB. For a vector V=[VB−1, . . . , V0], the function eval(V) is defined to be the integer formed from the predicates Vk, if they are all either 0 or 1. If any of the vector elements are not 0 or 1, then eval(V)=⊥. For example, eval([0,1,0,1])=5 and eval([XY, 0,0,0,])=⊥.
Given a vector of predicates V=[VB−1, . . . , V0]∈FB, the application V(X,Y,Z) of V to the given values of the sign bits X, Y, Z is defined as the vector of bits:
V(X,Y,Z)=[VB−1(X,Y,Z), . . . , V0(X,Y,Z)].
I.e., the “application of a vector” is “the vector of applications”. The application of a vector V of lattice values to a predicate F is defined as:
V(F)=V(X1,Y1,Z1)Π . . . ΠV(Xm,Ym,Zm),
with the meet operator Π taken over all Xk,Yk,Zk such that F(Xk,Yk,Zk) is true.
Also, the inverse of eval function: V=ievalB(C) is defined as vector V∈FB of bits, such that C=eval(V). For example, ieval4(3)=[0,0,1,1] and ieval4(−3)=[1,1,0,1]. The ieval function extended to the Λconst lattice: ievalB(⊥)=[⊥,⊥, . . . ,⊥]; ievalB(T)=[T, T, . . . ,T].
Extension of Arithmetic Operations to Lattice Vectors
The B-bit arithmetic operations are extended to operations on vectors of lattice elements. Let U=[U(B−1), . . . , U0] and V=[V(B−1), . . . , V0] be two vectors of lattice elements abstracting the values of the variables u and v. Let w=opB (u, v) be a B bit arithmetic operation on the variables. The bits of the result w are computed by applying a sequence of basic Boolean operations to the bits of the inputs u and v. The operation opB is extended to ΛB by performing on the elements of the input vector the same sequence of Boolean operations extended to Λ. The extended operation is opB.
For example, if the operation is B-bit addition (ADD), then the rules for deriving the value of the result vector mimic the rules for addition with carry:
For multiply operation, precise bit-wise definition, while possible, is not helpful, and thus the result of the multiply operation is defined to be the vector of all bottoms W=[⊥,⊥, . . . , ⊥].
Another example is the v=NOTZEROB (u) operation. The vector V for the variable v has exactly one element: V=[V0]. U=[U(B−1), . . . , U0]. The vectors are related as:
V0=U(B−1)U(B−2) . . . U0
The extension of other operations is straightforward.
Data Flow Properties
In the derivation of the data flow equations, the following notation for the overflow, underflow and no-overflow-and-no-underflow (“neither”) predicates are used:
If the basis statement is addition:
For every edge E in the program control flow graph and for every variable v, the vector valued property BITS(E,v)∈ΛB is defined. Let BITS(E,v)=[V(B−1), . . . ,V0]. The values of the vector elements are interpreted as follows:
The subscript notation BITS(E,v)k is used to denote the k-th bit of the BITS(E,v) property.
For every edge E in the program graph, the defined condition property COND(E)∈Λ is interpreted as follows:
The equations for BITS and COND properties are formed from the control flow graph, according to the following rules:
The equations for the COF and CUF properties are as follows.
These rules have the following intuition: try to obtain the constant values, if any, that bits of the input variables carry. The vector/predicate evaluation expressions, U(FOF), etc., perform just that. Then apply the operation to the resulting bits and see if a constant can be formed out of the result.
For example, consider the code fragment (assuming x is one of the operands in the basis statement, and the basis statement is 32-bit addition).
The BITS value for the t1 variable is [0,0, . . . ,0,X], since t1 get the sign bit of x shifted to the right. The BITS value for the constant is [0,1,1, . . . ,1]. The COF and CUF values are:
COF=eval(add32([0,0, . . . ,0,X](FOF), [0,1,1, . . . , 1](FOF)))=eval(add32([0,0, . . . , 0,0], [0,1,1, . . . , 1]))=eval([0,1,1, . . . , 1])=0x7fffffff=MAX32
CUF=eval(add32([0,0, . . . ,0,X](FUF), [0,1,1, . . . , 1](FUF)))=eval(add32([0,0, . . . , 0,1], [0,1,1, . . . , 1]))=eval([1,0,0, . . . , 0])=0x80000000=MIN
This is how [0,0, . . . ,0,X](FOF) and [0,0, . . . ,0,X](FUF) are computed. Since it is assumed that the basis statement is addition, FOF is true when X=Y=0 and Z=1. FUF is true when X=Y=1 and Z=0. Therefore, in order to apply the vector [0,0, . . . ,0X] to FOF, its elements are evaluate (they are all Boolean functions) for X=Y=0 and Z=1. This gives only one vector of bits: [0,0, . . . ,0,0]. Similarly, [0,0, . . . ,0,X](FUF)=[0,0, . . . ,0,1].
At switches, the value for COF and CUF are propagated to the outgoing edges. At merge statements, the equations are formed as follows. Let E0 and E1 be the two incoming edges for a merge statement S. Then:
The rules state that if one of the incoming edges is executed only when overflow/underflow occurs or its condition has not yet been determined, then the value from the opposite edge is propagated.
ISZ Property
The rules for the ISZ property are:
This rules state that if the assignment statement really acts as a copy operation under the neither-overflow-nor-underflow condition, then the value of ISZ is propagated.
In summary, variables inherit the ISZ property through copies. If one side of a merge statement can only be executed either under overflow or underflow, then the ISZ property is propagated from the opposite side.
Algorithm
The overall algorithm for recognizing full-word saturating addition and subtraction is listed below and illustrated in
Implementation Details
The following describes the details of an implementation:
Representing Boolean Predicates
We need a efficient way to manipulate Boolean predicates, since they are at the core of our method. A Boolean predicate of three variables can be represented using an 8-bit integer. There are 23=8 combinations of the values of the arguments of the function. The integer has a bit for every combination of the input variables. Boolean operations on three-input Boolean functions are isomorphic to bitwise operations on 8-bit integers.
Compressing Vectors of Predicates
Usually we are interested only a single bit of each value. For the variables x, y and z in the basis statement, this is the highest-order bit (the sign bit). For variables that are the results of comparisons, this is the lowest order bit. It is possible that intermediate values will carry some combination of the sign bits shifted to other positions. We speed up analysis by compressing vector values of the BITS property into triplet of the form: <k,λ,flag>, where:
Data flow equations can be trivially modified to accommodate this representation. In effect, this representation performs lossy compression on the original vectors of lattice values, with no degradation in recognition due to the compression.
Conditional Propagation
Wegman-Zadeck style conditional propagation is used in the computation of the BITS and COND properties. The changes are straightforward and are analogous to the conditional propagation algorithm in Reference 7. During evaluation of merge statements, the meet operator is taken over the incoming edges, which are known to be executed. Herein, these are the edges E for which COND(E) is not T or 0. During evaluation of switch statements, the outgoing edge E for which COND(E) evaluates to 0 is never visited by the algorithm.
Normalizing the Input Program
The basic algorithm is sensitive to presence of copies. For example, if the routine is written as:
then the basic algorithm fails to identify the saturated use in the return statement, since the basis statement is z=a+b, and there are no references in the code to sign bits of a or b. This difficulty is not unique to our approach. Other program analysis and optimization problems, such as common sub-expression elimination are sensitive to copies, as well.
The solution is to use some form of global value numbering (Ref 8) in order to normalize the input program.
In the present example of implementation, global value numbering and copy propagation are used. Dependence Flow Graphs is used as our intermediate representation (Ref 3). DFG construction coupled with scalar elimination also finds some equivalence between the uses of the variables a and x. In basic form of the invention, the equations can also be solved using well-known iterative techniques (Refs 5,6). Sparse methods based on the static single assignment (SSA) form as well as dependence-flow graphs (DFGs) (Refs 3,4) can be used to reduce time and space complexity of solution.
Consider the following computation of saturating addition:
The intermediate representation is shown in
This establishes that the use of z in S12 is saturated.
The analysis for the function below illustrates the propagation of the ISZ property:
Here is the intermediate representation with some of the expressions unexpanded:
Below are the solutions for some of the properties. For clarity, edge designations have been deleted from the properties, since every variable is defined exactly once:
Although the present invention has been described and illustrated in detail, it is to be clearly understood that this is done by way of illustration and example only and is not to be taken by way of limitation. The spirit and scope of the present invention are to be limited only by the terms of the appended claims.
The present application claims the benefit of the U.S. provisional application Ser. No. 60/425,251 entitled Method for Recognition of Full-Word Saturating Addition and Subtraction, filed Nov. 12, 2002, which is incorporated herein by reference.
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Number | Date | Country | |
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20040181568 A1 | Sep 2004 | US |
Number | Date | Country | |
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60425251 | Nov 2002 | US |