Number | Date | Country | Kind |
---|---|---|---|
62-134244 | May 1987 | JPX |
Number | Name | Date | Kind |
---|---|---|---|
4734890 | Miyatake et al. | Mar 1988 | |
4736343 | Hidaka et al. | Apr 1988 |
Entry |
---|
R. A. Kertis et al., "A 60ns 256K.times.l Bit DRAM Using LD Technology and Double-Level Metal Interconnection", IEEE Journal of Solid-State Circuits, vol. SC-19, No. 5, Oct., 1984, pp. 585-590. |
R. A. Kertis et al., "A 59ns 256K DRAM Using LD Technology and Double Level Metal", 1984, IEEE International Solid-State Circuits Conference, Feb. 22, 1984. |