Claims
- 1. A method of manufacturing at least one silicon wafer, the method comprising:flattening fine roughness existing on a side face of a silicon block or a silicon stack used for manufacturing the silicon wafer, wherein said flattening comprises polishing said side face of the silicon block or silicon stack to reduce surface roughness thereof so that after said polishing the side face has a surface roughness of 8 μm or less; and after said polishing, slicing the silicon block or silicon stack into a plurality of wafers.
- 2. A method according to claim 1, wherein the step of flattening comprises spraying a mixture of abrasive grains and a medium on the side face of the silicon block or the silicon stack, shifting closer or contacting a polishing member to or with the side face to be polished, and moving the silicon block or the silicon stack relatively to the polishing member in the presence of the abrasive grains so that the side face of the silicon block or the silicon stack is mechanically and physically polished.
- 3. A method according to claim 1, wherein the step of flattening comprises spraying a medium on the side face of the silicon block or the silicon stack, shifting closer or contacting a polishing member having abrasive grains on its surface and/or in the inside thereof to or with the side face to be polished, and moving the silicon block or the silicon stack relatively to the polishing member so that the side face of the silicon block or the silicon stack is mechanically and physically polished.
- 4. A method according to claim 2 or 3, wherein the polishing is carried out while spraying the mixture of the abrasive grains and the medium or the medium solely.
- 5. A method according to claim 1, wherein the polishing reduces the surface roughness of the side face to 6 μm or less.
- 6. A method according to claim 1, wherein a section of the silicon block or the silicon stack is constructed of four main lines, the lines forming an angle of about 90° with adjacent lines, respectively.
- 7. A method of making a plurality of wafers comprising silicon, the method comprising:providing at least one block comprising silicon, said block having first and second ends and at least one side face; polishing at least said side face of the block comprising silicon in order to reduce a surface roughness of the side face of the block to a value(s) of 8 μm or less; and after said polishing, slicing the block comprising silicon into a plurality of wafers comprising silicon.
- 8. The method of claim 7, wherein said block is in the shape of a cylinder or a quadratic prism.
- 9. The method of claim 7, wherein said polishing reduces the surface roughness of the side face of the block to a value(s) of 6 μm or less.
Priority Claims (2)
Number |
Date |
Country |
Kind |
2000-296628 |
Sep 2000 |
JP |
|
2001-272356 |
Sep 2001 |
JP |
|
CROSS-REFERENCE TO RELATED APPLICATION
This application is related to Japanese application Nos. 2000-296628 and 2001-272356, filed on Sep. 28, 2000 and Sep. 7, 2001, whose priority is claimed under 35 USC §119, the disclosure of which is incorporated by reference in its entirety.
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Number |
Date |
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Jun 1998 |
JP |