Patent Application
20100055826
The invention relates generally to the field of solar cells, and more particularly to methods of fabrication of solar cells.
Solar cells are used for converting solar energy into electrical energy. Typically, in its basic form, a solar cell includes a semiconductor junction made of two or three layers that are disposed on a substrate layer, and two contacts (electrically conductive layers) for passing electrical energy in the form of electrical current to an external circuit.
Thin-film solar cells have a great potential for cost reduction because they require only a small amount of materials deposited directly on large area substrates, and their manufacture is suited to fully integrated processing and high throughputs. Alternatives for substrate materials that can be employed in solar cells include glass, titanium, steel, or polyimide. The drawback of metal foils (e.g., titanium and steel) is that they are electrically conductive, and thus, an electrically isolating layer is needed in order to allow monolithic series-interconnection of the cells. Such an isolation layer is not easy to make without local defects that may cause shunting of the solar cells. Further, the polyimide films commercially available deteriorate at temperatures above 400° C. For example, polyimides have high thermal expansion at such high temperatures. Because subsequent processing may involve temperatures above 400° C., these polyimides may not be useful in accordance with prior fabrication techniques. The fabrication method for low-cost flexible modules on alternative substrates have to be developed and improved to take full advantage of roll-to-roll production and monolithic interconnection.
In conventional methods, different layers of the solar cell are deposited using different fabrication techniques depending on the material employed in these different layers. For example, the deposition techniques employed for semiconductor layers are chosen based on whether single crystalline materials, polycrystalline materials, or amorphous materials are employed. Single crystalline materials may be deposited using deposition techniques, such as molecular beam epitaxy (MBE). However, most of the deposition techniques require high temperatures (greater than about 400° C.), and such high temperatures are not suitable for flexible substrates, such as polyimide substrates. Further, solar cells made using deposition techniques known in the art may require post-processing treatments, such as annealing at temperatures greater than 400° C., to improve the cell efficiency. Such treatments reduce the efficiency of the fabrication process and also result in additional fabrication cost. Further, high temperatures may deteriorate the material of some layers in a solar cell. For example, the bottom cell has to survive the subsequent processing of the top cell for tandem cells. In the case of solar cells employing copper gallium indium diselenide (CIGS) or cadmium telluride, there is at least one high temperature (e.g., greater than 500° C.) step either during deposition or post-deposition treatment for high efficiency cells.
Accordingly, it is desirable to develop fabrication techniques that allow for fabrication with flexible substrates, such as flexible polymer web, and enable low temperature processing.
In accordance with an aspect of the present technique, a method of fabricating a thin-film solar cell is provided. The method includes depositing a transparent conductive contact layer on a surface of a substrate, where the transparent conductive contact layer is configured to act as a front electrode for the solar cell, depositing a window layer over the transparent conductive contact layer, depositing an absorber layer on the window layer, where the absorber layer and the window layer are oppositely doped and form a semiconductor junction, and where at least one of the window layer or the absorber layer is deposited by employing high power pulsed magnetron sputtering, and depositing an electrically conductive film on the semiconductor junction, where the electrically conductive film is configured to act as a back electrode layer for the solar cell.
In accordance with one aspect of the present technique, a method of fabricating a thin-film solar cell is provided. The method includes depositing a transparent conductive contact layer on a surface of a substrate, depositing an n-type cadmium sulphide window layer on the transparent conductive contact layer, depositing a p-type cadmium telluride absorber layer on the window layer, depositing an electrically conductive film as a back electrode layer, and where at least one of the layers is deposited by employing high power pulsed magnetron sputtering.
In accordance with yet another aspect of the present technique, a method of fabricating a solar cell is provided. The method includes depositing an electrically conductive layer on a surface of a substrate, depositing an absorber layer on the electrically conductive layer, depositing a window layer on the absorber layer, where the absorber layer and the window layer are oppositely doped and form a semiconductor junction, and where high power pulsed magnetron sputtering is employed to deposit at least one of the absorber layer and the window layer; and depositing a transparent conductive contact layer on the window layer.
In accordance with another aspect of the present technique, a method of fabricating a solar cell is provided. The method includes depositing a conductive layer on a first surface of a substrate, depositing a p-type CIGS absorber layer on the conductive layer, depositing an n-type window layer on the absorber layer, depositing a transparent conductive contact layer, where at least one of the layers is deposited by employing high power pulsed magnetron sputtering.
These and other features, aspects, and advantages of the present invention will become better understood when the following detailed description is read with reference to the accompanying drawings in which like characters represent like parts throughout the drawings, wherein:
Embodiments of the present technique provide methods of fabricating diode structures, such as solar cells. The methods employ high power pulsed magnetron sputtering to deposit different layers of the solar cells. As will be described in detail below, in some embodiments, all or some of the layers of the solar cells may be deposited using the high power pulsed magnetron sputtering.
As illustrated in
In one embodiment, the electrically conductive layer, the transparent conductive contact layer, and one or both of the absorber layer and the window layer may be deposited using high power pulsed magnetron sputtering. In the embodiment where only one of the absorber layer and the window layer is deposited using the high power pulsed magnetron sputtering, the other layer may be deposited using any other suitable deposition technique other than high power pulsed magnetron sputtering. In another embodiment, the conductive layer, the transparent conductive contact layer may be deposited using deposition techniques, such as but not limited to, spin coating, spray coating, chemical vapor deposition, physical vapor deposition, or the like. In this embodiment, either both the absorber layer and the window layer may be deposited using the high power pulsed magnetron sputtering, or one of the absorber layer and the window layer may be deposited using the high power pulsed magnetron sputtering and the other layer may be deposited using a suitable deposition technique other than the high power pulsed magnetron sputtering.
As will be appreciated, high power pulsed magnetron sputtering facilitates production of a highly ionized flux of target material to the substrate, thereby facilitating depositing improved thin-film layers with high material utilization, high deposition rate while maintaining low substrate temperatures. Conventional magnetron sputtering applies a power density to the target not greater than 10-20 W/cm2. In certain embodiments, the high power pulsed magnetron sputtering includes a power density in a range of about 0.10 kW/cm2 to about 1 kW/cm2, and a current density in a range of about 0.2 A/cm2 to about 2 A/cm2. In one embodiment, the high power pulsed magnetron sputtering includes a pulse length in a range of about 0.2 milliseconds to about 3 milliseconds. In another embodiment, the high power pulsed magnetron sputtering includes a pulse length in a range of about 0.5 milliseconds to about 1.5 milliseconds. In one embodiment, the high power pulsed magnetron sputtering results in a modulated pulse plasma in a frequency range of about 1 Hz to about 1000 Hz. In one embodiment, the ratio of ionic species to neutral species in plasma is greater than about 30 percent.
Further, as will be discussed in detail with respect to
In certain embodiments, the substrate temperature (in K) during the deposition of the various layers such as the layers of the junction, the electrically conductive layer, and the transparent conductive contact layer may be lower than 0.3 times the melting point (Tm, in K) of a material being deposited. In some embodiments, the substrate temperature may be less than or equal to 0.2 Tm. Since the plasma is highly ionized, growing multicrystalline films, controlling their phase composition and modifying the film microstructure may be accomplished at reduced substrate temperature using high power pulsed magnetron sputtering. Due to the temperature limitations, the as-deposited absorber layer and the window layer may be polycrystalline. In one embodiment, the as-deposited layers are highly dense, smooth and conformal. As used herein, the term “as-deposited layers” refers to layers that are not post treated (such as annealing at a high temperature and controlled atmosphere) following the deposition of the layers to fabricate the solar cell. In fact, in certain embodiments, the methods of fabricating the solar cell do not include a post-deposition step, such as annealing at a high temperature and controlled atmosphere. By avoiding the post-deposition step(s), the fabrication method may be made more efficient and less time consuming. In certain embodiments, the as-deposited layers are substantially polycrystalline, and the grain size is equal or greater than that of the same layer deposited by conventional sputtering at substrate temperature higher than 0.5 Tm, while substantially decreasing the amount of defects, such as voids or pin-holes in the as-deposited layers.
In some embodiments, a grain size of the different layers of the solar cell is greater than about 50 nm. In other embodiments, the grain size of the layers is in a range from about 100 nm to about 2000 nm, depending on the layer thickness. Further, compared to conventional sputtering and evaporation, the high power pulsed magnetron sputtering may facilitate lower defect density in the as-deposited layers even at lower substrate temperature. For example, a non-dopant defect density of the as-deposited layers is in a range of about 1014 to about 1015 cm−3, or less. In one embodiment, the as-deposited layers may be substantially free of one or more of Kirkendall voids, voids between grains in polycrystals, and voids within grains at twin terminations and dislocations.
The semiconductor junction 26 disposed on the conductive layer 24 includes an absorber layer 28 and a window layer 30 that are oppositely doped. In one embodiment, the absorber layer 28 includes a p-type semiconductor material and the window layer 30 includes an n-type semiconductor material to form a p-n junction. In this embodiment, the absorber layer 28 comprises copper indium disulfide (CIS), copper indium diselenide (CIS), copper indium gallium diselenide (CIGS), copper indium gallium sulfur selenium (CIGSS), copper indium gallium aluminum sulfur selenium (Cu(In,Ga,Al)(S,Se)2), copper zinc tin sulfide (CZTS) and other CIS-based systems; amorphous silicon, hydrogenated amorphous silicon, microcrystalline silicon, nanocrystalline silicon, or other silicon-based systems; cadmium telluride (CdTe), cadmium zinc telluride (CdZnTe), cadmium magnesium telluride (CdMgTe), mercury cadmium telluride (HgCdTe), or other CdTe-based systems; or combinations thereof. The minimum thickness of the absorber layer 28 may be influenced by the depletion width and absorption coefficient of the material. In one embodiment, a thickness of the absorber layer is in a range of about 200 nanometers to about 5 microns. Although not illustrated, in some embodiments, the semiconductor junction may be a p-i-n junction. The intrinsic layer may include other materials, such as zinc telluride and zinc selenide.
A transparent conductive contact layer 32 is disposed on the semiconductor junction 26. In one embodiment, the transparent conductive contact layer may include an oxide material. For example, the contact layer may include cadmium tin oxide (Cd2SnO4), tin oxide or zinc oxide. Advantageously, Cd2SnO4 exhibits high electrical conductivity, high optical transmission. In addition, Cd2SnO4 has a smooth surface morphology, and good chemical and environmental stability which make it a desirable candidate for a contact layer. In one embodiment, an electrical conductivity of the oxide contact layer may be increased by doping the contact layer. For example, zinc oxide may be doped with one or more of aluminum, gallium, indium, or boron. Non-limiting examples of dopants may include aluminum, gallium, boron, fluorine, indium, niobium, antimony, or combinations thereof. The light enters the solar cell through the transparent conductive contact layer 32 as illustrated by arrow 34.
In one embodiment, the window layer 30 of the solar cell 20 is made of n-type material and the absorber layer 28 is made of p-type CIGS. In this embodiment, the thickness of the window layer 30 is in a range from about 20 nm to about 200 nm, and the thickness of the absorber layer 28 is in a range from about 1000 nm to about 2500 nm. Further, the transparent conductive includes zinc oxide doped with aluminum, and the electrically conductive layer comprises molybdenum. The substrate 22 may include a glass, a metal or a polymer. Although not illustrated, in one embodiment a high resistance transparent oxide layer may be present between the window layer 30 and the transparent conductive contact layer 32. The high resistance transparent oxide layer may include zinc oxide (ZnO), tin oxide (SnOx), zinc tin oxide (Zn2SnO4), zinc magnesium oxide (ZnMgO2), titanium dioxide (TiO2), zirconium dioxide (ZrO2), or other transition metal oxides.
As illustrated in the flow chart 60 of
Turning now to
In one embodiment, the window layer 80 is made of n-type cadmium sulphide, and the absorber layer 78 is made of p-type cadmium telluride. The transparent conductive contact layer 72 is made of doped high-conductivity tin oxide or cadmium tin oxide (Cd2SnO4). The substrate 74 may include a glass or polyimide layer. The electrically conductive layer 82 may include ZnTe:Cu. Although not illustrated, in one embodiment a high resistance transparent oxide layer may be present between the transparent conductive contact layer 72 and the window layer 80.
In one example, a portion of a 124 formed of the material employed in substrate, such as polyimide, is first processed in the module 112 to deposit an electrically conductive layer on the substrate using high power pulsed magnetron sputtering. The portion of the substrate having the electrically conductive layer is then subjected to module 114, where absorber layer material, such as CIGS, is deposited on the electrically conductive layer using the high power pulsed magnetron sputtering. In one example, the CIGS absorber layer is deposited by employing co-sputtering. In another example, a CIGS target is employed in high power pulsed magnetron sputtering to deposit CIGS layer on the electrically conductive layer. Alternatively, the physical conditions of the module may be altered to facilitate deposition of the CIGS layer. For example, while depositing CIGS layer, a CIG alloy target may be used in combination with hydrogen selenide (H2Se) or selenium vapor in the process chamber of the module 114 to deposit CIGS layer. Next, at module 116, a window layer material, such as cadmium sulphide or zinc sulphide, is deposited on the absorber layer to form a semiconductor junction using the high power pulsed magnetron sputtering. Subsequently, in module 118, a transparent conductive contact layer material, such as doped high-conductivity ZnO, is deposited on the semiconductor junction using the high power pulsed magnetron sputtering. In these sputtering modules for manufacturing a certain capacity of solar cells, the optimal process parameters are dependent on the materials being deposited. A good range in general is: pressure 5-20 mTorr, substrate temperature about 0.2-0.5 Tm of the material being deposited, high power density about 300-500 W/cm2, and pulse length about 0.5-1.5 milliseconds. The average power to each target is depending on the deposition rate desired to meet the throughput requirement, and thus the plasma pulsing frequency varies to meet the average power needs.
While only certain features of the invention have been illustrated and described herein, many modifications and changes will occur to those skilled in the art. It is, therefore, to be understood that the appended claims are intended to cover all such modifications and changes as fall within the true spirit of the invention.
