The present invention relates to methods of forming structures in integrated circuits, and more particularly, to methods of forming structures in integrated circuits using dual damascene processes.
The use of copper as a material for interconnection in integrated circuits offers some advantages such as lower resistivity, reduction in the number of metal layers used in the integrated circuit, and/or better reliability compared to other types of metals such as aluminum or aluminum alloys. For example,
However, use of copper as interconnect in integrated circuits can be complicated when formed via conventional dry etching as illustrated, for example, in
The use of copper as interconnect may call for improved diffusion barrier layers to be used therewith as well as raise the likelihood that copper may contaminate other steps used to fabricate the integrated circuits.
A conventional single damascene process using copper for interconnect is shown in
It is also known to use a dual damascene process to fabricate structures such as those shown above in
According to
As shown in
It is also known to use what is commonly referred to as a “via first” dual damascene process to create the contact structures described above. As shown in
As shown in
Dual damascene processes are also discussed, for example, in Korean Patent Application Number KR2004-0058955, U.S. Pat. No. 6,743,713, and U.S. Pat. No. 6,057,239.
Embodiments according to the invention can provide methods of forming contact structures in low-k materials using dual damascene processes. Pursuant to these embodiments, a method of forming a via using a dual damascene process can include removing a material from a recess in a low-k material using an ashing process while maintaining a protective spacer on an entire side wall of the recess to cover the low-k material in the recess.
In some embodiments according to the invention, removing a material includes removing a sacrificial material from the recess. In some embodiments according to the invention, removing a material further includes removing a photo-resist material from around the recess along with removing the sacrificial material from inside the recess. In some embodiments according to the invention, the photo-resist material and the sacrificial material comprise a common material. In some embodiments according to the invention, the photo-resist material and the sacrificial material are an organic polymer. In some embodiments according to the invention, the protective spacer is silicon oxide. In some embodiments according to the invention, the low-k material is porous SiCOH.
In some embodiments according to the invention, removing a material from a recess further includes etching the material using an etchant to expose the protective spacer inside the recess. In some embodiments according to the invention, etching further includes etching the material using O2 and CO2, N2 and H2, NH3 and O2, NH3 and N2, or NH3 and H2. In some embodiments according to the invention, etching is carried out at a pressure of about 10 to about 700 Mtorr.
In some embodiments according to the invention, the method further includes forming a trench over the recess and removing the protective spacer from the side wall. The recess and the trench are filled with copper.
In some embodiments according to the invention, a method of forming a via using a dual damascene process includes removing a sacrificial material from a low-k material having a recess therein with a protective side wall spacer and then forming a trench over the recess. The side wall spacer is then removed. In some embodiments according to the invention, the protective side wall spacer is silicon oxide. In some embodiments according to the invention, the low-k material is porous SiCOH.
In some embodiments according to the invention, a method of forming a via using a dual damascene process includes forming a hard mask material on a low-k material. A via is formed in the low-k material through the hard mask material. A protective side wall spacer is formed on a side wall of the via and on the hard mask material, wherein the protective side wall spacer has an etch selectivity relative to the hard mask material. A sacrificial material is formed in the via on the protective side wall. A photo-resist material is formed on the hard mask material including an opening therein over the via. The photo-resist material and the sacrificial material are removed from inside the via while avoiding removing the protective side wall spacer from inside the via. A trench is formed over the via while maintaining a lower portion of the via having the protective side wall spacer thereon. The protective side wall spacer is removed from the lower portion of the via. The via and the trench are filled with copper.
In some embodiments according to the invention, forming a trench over the via includes etching the hard mask material to remove the hard mask material from an upper surface of the low-k material and a portion of the low-k material beneath the upper surface to form the trench in the low-k material while maintaining the protective spacer on a lower portion of the via. In some embodiments according to the invention, the protective side wall spacer is silicon oxide. In some embodiments according to the invention, the low-k material is porous SiCOH.
In some embodiments according to the invention, a method of forming contact structures using a via-first dual damascene process includes maintaining a protective spacer on an entire side wall of a recess in an low-k material during removal of a sacrificial material inside the recess. In some embodiments according to the invention, the protective spacer is silicon oxide. In some embodiments according to the invention, the low-k material is porous SiCOH.
The invention is described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity.
It will be understood that when an element or layer is referred to as being “on”, “connected to” or “coupled to” another element or layer, it can be directly on, connected or coupled to the other element or layer or intervening elements or layers may be present. In contrast, when an element is referred to as being “directly on,” “directly connected to” or “directly coupled to” another element or layer, there are no intervening elements or layers present. Like numbers refer to like elements throughout. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.
It will be understood that, although the terms first, second, third etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.
Spatially relative terms, such as “beneath”, “below”, “lower”, “above”, “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as “below” or “beneath” other elements or features would then be oriented “above” the other elements or features. Thus, the exemplary term “below” can encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
Embodiments of the invention are described herein with reference to cross-section illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the invention. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments of the invention should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an implanted region illustrated as a rectangle will, typically, have rounded or curved features and/or a gradient of implant concentration at its edges rather than a binary change from implanted to non-implanted region. Likewise, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation takes place. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the invention.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
In some embodiments according to the invention, a protective side wall spacer that is formed in a recess in a low-k material is maintained while a material (such as a photoresist and/or a sacrificial material in the recess) is removed. The removal of the photoresist and/or sacrificial material can be performed by an ashing process whereby the low-k material may be damaged if the protective side wall spacer is not maintained in the recess. As described herein in greater detail, the recess can provide the lower portion of a “via first” contact structure formed using a dual damascene process. Accordingly, in some embodiments according to the invention, a trench can be formed to provide an upper part of the contact structure in the “via first” dual damascene process. The trench can be formed by using remnants of the protective spacer that are outside the recess as an etching mask. Accordingly, in some embodiments according to the invention, the material removed by an ashing process can be removed prior to formation of the trench thereby allowing the low-k material to be protected by the protective side wall spacer during the removal of the material in the ashing process (e.g., photoresist and/or sacrificial material in the via). As used herein, the term “ashing” refers to the removal of materials, such as photoresist materials, from semiconductor substrates using plasma or ultraviolet light generated ozone.
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As described herein, in some embodiments according to the invention, a protective side wall spacer that is formed in a recess in a low-k material is maintained while a material (such as a photoresist and/or a sacrificial material in the recess) is removed. The removal of the photoresist and/or sacrificial material can be performed by an ashing process whereby the low-k material may be damaged if the protective side wall spacer is not maintained in the recess. As described herein in greater detail, the recess can provide the lower portion of a “via first” contact structure formed using a dual damascene process. Accordingly, in some embodiments according to the invention, a trench can be formed to provide an upper part of the contact structure in the “via first” dual damascene process. The trench can be formed by using remnants of the protective spacer that are outside the recess as an etching mask. Accordingly, in some embodiments according to the invention, the material removed by an ashing process can be removed prior to formation of the trench thereby allowing the low-k material to be protected by the protective side wall spacer during the removal of the material in the ashing process (e.g., photoresist and/or sacrificial material in the via).
The foregoing is illustrative of the present invention and is not to be construed as limiting thereof. Although a few exemplary embodiments of this invention have been described, those skilled in the art will readily appreciate that many modifications are possible in the exemplary embodiments without materially departing from the novel teachings and advantages of this invention. Accordingly, all such modifications are intended to be included within the scope of this invention as defined in the claims. Therefore, it is to be understood that the foregoing is illustrative of the present invention and is not to be construed as limited to the specific embodiments disclosed, and that modifications to the disclosed embodiments, as well as other embodiments, are intended to be included within the scope of the appended claims. The invention is defined by the following claims, with equivalents of the claims to be included therein.