Patent Application
20240047203
The field of the present disclosure is directed to the fabrication of III-Nitrides and III-Nitride compound semiconductors.
III-nitride semiconductors have become a cornerstone of modern electronic and optoelectronic devices. The nitrides of group III metal elements include aluminum nitride (AlN), gallium nitride (GaN), indium nitride (InN), boron nitride (BN) etc. and their alloys, all of which are compounds of nitrogen. III-nitride semiconductors crystallize in their most stable form into a wurtzite crystallographic structure with nitrogen atoms forming a hexagonal close packed (hcp) structure and the group III atoms occupying half of the tetrahedral sites available in the hcp lattice. III-nitrides are polar crystals as they do not have a center of symmetry.
High Electron Mobility Transistors (HEMTs) may be based on III-Nitrides or Gallium Arsenide (GaAs). III-Nitrides-based and GaAs-based HEMTs as well as pseudomorphic HEMTs (PHEMTs) are rapidly replacing conventional metal-semiconductor field-effect transistors (MESFETs) in applications requiring low noise figures and high gain. HEMTs are also known as MODFETs (modulation doped FET), TEGFETs (two-dimensional electron gas FET) and SDHTs (selectively doped heterojunction transistor). The main difference between HEMTs and MESFETs is the epitaxial layer structure. In the HEMT, compositionally different layers are grown in order to optimize and to extend the performance of the field effect transistor. III-V compound semiconductors are alloys containing elements from Group III (boron, aluminum, gallium, indium) and elements from Group V (nitrogen, phosphorus, arsenic, antimony, bismuth). The combination of elements from these groups may be binary (two elements, such as GaN or GaAs), ternary (three elements such as AlGaN or InGaAs), or quaternary (four elements such as AlGaInN or AlInGaP). III-V semiconductors using a Gallium Nitride (GaN) substrate are popular for optoelectronics, high power electronics, high frequency electronics, and other applications. For III-V semiconductors using a GaAs substrate, commonly used materials are Aluminum Gallium Arsenide AlxGa1-xAs alloys (AlxGa1-xAs) and GaAs. PHEMTs also may incorporate Indium Gallium Arsenide InxGa1-xAs alloys (InxGa1-xAs), but its different layers form heterojunctions because each layer has a different band gap. Structures grown with the same lattice constant but different band gaps are referred to as lattice-matched HEMTs. HEMT structures grown with slightly different lattice constants are called pseudomorphic HEMTs or PHEMTs. HEMTs and PHEMTs (collectively referred to as “HEMTs” in this disclosure) use II-V semiconductor materials. III-V semiconductor materials may be formed by epitaxial growth using metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).
III-V semiconductor compound materials may be grown by epitaxy, the growth of a crystalline material on a substate. Epitaxial growth of I-V semiconductor materials is a key technology, especially for the wireless, optical, and photovoltaic industries. PHEMTs are used extensively because they offer a high power added efficiency combined with excellent low noise figures and performance. PHEMTs, Heterojunction bipolar transistors (HBTs), and Vertical Cavity Surface Emitting Laser cells (VCSELs) require a pure, crystalline quality that epitaxial growth provides best. For III-V epitaxy, molecular beam epitaxy (MBE) is popular because MBE can control the thickness of the epitaxial layer to within monolayers.
III-V compound semiconductors, especially those based on gallium nitride (GaN), can also be formed by metal-organic chemical phase deposition (MOCVD). MOCVD is another highly complex process for growing crystalline structures. The MOCVD process deposits very thin layers of atoms onto a semiconductor wafer. MOCVD is often used to manufacture light-emitting diodes (LEDs), lasers, transistors, solar cells and other electronic and opto-electronic devices.
In the MOCVD process, reactant gases are introduced into the system at high pressure, such as about 1 torr. By contrast, the MBE process requires Ultra High Vacuum conditions (i.e., pressures below 10−8 Torr) for deposition.
Hydride Vapor Phase Epitaxy (HVPE) is an epitaxial growth technique that forms semiconductors such as gallium nitride GaN, gallium arsenide GaAs, indium phosphide InP and other related compounds, by reacting hydrogen chloride at an elevated temperature with group-III metals in order to produce gaseous metal chlorides. The gaseous metal chlorides are reacted with ammonia to produce III-Nitrides. The commonly used carrier gasses include, for example, ammonia, hydrogen, nitrogen and other chlorides.
Remote epitaxy is a technology that can effectively grow crystalline compound semiconductor epilayers using amorphous, polycrystalline, or single crystal 2D material interlayers without generating entailed dislocations. See. e.g., W. Kong, H. Li, K. Qiao, Y. Kim, K. Lee, Y. Nie, D. Lee, T. Osadchy, R. J. Molnar. D. K. Gaskill, R. L. Myers-Ward, K. M. Daniels, Y. Zhang, S. Sundram, Y. Yu, S-H. Bae, S. Rajan, Y. Shao-Horn, K. Cho, A. Ougazzaden, J. C. Grossman, and J. Kim, “Polarity governs atomic interaction through two-dimensional materials,” Nature Materials, vol. 17, pp. 999-1004, 2018; Y. Kim, S. S. Cruz, K. Lee, B. O. Alawode, C. Choi. Y. Song. J. M. Johnson, C. Heidelberger. W. Kong, S. Choi, K. Qiao. I. Almansouri, E. A. Fitzgerald, J. Kong, A. M. Kolpak, J. Hwang, and J. Kim. “Remote epitaxy through graphene enables two-dimensional material-based layer transfer,” Nature, vol. 544, pp. 340-343, 2017; S. Bae, K. Lu, Y. Han, S Kim, K. Qiao, C. Choi, Y. Nie, H. Kim, H. Kum, P. Chen, W. Kong, B. Kang, C. Kim, J. Lee. Y. Back, J. Shim, J. Park, M. Joo, D. Muller. K. Lee, J. Kim. “Graphene-Assisted Spontaneous Relaxation Towards Dislocation-Free Heteroepitaxy,” Natura Nanotechnology, vol. 15, pp. 272-276, 2020.
Remote epitaxy can grow compound semiconductors (III-Nitrides, III-V, II-VI, complex oxides, or other oxides, etc) epilayers “remotely” on a two-dimensional (2D) materials coated crystalline substrate, such as GaN, GaAs and InP crystalline substrates coated with graphene or monolayer hexagonal boron nitride (h-BN), which is also referred to as “white graphene,” within a certain interspacing gap as long as the potential field from the substrate is strong enough to penetrate through the 2D material interlayers. See, e.g., W. Kong, H. Li, K. Qiao, Y. Kim, K. Lee, Y. Nie, D. Lee, T. Osadchy, R. J. Molnar, D. K. Gaskill, R. L. Myers-Ward, K. M. Daniels, Y. Zhang, S. Sundram, Y. Yu, S.-H. Bae, S. Rajan, Y. Shao-Horn, K. Cho, A. Ougazzaden, J. C. Grossman, and J. Kim, “Polarity governs atomic interaction through two-dimensional materials,” Nature Materials, vol. 17, pp. 999-1004, 2018. Therefore, this process facilitates fabrication of such an epi-structure on particular parent substrates towards integrated device application, overcoming the mechanical failures such as defects and cracks.
2D materials grown by chemical vapor deposition (CVD) etc. can be exfoliated from the substrate and subsequently transferred onto single crystalline III-N substrates including gallium nitride (GaN). See, e.g., Y. Kim, S. S. Cruz, K. Lee, B. O. Alawode, C. Choi, Y. Song, J. M. Johnson, C. Heidelberger, W. Kong, S. Choi, K. Qiao, I. Almansouri, E. A. Fitzgerald. J. Kong, A. M. Kolpak, J. Hwang, and J. Kim, “Remote epitaxy through graphene enables two-dimensional material-based layer transfer,” Nature, vol. 544, pp. 340-343, 2017. However, this ex-situ transfer involves extra chemical exposure of the surface to oxygen, polymer(s), solvent(s), and metal(s) in an atmospheric environment, which is unfavorable for achieving high quality epitaxy.
Remote epitaxy can reduce entailed mechanical failures such as dislocations and cracks through manipulating the lattice of compound semiconductors (III-N (such as GaN. AlN, InN, hexagonal BN (h-BN), or their alloys, etc), III-V (such as InP, AlP, GaP, InAs, GaAs, InSb, or their alloys, etc), II-VI (such as CdSe, CdS, CdTe, ZnSe, ZnS, ZnTe, or their alloys, etc), complex oxides (such as SrTiO3, LaMnO3, BaTiO3, or BiFeO3, etc), or other oxides (such as SnO2, ZnO, WO3, TiO2, or SiO2, etc)) epilayers during epitaxial growth. The III-N, III-V, II-VI, complex oxides, or other oxides epilayers can thus be fabricated on the amorphous, polycrystalline, or single crystal 2D material interlayers (such as graphene, h-BN, cubic BN (c-BN), amorphous BN (a-BN), polycrystalline BN (p-BN), MoSe2, WSe2, MoS2, WS2, CrO2, CrS2, VO2, VS2, or NbSe2, etc) transferred single crystalline III-N, III-V, III-VI, complex oxides, or other oxides substrates. However, the undesirable exposure of surface from chemicals in atmospheric environment during transferring 2D interlayers can significantly damage and contaminate the 2D interlayers and thus leads to failure of achievement of high quality II-N, III-V, II-VI, complex oxides, or other oxides epitaxy and beneficial electronic properties of epilayers for manufacturing semiconductor devices. Therefore, there is a need for a method of growing high quality III-Nitride epitaxial layers without the extra chemical exposures that reduce the quality of the resulting surface of the III-Nitride epilayers.
The following presents a simplified summary in order to provide a basic understanding of one or more aspects of the improved method. This summary is not an extensive overview of the invention, is not intended to identify key or critical elements of the invention, is not intended to limit the order of process steps, and is not intended to delineate the scope of the invention. Rather, the primary purpose of the summary is to present some concepts of the invention in a simplified form as a prelude to a more detailed description that is presented later.
In the preferred embodiment, 2D material interlayers are directly grown on the surface of a III-Nitride and III-V layered common substrate or any bulk substrates that allow to form a III-Nitride and III-V, II-VI and complex oxide template, which reduces contamination in the surface of a III-Nitride epitaxial layer on a template without growth interruption via Molecular Beam Epitaxy (MBE), Metal Organic Chemical Vapor Deposition (MOCVD), Hydride Vapor Phase Epitaxy (HVPE), or other tools.
One or more aspects of the present invention are described with reference to the following description and the accompanying drawings, wherein like reference numerals are generally utilized to refer to like elements throughout, and wherein the various structures are not necessarily drawn to scale. These are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings. It should be understood that numerous specific details, relationships, and methods are set forth to provide an understanding of the invention. One skilled in the relevant art, however, will readily recognize that the invention can be practiced without one or more of the specific details or with other methods. In other instances, well-known structures or operations are shown in block diagram or not shown in detail to avoid obscuring the invention. The present invention is not limited by the illustrated ordering of acts or events, as some acts may occur in different orders and/or concurrently with other acts or events. Further, not all illustrated acts or events are required to implement a methodology in accordance with the present invention.
In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of one or more aspects of the present invention. It may be evident, however, to one skilled in the art that one or more aspects of the present invention may be practiced with a lesser degree of these specific details. While a particular feature of the invention may have been disclosed with respect to only one of several aspects of the implementations, such feature may be combined with one or more other features of other implementations as may be desired and advantageous for any given or particular application.
The present disclosure introduces the direct growth of amorphous, polycrystalline, or single crystal 2D material interlayers on the surface of compound semiconductors substrate (III-Nitride, III-V, II-VI, SiC, complex oxides, or other oxides, etc) and buffer layered common substrates (III-Nitride, SiC, SiN, III-V, II-VI, complex oxides, or other oxides, etc), thereby facilitating low contamination to contamination-free III-Nitride, III-V, II-VI, complex oxides, or other oxides epitaxial layer on templates without growth interruption through Molecular Beam Epitaxy (MBE), Metal Organic Chemical Vapor Deposition (MOCVD), Hydride Vapor Phase Epitaxy (HVPE), or other tools. This novel direct growth process reduces defects that hinder the control of electronic properties of semiconductor epilayers, reduces processing time, and reduces materials cost due to multiple utilizations of III-N, III-V, II-VI, SiC, SiN, complex oxides, or other oxides templates by repeating the growth and lift-off processes.
It is critical to improve the formation and growth of 2D interlayers to minimize the unfavorable impurities of their surface. At the same time, it is desirable for the novel method to facilitate the reduction of processing time, complexity, defects and materials cost and promote up-scaling for high-volume production.
Therefore, the present disclosure discloses the novel direct growth method of growing amorphous, polycrystalline, or single crystal 2D interlayers and compound semiconductors (III-Nitride, III-V, II-VI, SiC, complex oxides, or other oxides, etc) without growth interruption via Molecular Beam Epitaxy (MBE), Metal Organic Chemical Vapor Deposition (MOCVD), or Hydride Vapor Phase Epitaxy (HVPE), etc. Thus, the novel method is not limited to the surface size of 2D interlayers, unlike in conventional transferring methods of 2D interlayers.
In the MBE growth technique, prior to growing the optional buffer layer 12, the substrate 14 is ex-situ cleaned by boiling in acetone and ethyl alcohol for 1 minute to 10 minutes and dried with flowing nitrogen gas before being loaded into the MBE system. In the MBE chamber, the substrate 14 is thermally outgassed in ultrahigh vacuum (UHV) at a temperature ranging from 500° C. to 1,000° C., inclusive, applied to the substrate for 1 hour to 5 hours, where the preferable temperature and time are 900° C. for two hours. The buffer layer 12 with a thickness in the range from 10 nm to 5 μm, inclusive, is grown at substrate temperatures employed for MBE growth of layers (600° C. to 900° C., inclusive). For example, MBE growth temperature in GaN is 700° C. The time duration for MBE growth depends on the desired thickness, as the MBE growth rate is about 1 μm per hour. As an example, if one wants to deposit one μm of III-N and III-V buffer layer, the required time duration is estimated to be one hour. The metal sources, such as gallium Ga, aluminum Al, indium In, or boron B, etc., are preferably provided with ingot type purity 6N to 7N. The nitrogen source is supplied with a nitrogen gas (N2) radio frequency (RF) plasma unit through a mass flow controller.
In the MOCVD growth technique, the buffer layer 12 is grown using precursors with trimethylgallium (TMG), trimethylaluminum (TMA), trimethylindium (TMI), or triethylborane (TEB) and NH3 with a carrier gas (H2 or N2) flow at substrate temperature in the range of 900° C. to 1,500° C., inclusive. For example, the MOCVD growth temperature in GaN is 1,100° C. The time duration depends on the desired thickness as the MOCVD growth rate in GaN is about two μm per hour. As an example, if one wants to deposit one μm of GaN buffer layer, the required time is estimated to be 30 minutes. A GaN buffer layer with a thickness in the range from 10 nm to 5 μm, inclusive, is grown as MBE. Therefore, the required time ranges from six minutes to 150 minutes.
An amorphous, polycrystalline, or single crystal 2D material interlayer 16 is directly grown on the optional buffer layer 12, or if no buffer layer 12 is formed, on the substrate templates as illustrated in
In the MBE growth technique, a graphene 2D material interlayer 16 may be grown using both gaseous and solid sources for carbon at substrate temperatures which are kept within the range between 1000° C. to 1200° C., inclusive, in order to provide the necessary mobility of carbon on the growth surface. A h-BN 2D material interlayer 16 may be grown through evaporating the boron ingot, preferably having purity 6N, as the group-III source by the electron-beam gun and flowing N2 gas by a RF plasma source. The growth temperatures range from 500° C. to 1300° C., inclusive, as measured by a pyrometer. A MoSe2 or WSe2 2D material interlayer 16 may be grown by generating a selenium (Se) flux by an effusion cell for Sc and generating either a molybdenum (Mo) flux or tungsten (W) flux by an electron-beam gun, at substrate temperatures ranging from 100° C. to 700° C., inclusive. For example, MBE growth temperature in MoSe2 is 500° C. The required time depends on the desired thickness as the MBE growth rate in MoSe2 is about 10 nm per hour. As an example, if one wants to deposit 20 nm, the required time is estimated to be two hours. Mo. W and Se ingots preferably have a purity of at least 6N. A MoS2 or WS2 2D material interlayer 16 may be grown by generating a sulfur (S) flux by a valved sulfur cracker cell and generating either a Mo flux or W flux by an electron-beam gun, at substrate temperatures ranging from 100° C. to 900° C., inclusive. For example, the MBE growth temperature in MoS2 is 800° C. The required time depends on the desired thickness as the MBE growth rate in MoS2 is about 50 nm per hour. As an example, if one wants to deposit 20 nm, the required time is estimated to be 24 minutes. The S ingot preferably has purity of at least 6N.
In the MOCVD growth technique, a hexagonal boron nitride (hBN), amorphous boron nitride (aBN), MoSe2 or WSe2 2D material interlayer 16 may be grown using precursors with trimethylBoron, molybdenum hexacarbonyl Mo(CO)e or tungsten hexacarbonyl W(CO)6 and dimethylselenium (CH3)2Se with a carrier gas including a hydrogen gas/nitrogen gas H2/N2 mixture flow at substrate temperatures ranging from 500° C. to 1,200° C., inclusive. For example, the MOCVD growth temperature in WSe2 is 800° C. The required time depends on the desired thickness as the MOCVD growth rate in WSe2 is about 10 nm per hour. As an example, if one wants to deposit 20 nm, the required time is estimated to be two hours. A MoS2 or WS2 2D material interlayer 16 may be grown using precursors with M(NtBu)2(dpamd)2, where M is either Mo or W, and elemental sulfur (SR) with a carrier gas (such as N2) flow at substrate temperatures ranging from 500° C. to 1,000° C., inclusive. For example, the MOCVD growth temperature in WS2 is 800° C. The required time depends on the desired thickness as the MOCVD growth rate in WS2 is about 100 nm per hour. As an example, if one wants to deposit 20 nm, the required time is estimated to be twelve minutes. As another example, a h-BN 2D material interlayer 16 may be grown through MOCVD at a growth temperature ranging from 700° C. to 1600° C., inclusive.
Finally, in the MBE growth technique, a semiconductor epilayer 18 can be grown on the 2D material interlayer 16 as shown in
The MOCVD growth technique grows the epilayer 18 at growth temperatures ranging from 900° C. to 1.500° C., inclusive, similar to those used to form the buffer layer 12 with precursors and a carrier gas (H2) flow.
Furthermore, the formed GaN, AlN, InN, or h-BN epilayer 18 may comprise x composition incorporated in ternary alloys, including, but not limited to, AlxGa1-xN, InxGa1-xN, BxGa1-xN, InxAl1-xN, GaxAl1-xN, BxAl1-xN, AlxIn1-xN, GaxIn1-xN, and h-GaxB1-xN, where 0<x<1).
The formed GaN, AlN, InN, or h-BN epilayer 18 may comprise x and y composition incorporated in quaternary alloys, including, but not limited to, AlxInyGa1-x-yN, InxGayAl1-x-yN, AlxGayIn1-x-yN, where 0<x<1 and 0<y<1.
The crystallinity of epilayers 18 grown on the 2D materials-coated substrates using these novel processes was examined to verify if the epilayers 18 read the crystalline registry of the underlying substrates through 2D materials. For methods of checking the crystallinity of epilayers, see, e.g., Y. Kim, S. S. Cruz, K. Lee, B. O. Alawode, C. Choi, Y. Song, J. M. Johnson, C. Heidelberger, W. Kong, S. Choi, K. Qiao, I. Almansouri, E. A. Fitzgerald, J. Kong, A. M. Kolpak, J. Hwang, and J. Kim, “Remote epitaxy through graphene enables two-dimensional material-based layer transfer,” Nature, vol. 544, pp. 340-343, 2017. The analysis revealed that all remoted epilayers 18 are single-crystalline with a crystalline orientation resembling that of the underlying substrates. These remoted epilayers 18 can be lifted off or exfoliated by 2D material based layer transfer (2DLT).
Referring to
The surface quality of the resulting GaN epilayers was investigated by measuring the root mean square (RMS) roughness through Atomic Force Microscope (AFM).
In step 108, an optional II-Nitride buffer layer 12 may be formed on the substrate 14 by using a MBE or MOCVD growth tool, as previously described in detail above.
In step 110, a 2D material interlayer 16 is formed by direct growth onto the optional buffer layer 12, or if there is no buffer layer, on the substrate 14, using a MBE or MOCVD growth tool, as previously explained in detail above.
In step 120, a III-Nitride epitaxial layer 18 is remotely grown by remote epitaxy on the 2D material interlayer 16, as previously described in detail above. The epitaxial layer 18 may be exfoliated using the methods described in applicant's co-pending U.S. patent application titled “Fabrication of N-face III Nitrides by Remote Epitaxy.”
The exfoliated epilayers may be applied to form High-Electron-Mobility Transistors (HEMTs), Light-Emitting Diodes (LEDs), Photodiodes (PDs), Laser Diodes (LDs), Solar Cells (SCs), and Light-Emitting Solar Cells (LESCs) as shown in
An “upside-down” HEMT structure may be formed on the exfoliated epilayer 18, as explained with respect to
A gallium nitride cap layer 120 may be directly grown by any known method onto the AlGaN barrier layer 110. As an example, the GaN cap layer 120 may have a thickness in the range of about one nm to ten nm, the AlGaN barrier layer 110 may have a thickness in the range of about one nm to 100 nm (where AlxGa1-xN and x=0.26), the AlN interlayer 100 may have a thickness in the range of about one nm to ten nm, and the GaN buffer layer 18 may have a thickness in the range of about one μm to ten μm. The preferred example thicknesses for each layer are about three nm for the GaN cap layer 120, 25 nm for the AlGaN barrier layer 110, one nm for the AlN interlayer 100, and two μm for the GaN buffer layer 18.
As shown in
While various embodiments of the present invention have been described above, it should be understood that they have been presented by way of example only and not by limitation. Further, although several embodiments of the present invention have been discussed, numerous additions, deletions, substitutions, and/or alterations to the invention may be readily suggested to one of skill in the art without departing from the scope of the appended claims. It is intended therefore that the appended claims encompass such additions, deletions, substitutions, and/or alterations. Numerous changes to the disclosed embodiments can be made in accordance with the disclosure herein without departing from the spirit or scope of the invention. Thus, the breadth and scope of the present invention should not be limited by any of the above described embodiments. Rather, the scope of the invention should be defined in accordance with the following claims and their equivalents. Although the invention has been shown and described with respect to one or more implementations, equivalent alterations and modifications will occur to others skilled in the art based upon a reading and understanding of this specification and the annexed drawings. The invention includes all such modifications and alterations and is limited only by the scope of the following claims. In particular regard to the various functions performed by the above described components (assemblies, devices, circuits, etc.), the terms (including a reference to a “means”) used to describe such components are intended to correspond, unless otherwise indicated, to any component which per forms the specified function of the described component (i.e., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary implementations of the invention. In addition, while a particular feature of the invention may have been disclosed with respect to only one of several implementations, such feature may be combined with one or more other features of the other implementations as may be desired and advantageous for any given or particular application. Furthermore, to the extent that the terms “includes”, “having”, “has”, “with”, or variants thereof are used in either the detailed description or the claims, such terms are intended to be inclusive in a manner similar to the term “comprising.”
