Patent Grant
8934087
The invention relates to sensor technology, and more particularly, to dual mode focal plane arrays.
Focal plane arrays (FPAs) can be used in numerous imaging systems. In some cases, an FPA is configured for dual mode operation (active and passive modes). However, there are numerous non-trivial issues associated with such systems.
One embodiment of the present invention provides an imaging device. The device includes a sensor array of M×N pixels, wherein all available M×N pixels are used for imaging of a target during a passive mode, and a subset of the available M×N pixels is used for imaging during an active mode. The device further includes a readout circuit operatively coupled to the M×N sensor array, wherein each pixel of the array is associated with an input cell of the readout circuit, and the input cells associated with the subset of the available M×N pixels are configured differently than the other available input cells. In some cases, the active mode is used for both wide field of view (WFOV) and narrow field of view (NFOV) imaging. In some cases, the passive mode is used for WFOV imaging. In some cases, in the active mode, input cells not associated with the subset of the available M×N pixels can be powered down. In some cases, the device includes a gimbal for placing and maintaining the target within a region of the sensor array defined by the subset of the available M×N pixels. In some cases, the subset of the available M×N pixels is used in both the passive and active modes. In some cases, the input cells associated with the subset of the available M×N pixels are configured as high-speed active input cells, and a corresponding speed of the other available input cells is slower (e.g., wherein high-speed and slower are with respect to response time). In some cases, the device supports both active ranging in the active mode and passive tracking in the passive mode. In some cases, the active ranging includes both coarse and fine resolution ranging. In some cases, passive acquisition of the target by the device has a set passive mode integration time, thereby leaving a remainder of a Master Frame period for active ranging. In some such cases, the active ranging includes receiving multiple active range gate samples via one or more of the available M×N pixels in the subset. Numerous variations will be apparent in light of this disclosure. For example, another embodiment of the present invention provides a system-on-chip comprising the imaging device as variously defined in this paragraph. Another embodiment provides a countermeasure system comprising the imaging device as variously defined in this paragraph.
Another embodiment of the present invention provides a directed infrared countermeasure system. The system includes a sensor array of M×N pixels, wherein all available M×N pixels are used for detecting infrared radiation of a target during a passive mode, and a subset of the available M×N pixels is used for detecting during the passive mode and an active mode. The system further includes a readout circuit operatively coupled to the M×N sensor array, wherein each pixel of the array is associated with an input cell of the readout circuit, and the input cells associated with the subset of the available M×N pixels are configured differently than the other available input cells. The system further includes a laser for providing transmitted laser pulses during the active mode, and a gimbal for placing and maintaining the target within a region of the sensor array defined by the subset of the available M×N pixels. In some cases, the active mode is used for both wide field of view (WFOV) and narrow field of view (NFOV) detecting, and the passive mode is used for WFOV detecting. In some cases, in the active mode, input cells not associated with the subset of the available M×N pixels can be powered down. In some cases, the input cells associated with the subset of the available M×N pixels are configured as high-speed active input cells, and a corresponding speed of the other available input cells is slower (e.g., wherein high-speed and slower are with respect to response time). In some cases, the system supports both active ranging in the active mode and passive tracking in the passive mode, and the active ranging includes both coarse and fine resolution ranging.
Another embodiment of the present invention provides a countermeasure system. The system includes a sensor array of M×N pixels, wherein all available M×N pixels are used for detecting infrared radiation of a target during a passive mode, and a subset of the available M×N pixels is used for detecting during the passive mode and an active mode. The active mode is used for both wide field of view (WFOV) and narrow field of view (NFOV) detecting, and the passive mode is used for WFOV detecting. The system further includes a readout circuit operatively coupled to the M×N sensor array, wherein each pixel of the array is associated with an input cell of the readout circuit, and the input cells associated with the subset of the available M×N pixels are configured as high-speed (e.g., with respect to response time) active input cells, and a corresponding speed of the other available input cells is slower. The system further includes a laser for providing transmitted laser pulses during active mode ranging, and a gimbal for placing and maintaining the target within a region of the sensor array defined by the subset of the available M×N pixels. The system supports both active ranging in the active mode and passive tracking in the passive mode, and the active ranging includes both coarse and fine resolution ranging, and the active ranging includes receiving multiple active range gate samples via one or more of the available M×N pixels in the subset. In some cases, the active mode, input cells not associated with the subset of the available M×N pixels can be powered down.
The features and advantages described herein are not all-inclusive and, in particular, many additional features and advantages will be apparent to one of ordinary skill in the art in view of the drawings, specification, and claims. Moreover, it should be noted that the language used in the specification has been principally selected for readability and instructional purposes, and not to limit the scope of the inventive subject matter.
a and 2b are flowcharts demonstrating example target engagement and situation awareness modes, respectively, that can be carried out by the countermeasure system of
a-3j illustrate timing diagrams that correspond to various activities carried out during the target engagement mode process flow shown in
k and 3l each illustrates an example timing diagram showing part of a DIRCM sequence for passive track with ranging starting at the beginning, at short range first, in accordance with an embodiment of the present invention.
a illustrates a block diagram of an example sensor integrated circuit device that can be used, for example, in the countermeasure system of
b illustrates an example analog fan-out multiplexer that can be used in the sensor of
a illustrates an example sensor command frame word, configured in accordance with an embodiment of the present invention.
b illustrates an example laser command frame word, and
d illustrates various timing diagrams that correspond to the sensor and laser command words of
a and 7b each illustrates a schematic of an integrating differential amplifier that can be used in the input unit cell of the sensor circuit of
a and 8b each illustrates a schematic of an integrating differential amplifier that can be used in the input unit cell of the sensor circuit of
c and 8d each illustrate an example optional compensation circuit that can be used the amplifier of
a illustrates a blanking interval timing diagram with integration intervals, in accordance with one embodiment of the present invention.
b illustrates a laser blanking and integration timing diagram in accordance with one embodiment of the present invention.
a illustrates the active time delay integration (TDI) function, in accordance with an embodiment of the present invention.
b illustrates a TDI timing diagram with multiple output pulses and multiple integration intervals, in accordance with one embodiment of the present invention.
a illustrates a range gating timing diagram, in accordance with an embodiment of the present invention.
b illustrates a fine resolution gating control timing diagram, in accordance with an embodiment of the present invention.
As will be appreciated, the figures are not necessarily drawn to scale but rather are presented to assist in understanding of the various example embodiments of the present invention. For instance, durations of time depicted in the various timing diagrams may be depicted as being longer than they actually are, so that events occurring within that duration can be depicted with better clarity.
Techniques are disclosed for providing a multi-zone sensing array configured for use in a dual-mode active/passive sensor system. In some embodiments, the techniques can be used to minimize or otherwise reduce power dissipation in sensor arrays (e.g., focal plane array, or FPA), while further providing the ability to readout the active returns rapidly. In some embodiments, this allows for achieving the benefits of a multi-mode active/passive FPA without incurring the large power dissipation if the entire array used dual-mode receivers. The techniques can be implemented, for example, by using the full N×M array format for target acquisition in a passive imaging mode, and then, with the aid of a gimbal for instance, place the region-of-interest in a central portion of the array configured with dual-mode active/passive pixel receivers to provide three-dimensional imaging. Such techniques are capable of, for example, supporting both active and passive operating modes of a countermeasure system. The passive operating mode involves observing a target based on radiation emanated from the target itself, and allows for azimuth and elevation information of the target to be learned. The active operating mode involves directing a laser or other radiation to the target and observing a portion of that radiation that is reflected back from the target. This active mode allows for azimuth and elevation (x-axis and y-axis) information of the target to be learned, as well as distance (z-axis) information, so as to provide a three dimensional view of the target.
General Overview
Typically, high-speed active sensor receivers require more power than standard passive sensor receivers. Thus, and in accordance with an embodiment of the present invention, a reduced portion of the sensor array can be used for active sensing, which in turn may reduce the power dissipation. Likewise, in some such embodiments, using a reduced portion of the sensor array for active sensing may allow the frame refresh rate to be significantly increased for active mode sensing. For instance, in some embodiments, the sensor can be implemented with an FPA, and the techniques provided allow for reduction in FPA power, while simultaneously allowing for higher frame rates in the active imaging mode. With conventional windowing systems, the entire array uses dual-mode receivers in order to achieve the benefits of a multi-mode active/passive focal plane array. This results in large power dissipation.
In one specific example embodiment, a two-zone FPA is provided that includes a 256×256 array of pixels that can be used for wide field of view (WFOV) passive imagery. This full array or passive zone can be used, for example, to acquire and localize a target of interest. With the aid of a gimbaled mount, the target can be placed and maintained in a central region of the array, which in one example case is a 48×48 or pixels, which are a subset of the 256×256 pixels. This smaller array or active zone can be used, for example, to range the target of interest, including both coarse and fine resolution ranging. The readout circuitry associated with active zone pixels can be selected for the desired readout parameters for a given application, such as with respect to readout speed and power consumption.
This is a form of windowing. However, unlike with standard windowing, the active zone input cells also are capable of operating as both passive and high-speed active receiver cells. Such centrally located high-speed dual-mode active/passive cells can be used, for example, to achieve high frame rates while saving considerable power by avoiding having to make the entire array of dual-mode input cells. As will be appreciated in light of this disclosure, numerous other array sizes and multi-zone configurations may be used as well, and the claimed invention is not intended to be limited to any particular array size or specific configuration.
In some embodiments, the multi-zone techniques are employed in a countermeasure system, such as a directed infrared countermeasure a (DIRCM) system, that is structured into an operational sequence suitable for a missile countermeasure engagement. The operational sequence is based on a Master Frame (System Heart Beat) at, for example, 500 Hz or 2 msec made up of passive and active sub-frames. In one such specific example case, the passive subframe varies anywhere from, for instance, 5 μsec to 1 msec, leaving the remaining time within the Master Frame for the active ranging of the target. The precise timing facilitates both coarse and fine resolution ranging. High accuracy is enabled with a synchronized interface from the initialization of the commands to the laser and the sensor to start the time increment counting or ranging to the target, in accordance with an embodiment of the present invention.
The synchronized DIRCM architecture configured in accordance with one such embodiment utilizes the previous Master Frame period to send the laser commands for the next operating period, all synchronized to the master clock. In some such embodiments, to eliminate any jitter and latency variations between the command and actual firing of the laser, a time zero (T0) sensor is provided to measure the time at which the actual laser pulse leaves the DIRCM system, and it is this laser departure time the sensor of the system's receiver uses as reference to set the frame start and timing measurements. In one such specific case, the synchronized interface for the laser and sensor utilizes one or more command word structures to describe the operating parameters for the next Master Frame sequence (which may include specifying active and passive operation modes for the sensor array). Numerous variations on this command and control protocol will be apparent in light of this disclosure.
Thus, a system interface architecture configured in accordance with one example embodiment of the present invention includes the following three elements:
1) a high-speed interface with laser and sensor command control words synchronized with the master clock and an embedded System Heart Beat for every Master Frame period;
2) a laser and sensor command and control protocol within the Master Frame period; and
3) a T0 sensor so that the time measurement can be incorporated into the timing interface.
System Architecture
The ECU of the system includes an executive processor, which generally directs functionality of the system, and operates in conjunction with the laser sub-assembly processor and the pointer/tracker sub-assembly processor to carryout countermeasure functionality as conventionally done. In addition, the three sub-assembly processors (or a subset thereof) are further configured to execute the synchronized interface as described herein.
In this example embodiment, the laser sub-assembly includes a processor and laser pump, and is further configured to generate a master clock signal which has embedded therein a System Heart Beat. The pointer/tracker sub-assembly is configured to generate a slave clock and further includes a T0 sensor to measure the time a laser pulse leaves the system, which the sensor of the pointer/tracker sub-assembly (e.g., camera with focal plane array and readout integrated circuit) uses as reference to set frame start and timing measurements. The laser output is guided to the incoming threat in effort to achieve threat negation. Note that in other embodiments, the various clocks can be generated in other locations, or by dedicated clock generation circuits that provide the desired clock signal to the corresponding circuitry. In addition, other circuitry not shown in the sub-assemblies of
a and 2b are flowcharts demonstrating example target engagement and situation awareness modes, respectively, that can be carried out by the countermeasure system of
As can be seen, the situation awareness mode involves providing sensor imagery to the ECU for area assessment by, for example, requesting personnel so that potential threats or targets can be assessed when appropriate (e.g., for reconnaissance missions to image enemy activity, or to image ground surface during landing when pilot visibility is impaired). In this mode, the sensor passively observes the area within its wide field of view (WFOV), which can be set as desired. In one example embodiment, the sensor of the pointer/tracker assembly includes a focal plane array (FPA) configured with a 256 by 256 array of pixels (or a sub-set thereof) that can be used in this passive observation/imaging mode. Further note that multiple such sensors can be deployed, so that a wider field of regard can be provided, up to 360°. With no perceived threat (or other target of interest), the ECU may, for example, be provided with a Cue signal from a system such as an operational command system, or any other system capable of issuing a directive to the DIRCM system) directing continued passive observation/imaging to the jam head, which generally includes the laser and pointer/tracker sub-assemblies shown in
However, when the missile warning system declares a missile threat and sends a Cue to the DIRCM system, the target engagement mode shown in
With further reference to the example embodiment of
With further reference to the example embodiment of
With further reference to the example embodiment
Thus, as will be appreciated in light of this disclosure, the jam head of the countermeasure system can be configured to implement a number of operational modes, including time delay integration (TDI), laser blanking, coarse resolution ranging, and fine resolution ranging. In some such embodiments, these modes can be implemented or otherwise directed by the sensor of the pointer/tracker sub-assembly. In one specific such example case, the sensor is implemented as a system-on-chip configuration having a sensor portion and readout integrated circuit (ROIC) portion, and the various functional modes are carried out by or otherwise directed by the ROIC. In some such cases, the sensor and ROIC portions can be operatively coupled to one another, for example, via an interconnect using any suitable hybridization process. The interconnect may be, for instance, indium bumps or other suitable interconnect material that can be used in the hybridization of the sensor and ROIC portion. In other example cases, the sensor portion can share the same substrate with the ROIC portion.
With further reference to the example embodiment of
With further reference to the example embodiment
With further reference to the example embodiment
k-l each illustrate an example timing diagram showing part of a DIRCM sequence for passive track with ranging starting at the beginning, at short range first, in accordance with an embodiment of the present invention.
Multi-Mode High-Speed Sensor
As will be appreciated in light of this disclosure, a multi-mode infrared (IR) sensor configured in accordance with an embodiment of the present invention includes the capability to support passive and active IR operation. In one specific such embodiment, the multi-mode capability of the sensor is built into a digital ROIC, which is bump-bonded or otherwise integrally coupled with the sensor detector array so as to provide a system-on-chip. The multi-mode sensor chip or assembly (including the sensor portion and the readout portion) can be configured with the following capabilities or any subset thereof, in accordance with some example embodiments of the present invention:
1) High-Speed Sensor Full FOV digital data readout;
2) Very High-Speed Windowed FOV digital data readout;
3) Real-time programmability for long to very short integration times independent of sensor frame start time (integration time can be positioned anywhere in time within the sensor's frame period);
4) Overlap Integration time and data readout (Read while Integrate);
5) Time Delay Integration (TDI) active mode operation;
6) Seamless switching between full FOV and Windowed FOV and normal and high-speed modes;
7) Menu driven operation mode;
8) Power management; and
9) High-Speed Synchronized Serial Command and Control Interface.
The sensor portion can be implemented, for example, using any number of sensor technologies. In one example embodiment, the sensor is implemented with an FPA, such as a HgCdTe 30 micron pitch FPA. As will further be appreciated in light of this disclosure, the sensor materials, pitch, resolution (pixels), and other features will be dependent on particulars of the given application, such as the wavelength range of interest, radiation intensity, image resolution and quality, desired modes of operation, and available image processing power. The claimed invention is not intended to be limited to any particular sensor configuration. Details of the readout portion are discussed in more detail with reference to
a illustrates a block diagram of a sensor integrated circuit device configured in accordance with an embodiment of the present invention. As can be seen, the device includes a sensor portion and a readout portion. As will be appreciated in light of this disclosure, the device can be implemented using any number of semiconductor material systems and standard processing such as complementary metal oxide semiconductor (CMOS) processes. As will be further appreciated in light of this disclosure, such a configuration can be implemented to provide a system-on-chip capability to support various countermeasure and surveillance systems, such as DIRCM systems, multi-spectral surveillance cameras with range-finder capability, and 3D laser-radar (LADAR) sensor systems.
The sensor portion of this example embodiment includes an M×N array of detectors, and includes passive mode zone and a passive/active dual mode zone. The passive mode zone includes all M×N pixels of the array, while the dual mode zone includes only a subset of those pixels, and is generally designated as M′×N′. As will be apparent, the dual mode zone of the array can be used in both passive and active modes. During active mode operation, the outer passive zone pixels can be turned off to conserve power, in accordance with some embodiments. As will be appreciated in light of this disclosure, the dual mode zone of the array can be associated with readout circuitry including input unit cell pre-amplifiers that are configured for faster response time, which in some instances may be associated with higher power consumption, relative to the outer portion of the array. For instance, in one specific example, the sensor portion is implemented with a 256×256 array of HgCdTe detectors on 30 μm centers (pitch), and the readout portion is designed with a high-speed, low noise pre-amplifier that optionally includes both high and low gain modes for the input unit cells of the dual mode zone (example embodiments of which are discussed with reference to
With further reference to the example device of
The two serial digital data output drivers can be, for example, high-speed LVDS drivers, or any other suitable digital driver technology that can provide the desired performance criteria of the given application. With respect to the column cells, multiple ADCs can be configured per column of detectors to facilitate higher speed readout. For instance, in one example embodiment, 1024 column cells servicing each half of the sensor portion are provided, with eight 14-bit ADCs per column of detectors (each ADC associated with a 14-bit latch), thereby processing eight rows at a time to facilitate higher readout speed. In such an example case, the 4×N column cells in this example embodiment can be used, for example, to allow four rows to be read out simultaneously on each half of the sensor portion, as will be explained in turn. This provides a 4× speed advantage over reading out only a single row at a time for each half With column cells along the top and bottom halves of the sensor portion, this example embodiment achieves an 8x speed advantage over an FPA that only reads out a single row at a time.
In more detail, and with further reference to the example embodiment of
As will be appreciated, each of the ADCs can be associated with a preamplifier circuit, in accordance with some embodiments. For example, each of the column cells can be configured with an ADC for converting an analog detector signal to a digital signal, and an amplifier or so-called preamplifier circuit for amplifying the analog detector signal to an acceptable level. Note, however, that other embodiments may be implemented without such ADCs. For example, other embodiments may be implemented with an analog multiplexer to multiplex the analog detector signals to a number of analog output ports. In a more general sense, each column cell can be configured to receive a detector signal from a corresponding column bus and to process that signal before sending it for additional processing (which could be the analog output ports of a multiplexer, as described in this paragraph, for instance).
b illustrates an example analog fan-out mux configured in accordance with one example embodiment of the present invention. As can be seen, the analog mux of this example configuration is basically a switch matrix that allows either four rows or eight rows to be readout simultaneously on each half. Thus, in some such embodiments, four rows are read out at a time in the normal mode for full FOV mode and is also the normal speed mode when windowed down to the narrow FOV of the central passive/active dual mode zone. A second high-speed readout mode is available in the narrow FOV mode with the ability to readout eight rows simultaneously on each half to double the readout rate. The analog fan-out mux is used to steer the row signals to take advantage of the additional column cells adjacent to but outside of the central column footprint of the dual mode zone. In this example embodiment shown in
In addition, with further reference to the example embodiment of
Thus, in one specific example embodiment, a multi-mode sensor device is provided that has the following structure and functions. A wide field of view (WFOV) MWIR passive imaging mode is provided using, for example, a 256×256 array of detectors on 30 μm centers with a full frame readout in less than 1 msec. Continuing with this specific example embodiment, once the target/threat is apparent within the WFOV frame, the device can be commanded into a narrow field of view (NFOV) mode using, for example, only the central 48×48 pixels (or any other subset of the total pixels available). In such embodiments, a gimbaled turret can be used to center the target/threat in the FOV, for instance. Fast frames (e.g., 10 KHz frames) can be used with the NFOV frames. Both passive imaging and active laser ranging, for 3-D localization of the target/threat, can be performed while in the NFOV mode. In one specific example embodiment, active ranging uses programmable gates having a width from 125 nsec to more than 1 μsec in steps of 62.5 nsec. A coarse resolution ranging mode allows the gates to be placed at an integral number of gate widths after the active laser pulse occurs. A fine resolution ranging mode can be configured to move the gates in steps of, for example, 31.125 nsec. To improve dynamic range for active imaging, additional gain modes can be added, if so desired. For instance, one of the gain modes can be a low gain mode with 4 million electron well capacity, and a second gain mode can be a high gain mode with a 500 kilo-electron well capacity. In one such embodiment, both of these gain settings are available for both passive and active operation modes. Also, for weak returns at long ranges, the readout is capable of integrating multiple returns together in the input unit cell at a repetition rate of, for example, 33 μsec (or any other suitable rate). This time-delay-and-integration mode allows the input signal and noise to integrate up above the rest of the readout noise for enhanced sensitivity. Switching between WFOV and NFOV modes, as well as active and passive imaging modes, can occur seamlessly between frames, with virtually no loss in acquisition time, in accordance with some such embodiments. Such structure and functions provide a system-on-chip having capability to support numerous DIRCM and other such countermeasure system configurations.
Command Word for Laser and Sensor Control
a illustrates an example sensor command frame word, configured in accordance with an embodiment of the present invention. As can be seen, this example sensor command frame word has a 24-bit structure, and can be used in the passive command word structure. Each bit is a master clock. For instance, each bit represents 62.5 nsec, and each 24-bit word represents 1.5 μsec, in accordance with one specific example embodiment. In the example case shown, each word includes a 4-bit preamble field, a 4-bit instruction field, and a 16-bit data field. The word may be used to specify any number of sensor parameters, but in one example embodiment includes the following:
The active command word structure for the laser is illustrated in
With respect to the 16-bit laser command frame word, each bit is a master clock. For instance, each bit represents 62.5 nsec, and each 16-bit word represents 1.0 μsec, in accordance with one specific example embodiment. In the example case shown, each word includes a 3-bit status field, a 4-bit sequence field, a 4-bit control field, and a 2-bit flag field (note that some bits may be unused). The 16-bit word may be used to specify any number of laser parameters, but in one example embodiment includes the following:
With respect to the 32-bit pulse descriptor word, each bit is a master clock. For instance, each bit represents 62.5 nsec, and each 32-bit word represents 2.0 μsec, in accordance with one specific example embodiment. In the example case shown, each word includes an 8-bit TX Start LSB field, an 8-bit TX Start MSB field, an 8-bit TX Duration LSB field, and an 8-bit TX Duration MSB field. In some such embodiments, the TX pulse start time is always relative to the start of the System Heart Beat. The 32-bit word may be used to specify any number of laser parameters, but in one example embodiment includes the following:
The sensor command frame word can be decoded in, for example, silicon discrete logic built into the sensor ROIC, which in some embodiments may be operating at sub-freezing temperatures (e.g., cryogenically cooled). In some embodiments, this decoding is carried out by the command decoder shown in the example embodiment of
d illustrates various timing diagrams that correspond to the sensor and laser command words of
As can be further seen in this example, the passive integration command starts with the command word shown before the start of the first Master Frame period, followed by a number of active sub-frames (generally designated N1 through N10). The diagram further illustrates what frame N+1 of execution to which that command word is linked, by way of dashed arrows. For instance, the first passive integration command word from line ‘A’ of
The second line of the example timing diagram of
The third line of the example timing diagram of
The fourth line of the example timing diagram of
Multi-Zone Approach for Active/Passive Focal Plane Array (FPA)
With the aid of a gimbaled mount, the target/threat can be placed and maintained in the central region of the array generally designated as the passive/active mode zone, and which is a subset of the M×N array, or M′×N′ (e.g., 48×48, in one example embodiment). This is a form of windowing. However, unlike with standard windowing, these central input cells also are capable of operating as both passive and high-speed active receiver cells. Such centrally located high-speed active/passive dual mode cells achieve high frame rates while saving considerable power by avoiding having to make the entire array of dual mode or other high performance input cells. As will be appreciated, the sensor assembly can be operatively coupled to the gimbal as conventionally done. Any suitable gimbal technology can be used that meets the desired performance criteria (e.g., slew speed, range of operation, size and weight, etc).
Amplifiers for Sensor Array Input Unit Cells
a illustrates a general differential amplifier that can be used in the sensor input unit cells, in accordance with some embodiments of the present invention.
In accordance with other embodiments of the present invention, the load transistor T4 can be reconfigured into a current source, thereby increasing the gain of the differential amplifier non-inverting leg used to drive transistor T5, which drives the amplifier output. This very efficiently creates, in effect, an additional stage of gain, which can be configured with an optional compensation circuit, in accordance with various such embodiments of the present invention. As will be further appreciated in light of this disclosure, the effect on amplifier performance by such a reconfiguration as provided herein is significant.
As can be seen, the amplifier includes five transistors (T1-T5) and is operatively coupled between power supplies VDD and VSS. Transistor T1 operates as a current source during normal operation, and sets the amplifier operating current or quiescent point based on the value of VQ, which can be set as desired for a given application, as can the value of the power supplies VDD and VSS. The differential pair of transistors T2 and T3 receives the differential input signal (IN+, IN−). In addition, transistors T4 and T5 operate as the load devices of the amplifier. The non-inverting leg of the differential amplifier includes T2 and T4, and the inverting leg includes T3 and T5.
In addition, and in accordance with an embodiment of the present invention, the load transistor T4 is effectively reconfigured into a current source by applying a bias Vp to its gate, and in some such cases, a compensation circuit can be added across load transistor T4. The addition of this current source has the effect of increasing the gain of the differential amplifier non-inverting leg used to drive transistor T5, which drives the amplifier output. As previously explained, the addition of this T4-based current source creates, in effect, an additional stage of gain. The bias signal Vp supplied to the gate of transistor T4 effectively sets the nominal current through transistor T4. In one example embodiment shown, the bias signal Vp is a DC voltage. The value of Vp can be set as desired. In one example embodiment, for instance, Vp is set so that the nominal current through transistor T4 is about one-half the current through T1.
In this example configuration, complementary metal oxide semiconductor (CMOS) technology is employed, in that the transistors T2 and T3 are implemented with p-channel field effect transistors (FETs), and the load transistors T4 and T5 are implemented with n-channel FETs. Other embodiments may employ, for example, use of n-channel FETs for transistors T2 and T3, with p-channel FETs for load transistors T4 and T5. In such a case, note that VDD and VSS is reversed as well, and transistor T1 would be an n-Channel FET (to be compatible with transistors T2 and T3). In other embodiments, transistors T2 and T3 may be implemented with PNP BJTs, and load transistors T4 and T5 may be implemented with NPN BJT load transistors. In still other embodiments, transistors T2 and T3 may be implemented with NPN BJTs, and load transistors T4 and T5 may be implemented with PNP BJT load transistors (again, in this latter case, VDD and VSS would be reversed as well; in addition transistor T1 can be selected to be compatible with transistors T2 and T3). Numerous variations will be apparent in light of this disclosure, and the claimed invention is not intended to be limited to any particular transistor technology. As will be appreciated, transistors T3 and T5 effectively drive the amplifier output, and transistors T2 and T4 effectively drive transistor T5.
In the example embodiment shown in
In one specific example embodiment, assuming an operating current provided by T1 in the range of 1 to 5 microamps (e.g., 2 μA), the capacitor C of the optional compensation network can be in the range, for instance, of 20 to 200 femtofarads (e.g., 100 ff), and the resistive portion of the compensation network can be implemented with, for example, a FET having a gate length in the range of 1 to 10 microns and a width of about 1 micron. Other embodiments may employ a thin film resistor for the resistive portion of the compensation network (e.g., 10 k to 100 kΩ, such as 50 kΩ. As will be appreciated, numerous specific configurations can be implemented depending on the particulars of the given application, and the claimed invention is not intended to be limited to any particular operating parameters or component types/values.
As can be further seen in
For passive tracking, an input preamplifier that provides a response time commensurate with the desired integration time for passive tracking is adequate. For instance, in passive track mode, the integration time can be selected to obtain the optimum well fill and sensitivity. Since sensor noise increases slower than the target signal, it is often possible to have an integration time sufficiently long to insure a signal to noise ratio much greater than 1. An optimum integration time strives to achieve background limited performance without saturating the well charge capacity. However for active ranging the situation is different. For example, assume that the active laser pulse and subsequent return from the target is less than 20 nsec. In order to know the distance to the target, the time of flight of the return must be captured within a very narrow integration period. In some such cases, integration periods are less or equal to 0.5 microseconds, for instance. Longer integration time may allow returns from other objects at different ranges than the target and add clutter to the image, thereby making it more difficult to distinguish the target. For active ranging, the preamplifier requirements can be much faster than desired for passive tracking, in some embodiments. In such cases, the faster response time may require more amplifier power dissipation. Rather than configuring the entire M×N array with fast dual-mode amplifiers and taking the power hit this would entail, another approach is to configure a subset of the M×N array to be dual mode with the rest of the array being configured with standard preamplifier for passive tracking. In one such embodiment, a sensor system with a gimbal is used. The target is initially acquired and tracked by the passive M×N array. Once acquired, the gimbal can be used to place the target in a subset region of the M×N array with the high speed dual-mode preamplifiers to allow active ranging in addition to passive tracking with sub-set region of the array.
An example dual-mode gain configuration is shown in
Multi-Mode ROIC
As can be seen, the amplifier may be a integrating amplifier with a capacitor Cint and Reset switch, such as the example one shown in
As will be appreciated, while a differential inverting amplifier configuration is shown (having extrinsic inverting and non-inverting inputs) in
a illustrates the laser blanking mode of the ROIC, in accordance with one embodiment of the present invention. As shown, multiple integration intervals may be defined during a given frame time. The integration interval may occur when switch S1 is closed, switch S2 is opened, and Reset is opened. As can be seen, during the blanking intervals, the magnitude of Vout may remain constant because switch S1 is opened and S2 connects the detector to Vbias. When integration resumes, the magnitude of Vout may be substantially equal to its magnitude prior to the blanking interval. Blanking time can be determined, for example, from an external signal or other command signal indicating the need to interrupt the integration cycle. The blanking intervals and integration intervals can have different durations and positions within a given frame time.
As will be appreciated, the switches S1 and S2 may be implemented to divert an unwanted detector current. This detector current may be the result of, for example, backscattering of an initial pulse, other unwanted stray light, or any unwanted detector stimulus. In one such embodiment, the connecting the detector to Vbias with switch S2, while opening switch S1, allows the voltage on the detector to be maintained while also shunting the charge created on the detector by excess stray light. Once the stray light event has passed, S2 may be opened and S1 may be closed again to resume the integration of the detector signal current. In one example embodiment, prior knowledge of stray light events can be communicated to the control electronics for these switches, which in some embodiments are implemented by the processor of the pointer/tracker sub-assembly of the example system shown in
b illustrates a laser blanking and integration timing diagram in accordance with one embodiment of the present invention. In this particular embodiment, a laser emits output pulses, as shown on the top timing diagram. In order to prevent any backscatter from the output pulse from being detected by the sensor/detector, a blanking interval may accompany the output pulse. The blanking interval is shown in the middle timing diagram, accompanying the output pulses. This laser blanking technique can eliminate self-blinding by the output laser pulse when the system is, for instance, utilizing the sensor in the passive mode. The bottom timing diagram shows the effective passive integration time of the receiver. In this embodiment, no integration occurs during the blanking interval to prevent backscatter detection. The effective passive integration time may also account for the blanking time required for each pulse.
a illustrates the active TDI mode of the ROIC, in accordance with an embodiment of the present invention. As shown in this example, the frame time can be determined by the time between Reset intervals. The timing of the switches S1, S2, and Reset can be controlled to achieve the integration of multiple returns onto a pre-amplifier integration capacitor within a single frame time. In the example embodiment shown, three integration intervals may be achieved within a frame time, although more or less integration intervals are possible within a frame time in different embodiments. The integration intervals may be identically spaced within the frame time, or may be positioned in any other desired configuration. In this particular embodiment, the reset occurs at the beginning of each frame time. The ability to perform multiple integration intervals within a given frame time can be used, for instance, to increase the sensitivity of a sensor element without altering the frame time.
b illustrates a TDI timing diagram with multiple output pulses and multiple integration intervals, in accordance with one embodiment of the present invention. As will be appreciated in light of this disclosure, TDI techniques provided herein may be implemented with a laser pulse transmitter that searches for a target location by receiving reflections of the laser output pulses from the target. Multiple output pulses may be transmitted within an image frame, with each pulse sent out at time T0 with respect to that particular pulse. Other implementations with more or fewer output pulses will further be apparent in light of this disclosure. The image frame time, and therefore the time between resets, may be determined by the output pulse repetition rate. The number of integration intervals may be determined by the number of output pulses, the amount of sensitivity desired, and/or by other factors. As the system searches to locate a target in range, more sensitivity may be required as a search in range is increased. The TDI mode may be invoked and the number of TDI samples may be increased accordingly. In the search of a return, for instance, the receiver integration period (or gate time) may be incrementally placed later in time until the desired range is covered. As shown in
According to one embodiment of the present invention, the data from the integration intervals is read out at the end of each frame time. Just before the reset, the information captured on the integration capacitor Cint may be read out, and this may introduce readout noise. In one embodiment, particularly when the return signal to read noise ratio is low, integrating multiple returns in the TDI mode can improve this signal to noise ratio. Integrating three returns within one frame, for example, may result in three times the signal to noise ratio compared to integrating only a single return. In one example embodiment, TDI techniques can allow more than one return to be captured and integrated within a frame time, allowing the desired signal level to overcome readout noise of the sensor array. In one such embodiment, this added sensitivity can be used to increase range or lower the optical power of the active system. Other such benefits will be apparent in light of this disclosure.
Range Gating Functionality
While actively searching for a signal during a frame time, it may be desirable to customize the position of the integration interval within a frame time. When searching for an optical return or reflection after sending out an initial output pulse, the timing of the optical return within a frame time may correspond to a distance in range. According to one embodiment of the present invention, range gating can provide high-speed missile countermeasure systems with accurate knowledge of a missile's distance and velocity vector. When searching for a missile in range, it may be desirable to change the position of the integration interval within a frame seamlessly from one frame interval to the next. This may allow the integration intervals to not be strictly dependent upon the start of the frame time.
a is a time diagram illustrating range gating, in accordance with an embodiment of the present invention. As can be seen, the location of the gate time (also called the integration interval) within a frame can be changed from frame to frame seamlessly. In one such example, the gate time shifting is accomplished through manipulating switches S1, S2, and Reset as shown in
Fine Resolution Gating Control
Range gating generally involves staggering the integration intervals within a frame time based on over sampling of the target, and can help accomplish fine resolution gating control in accordance with some example embodiments of the present invention. When searching for a signal, such as an optical return, the resolution of the detection is often limited by the size of the integration interval, or gate time. While a given static or otherwise uncustomizable gate timing may be suitable for a given application, that particular gate timing may not be suitable for other applications. In addition, greater resolution may be required than any single gate time can allow. In these instances, the resolution of a typical detector may be limited to the available gate time.
b illustrates a timing diagram that demonstrates fine resolution gating control, in accordance with an embodiment of the present invention. The footprint of the optical return may be much narrower than the gate time, and in this particular example, the optical return is ⅖ the size of any given integration interval. A range gating scheme may be configured in accordance with an embodiment of the present invention, such that the gate time for each of a plurality of laser pings is shifted within the frame time by subintervals of the gate time. In the example shown, for instance, the gate is shifted in time by ⅕ of the total gate time. Other embodiments can have other such subintervals. In any case, subinterval shifting of the gate time within the frame time (and/or between resets of the integration capacitor) may be accomplished through the range gating techniques are previously described, such as by manipulating the S1, S2, and Reset switches in accordance with some embodiments. The technique may be used, for example, for fine gating control on a frame to frame basis to increase LIDAR ranging resolution, in accordance with some embodiments.
In the particular example shown in
The output response of each gate time may be recorded, and in one example embodiment a centroid algorithm can be used to weight the returns according to their amplitude and time-position. As will be appreciated in light of this disclosure, this hyper-resolution gating technique may resolve shorter returns than a single integration interval is capable of doing. This technique may also allow for much higher resolution in detecting an optical return (or other such ping-based reflection from the target) without increasing the speed or decreasing the size of the integration intervals, in accordance with some embodiments.
Thus, in accordance with an embodiment of the present invention, rather than narrowing the integration intervals, the position of the integration intervals can be shifted in time at subintervals of the gate width. After returns for each of the subintervals are acquired, they can be analyzed or processed to determine the probability of an object at a finer resolution than would be possible without using narrower pulses. Note that the laser pings and corresponding gate intervals can be executed, for example, in different consecutive frames in some embodiments, or in consecutive sub-frames of a given Master Frame in other embodiments.
The foregoing description of the embodiments of the invention has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of this disclosure. It is intended that the scope of the invention be limited not by this detailed description, but rather by the claims appended hereto.
This application claims the benefit of and priority to U.S. Provisional Application Nos. 61/481,090, 61/480,899, 61/481,108, and 61/481,101, each filed on Apr. 29, 2011, and each of which is herein incorporated by reference in its entirety. In addition, this application is related to U.S. application Ser. No. 13/460,183 titled “Multi-Mode High Speed Sensor”, and Ser. No. 13/460,118 titled “Synchronized Countermeasure System Architecture”, each of which was filed on Apr. 30, 2012 and is herein incorporated by reference in its entirety.
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