NONVOLATILE SEMICONDUCTOR MEMORY DEVICE WITH TRENCH STRUCTURE

Abstract

In a nonvolatile semiconductor memory device, a semiconductor substrate has trenches formed to extend in parallel. A first electrode formed on the semiconductor substrate through an insulating film in each of the trenches, and a second electrode is formed on the first electrodes and the semiconductor substrate through the insulating film. A diffusion layer is formed in a predetermined depth of the semiconductor substrate in association with each of the trenches, and a trap film as a part of the insulating film configured to trap electric charge. A channel region is formed between adjacent two of the diffusion layers without any diffusion layer.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a plan view showing the structure of a nonvolatile semiconductor memory device according to a first embodiment of the present invention;

FIGS. 2A and 2B are cross sectional views showing the sectional structures of the nonvolatile semiconductor memory device in the first embodiment along a line A-A′ and a line B-B′ of FIGS. 1;

FIG. 3 is a diagram showing a program operation of the nonvolatile semiconductor memory device in the first embodiment;

FIG. 4 is a diagram showing an erasing operation of the nonvolatile semiconductor memory device in the first embodiment;

FIG. 5 is a diagram showing a reading operation of the nonvolatile semiconductor memory device in the first embodiment;

FIGS. 6A and 6B are cross-sectional views showing modifications of the nonvolatile semiconductor memory device according to the first embodiment;

FIG. 7 is a diagram symbolically showing a memory cell of the nonvolatile semiconductor memory device in the first embodiment;

FIG. 8 is a circuit diagram showing the configuration of a memory cell array in the nonvolatile semiconductor memory device according to the first embodiment;

FIG. 9 is a table showing voltages in various operations of the nonvolatile semiconductor memory device operates according to the first embodiment;

FIGS. 10A to 10E are cross sectional views showing a method of manufacturing the nonvolatile semiconductor memory device according to the first embodiment;

FIG. 11 is a cross sectional view showing a further modification example of the nonvolatile semiconductor memory device according to the first embodiment;

FIG. 12 is a plan view showing the structure of the nonvolatile semiconductor memory device according to a second embodiment of the present invention;

FIGS. 13A and 13B are cross sectional views showing sectional structures along a line A-A′ and a line B-B′ in FIG. 12;

FIG. 14 is a diagram showing a program operation of the nonvolatile semiconductor memory device in the second embodiment;

FIG. 15 is a diagram showing an erasing operation of the nonvolatile semiconductor memory device in the second embodiment;

FIG. 16 is a diagram showing a reading operation or the nonvolatile semiconductor memory device in the second embodiment;

FIGS. 17A and 17B are cross sectional views showing modification examples of the nonvolatile semiconductor memory device in the second embodiment;

FIG. 18 is a circuit diagram showing the structure of a memory cell array in the nonvolatile semiconductor memory device according to the second embodiment; and

FIG. 19 is a table showing voltages in various operations of the nonvolatile semiconductor memory device operates according to the second embodiment.

Claims

1. A nonvolatile semiconductor memory device comprising: a semiconductor substrate having trenches formed to extend in parallel;a first electrode formed on said semiconductor substrate through an insulating film in each of said trenches;a second electrode formed on said first electrodes and said semiconductor substrate through said insulating film;a diffusion layer formed in a predetermined depth of said semiconductor substrate in association with each of said trenches; anda trap film as a part of said insulating film configured to trap electric charge,wherein a channel region i,s formed between adjacent two of said diffusion layers without any diffusion layer.

2. The nonvolatile semiconductor memory device according to claim 1, wherein said diffusion layer is formed in each of inter trench portions of said semiconductor substrate.

3. The nonvolatile semiconductor memory device according to claim 2, wherein said trap film is formed between said second electrode and said semiconductor substrate in said trench.

4. The nonvolatile semiconductor memory device according to claim 1, wherein said diffusion layer is formed in each of portions of said semiconductor substrate under said trenches.

5. The nonvolatile semiconductor memory device according to claim 4, wherein said trap film is formed between said first electrode and the sidewall of said trench at least.

6. The nonvolatile semiconductor memory device according to claim 1, wherein a portion of said insulating film other than said trap film is different from said trap film in composition.

7. The nonvolatile semiconductor memory device according to claim 1, wherein said first electrode is formed to fill a whole of said trench, and said second electrode is formed on said semiconductor substrate through said insulating film.

8. The nonvolatile semiconductor memory device according to claim 1, wherein said trenches are formed to extend in a first direction, said diffusion layer is formed to extend in the first direction,said first electrode is formed to extend in the first direction, andsaid second electrode is formed to extend in a second direction orthogonal to the first direction.

9. The nonvolatile semiconductor memory device according to claim 1, wherein said trap film comprises; a laminate film of an oxide film and a nitride film.

10. The nonvolatile semiconductor memory device according to claim 1, wherein said trap film is an insulating film in which a metal dot is formed.

11. A nonvolatile semiconductor memory device comprising: a semiconductor substrate having trenches;a source and a drain formed in said semiconductor substrate on both sides of a first trench of said trenches to sandwich said first trench;a word gate provided on said semiconductor substrate through an insulating film in a bottom of said first trench;a control gate formed on said semiconductor substrate through said insulating film to fill a remaining portion of said first trench; anda trap film formed between said control gate and said semiconductor substrate in said first trench as a part of said insulating film to trap electric charge.

12. The nonvolatile semiconductor memory device according to claim 11, wherein a channel region between said source and said drain is formed along said first trench.

13. The nonvolatile semiconductor memory device according to claim 11, wherein said source is connected with a first bit line extending in a first direction, said drain is connected with a second bit line extending in the first direction,said word gate is connected with a first word line extending in the first direction, andsaid control gate is connected with a second word line extending in a second direction orthogonal to the first direction.

14. A nonvolatile semiconductor memory device comprising: a semiconductor substrate having first and second trenches which are adjacent to each other;a source formed in said semiconductor substrate in said first trench;a drain formed in said semiconductor substrate in said second trench;a first control gate formed on said semiconductor substrate through an insulating film in a bottom of said first trench;a second control gate formed on said semiconductor substrate through said insulating film in a bottom of said second trench;a word gate formed said semiconductor substrate and said first and second control gates; anda trap film formed between said first control gate and said semiconductor substrate in said first trench arid between said second control gate and said semiconductor substrate in said second trench as a part of said insulating film to trap electric charge.

15. The nonvolatile semiconductor memory device according to claim 14, wherein a channel region between said source and said drain is formed along an inter-trench portion of said semiconductor substrate.

16. The nonvolatile semiconductor memory device according to claim 14, wherein said source is connected with a first bit line extending in a first direction, said drain is connected with a second bit line extending in the first direction,said first control gate is connected with a first word line extending in the first direction,said second control gate is connected with a second word line extending in the first direction, andsaid word gate is connected with a third word line extending in a second direction orthogonal to the first direction.

17. The nonvolatile semiconductor memory device according to claim 14, wherein a portion of said insulating film other than said trap film is different from said trap film.

18. The nonvolatile semiconductor memory device according to claim 14, wherein said trap film comprises: a laminate film of an oxide film and a nitride film.

19. The nonvolatile semiconductor memory device according to claim 1, wherein said trap film is formed as the part of said insulating film in which a metal dot is formed.