The subject matter disclosed herein relates to optical-electronic systems that include optical interconnects to distribute signals to or among integrated circuits.
Optical interconnects may be used in electronic circuits. For example, optical isolation devices may be used in mixed signal applications involving communication systems. Optical interconnect technology may also be used in applications involving edge interconnects to exchange signals among a number of integrated circuits. For example, optical interconnects may be used to communicate among integrated circuits in place of leads and copper circuit board connections.
Non-limiting and non-exhaustive embodiments will be described with reference to the following objects, wherein like reference numerals refer to like parts throughout the various objects unless otherwise specified.
In the following detailed description, numerous specific details are set forth to provide a thorough understanding of claimed subject matter. However, it will be understood by those skilled in the art that claimed subject matter may be practiced without these specific details. In other instances, methods, apparatuses, or systems that would be known by one of ordinary skill have not been described in detail so as not to obscure claimed subject matter.
Reference throughout this specification to “one embodiment” or “an embodiment” may mean that a particular feature, structure, or characteristic described in connection with a particular embodiment may be included in at least one embodiment of claimed subject matter. Thus, appearances of the phrase “in one embodiment” or “an embodiment” in various places throughout this specification are not necessarily intended to refer to the same embodiment or to any one particular embodiment described. Furthermore, it is to be understood that particular features, structures, or characteristics described may be combined in various ways in one or more embodiments. In general, of course, these and other issues may vary with the particular context of usage. Therefore, the particular context of the description or the usage of these terms may provide helpful guidance regarding inferences to be drawn for that context.
As used to describe such embodiments, terms “above”, “below”, “upper”, “lower”, “horizontal”, “vertical”, and “side” describe positions relative to an arbitrary axis of a module, for example. In particular, “above” and “below” refer to positions along an axis, wherein “above” refers to one side of an element and “below” refers to an opposite side of the element. Relative to such an “above” and “below”, “side” refers to a side of an element that is displaced from an axis, such as the periphery of a structure, for example. Further, it is understood that such terms do not necessarily refer to a direction defined by gravity or any other particular orientation reference. Instead, such terms are merely used to identify one portion versus another portion. Accordingly, “upper” and “lower” may be equivalently interchanged with “top” and “bottom”, “first” and “second”, “right” and “left”, and so on. “Horizontal” may refer to an orientation perpendicular to an axis while “vertical” may refer to an orientation parallel to the axis.
Embodiments described herein include a photonic module comprising semiconductor packaging to integrate a plurality of integrated circuit (IC) chips with electronic and optical transmission paths. For example, such a photonic module may be used to connect various VLSI IC chips with an ultra-high bandwidth, low-power optical network. A photonic module may include one or more interface IC chips to provide a uniform interface between “3rd party” VLSI chips, a term well known to those skilled in the art, and a photonic network. In one implementation, an optical fiber may be used for transmitting input signals to and output signals from a photonic module.
In an embodiment, a photonic module may include a number of semiconductor layers or planes on which IC chips, photonic components, optical waveguides, and electrical conductors, among other things, reside. In one implementation, a photonic module may comprise a portion of a communication network. For example, such a network may comprise a hierarchical arrangement of components including IC chips, printed circuits boards, an equipment rack, a local area network (LAN), and a wide area network (WAN). Such components may communicate with one another via electronic and/or optical signals.
In one embodiment, a photonic module may comprise a plurality of metal pads to receive IC chips, such as CMOS chips, for example. Such IC chips may be mounted on a particular layer of a module comprising a silicon-on-insulator (SOI) wafer. Upon or after receiving electrical signals from the IC chips, electrical interface circuits may modify the electrical signals by changing any of a number of parameters of the electrical signals, such as voltage, current, frequency, and wave shape, just to name a few examples. Electrical signals, thus modified and coupled to opto-electronic components known as modulators may allow the IC chips to electronically modulate the optical signal in an adjacent waveguide.
An optical filter may subsequently isolate a particular optical wavelength signal from the waveguide and route it to a photodetector for optical to electronic conversion. Consequently, the photodetector may receive the optical wavelength signal and generate a photo-current in proportion to the intensity of the optical wavelength signal. An amplifier, which may comprise a trans-impedance amplifier (TIA), for example, may receive the photo-current to generate a voltage in proportion to the photo-current. Such an amplifier may be located on a same module layer as the IC chips of the photonic module. An electronic circuit may then convert the output of the amplifier to voltage levels appropriate for driving electronic buffers on one or more of the IC chips.
A photonic layer on the SOI wafer may comprise silicon optical waveguides and silica optical waveguides to transmit and receive optical signals for communication among the IC chips and other components of the photonic module. In some implementations, an SOI wafer may comprise silicon dioxide (SiO2), though claimed subject matter is not limited in this respect.
In another embodiment, a photonic module may comprise an SOI wafer, one or more photonic components on the SOI wafer, and a plurality of metal pads to receive a number of IC chips to be mounted on the SOI wafer. The IC chips may be mounted face-down on the SOI wafer. In one implementation, metal pads may comprise micro-bumps or copper pillars. The photonic module may further comprise silicon optical waveguides to transfer optical signals between or among terminals of individual IC chips. In one implementation, such silicon optical waveguides may comprise portions of the SOI wafer. In addition to the silicon optical waveguides, the photonic module may further comprise silica optical waveguides to transfer optical signals among terminals of different the IC chips, for example. Silicon optical waveguides and silica optical waveguides may be formed on a same SOI wafer. A plurality of optical interfaces on the SOI wafer may interconnect silicon optical waveguides and silica optical waveguides. In one implementation, a cladding layer comprising silicon dioxide (SiO2) may cover silicon optical waveguides and silica optical waveguides.
In yet another embodiment, a photonic module may comprise an SOI wafer, one or more photonic components in a first layer on the SOI wafer, and a plurality of IC chips mounted in a separate layer on the SOI wafer which is electrically and optically isolated from the SOI wafer. The photonic module may further comprise an interface chip to modify voltages of electronic signals communicated among the plurality of IC chips and the one or more buffers driving the photonic components. In an example implementation, the interface chip may be flip bonded on the SOI wafer at a same level as the IC chips.
In an embodiment, a photonic module may be fabricated by forming a plurality of optical resonators, optical modulators, diode lasers, and/or optical filters on an SOI wafer, and etching a portion of the SOI wafer to form silicon optical waveguides. In an implementation, silica optical waveguides may be formed on the SOI wafer so that the silica optical waveguides may interconnect with the silicon optical waveguides so as to enable transfer of optical signals between silica and silicon optical waveguides.
In another embodiment, a photonic module may be fabricated by etching an SOI wafer to establish locations of a plurality of photonic components including silicon optical waveguide, and processed further by depositing a silicon dioxide film including germanium-oxide doping on the etched SOI layer, and annealing the silicon dioxide-based film to form a silica layer. The concentration of germanium oxide in the silica layer may be varied. The silica layer may be patterned by lithography and etching to form a silica optical waveguide coupled to the silicon optical waveguides at various locations on the SOI wafer, for example. In an alternate embodiment, other methods to form silica waveguide can be used. In yet another embodiment, materials with optical properties similar to silica such as organic optical polymers, can be used to form waveguides on SOI wafer.
In one implementation, photonic module 205 may include IC chip portion 250 including one or more IC chips, fabricated with CMOS technology. However, chips fabricated with other types of technologies such as bipolar, BiCMOS, compound semiconductors and device types such as TTL, PMOS, NMOS, ECL, HBT, MESFET and so on may be used. IC chip portion 250 may also include photonic module 252 including silicon waveguides to transmit optical signals over relatively short distances within IC chip portion 250. Accordingly, optical signals transmitted by silica waveguides 230 may be transferred or coupled into silicon waveguides in 252 at an edge of the IC chip portion 250. Within IC chip portion 250, silicon waveguides in 252 transmit optical signals between or among various photonic components and converts them in electrical signals. IC chip 250 may operate using the said electrical signals. Accordingly, such photonic components may be used to convert optical signals transmitted by optical module 252 to electrical signals used by the IC chips. The electrical signal may be processed by the electrical chip 250 and converted to optical signal using 252. This signal may be coupled to silica waveguide 260.
Further, photonic module 205 may include any number of additional IC chip portions, such as IC chip portion 280, for example. As for IC chip portion 250, 280 may also include photonic module 282 to transmit optical signals over relatively short distances within IC chip portion 280, for example. Silica waveguides 260 may be used to transmit optical signals between or among IC chip portions (e.g., 250 and 280) over relatively long distance, such as over about 100.0 millimeters, for example. Accordingly, optical signals transmitted by silica waveguides 260 may be transferred or coupled into silicon waveguides 282 at an edge of the IC chip portion 280. Within IC chip portion 280, silicon waveguides 282 transmit optical signals between or among various photonic components, which may be used to convert optical signals transmitted by photonic module 282 to electrical signals used by the IC chips. Electrical power and/or ground may be provided to IC chip portions 250 and 280 by block 270, for example.
One or more IC chip portions may produce an output optical signal that may be coupled into silica waveguides 235. Photonic module 205 may subsequently provide an optical signal to an external output cable 215 via an optical coupler 225.
The interface chip 311 may comprise an electrical portion 320 and a photonic portion 330. The electrical portion 320 may exist in form of a separate chip which is placed on SOI board in close vicinity to the CMOS chip. Photonic portion 330 may exist as a set of photonic components on the SOI wafer. Electrical connections between 320 and 330 may exist to perform the required functions. For example, electrical portion 320 of the interface chip may connect with high speed signal pins on the interface portion of a VLSI chip via an electrical interface circuit 324. Low speed, non-critical signal pins on 310 may connect with interface chip 311 using circuit 322. Portion 324 may comprise a CMOS chip 326. CMOS chip 326 may comprise drivers 328 and detectors 327. Driver 328 may comprise buffers and other circuit blocks. Detector 327 may contain amplifiers and other circuit blocks. Photonic portion 330 may include modulators, waveguides, etc. in portion 331 to interface with driver 328. Photonic portion of 330 may also include optical filters, and/or photodiodes to connect with detector 327.
SOI wafer 605 may be fabricated on a silicon substrate 608. An optical cable 610 may provide an optical signal to module 600 via couplers 620, for example. A temperature controller module 657 may be located on wafer 605, for example.
Silicon waveguides 660 may comprise a portion of SOI wafer 605. In other words, waveguides 660 may be fabricated from material of SOI wafer 605. Silicon waveguides 660 may be used to transmit optical signals relatively short distances, such as between or among connections of single IC chips 630 or 635. On the other hand, silica waveguides 650 may be used to transmit optical signals relatively long distances, such as between or among different IC chips 630 or 635. Substrate 608 may include ball-grid-array (BGA) balls 615 for mounting the substrate to another module, for example. Wafer 605 may include flip chip bumps 628, and through-wafer vias (TWVs) 625, which may comprise through-silicon vias (TSVs) in some implementations. Such vias may connect optical drivers and metallic lines, and may form a low resistance electrical connection between terminals of the optical drivers and the metal lines. In one implementation, TWVs may connect to IC chips to provide power and/or grounding to the IC chips, for example. Of course, such details of photonic module 600 are merely examples, and claimed subject matter is not so limited.
PMCM 705 may comprise an SOI wafer 706. Multiple photonic structures such as waveguides, modulators, detectors, filters may be fabricated on a SOI substrate 706. An optical cable 710 may provide an optical signal to module 700 via couplers 720, for example. Silicon waveguides 760 may comprise a portion of SOI wafer 706. Silicon waveguides 760 may be used to transmit optical signals relatively short distances, such as between or among connections of single IC chips 730 or 735. On the other hand, silica waveguides 750 may be used to transmit optical signals relatively long distances, such as between or among different IC chips 730 or 735. On-chip laser 780 may be placed on the SOI wafer using techniques known to those skilled in the art and coupled to waveguide 790.
Photonic module 705 may be packaged in a substrate 708. For example, ball grid array packaging technology may be used to package photonic module 705. Substrate 708 may include BGA balls 715 for mounting the substrate to another module, for example. Wafer 705 may include flip chip bumps 728, and through-wafer vias (TWVs) 725. Known to those skilled in the art, through wafer via (TWV) are also known as through silicon via (TS). Redistribution layers 712 may be used to transfer electrical signals to various portions or layers of module 700. Redistribution layers 712 may comprise metallic or semiconductor materials with relatively low electrical resistance, for example copper or alloys of copper.
In an alternate embodiment of the invention, incoming and outgoing signals may be brought in to the photonic plane 705 through the substrate 708 from balls 715, through the redistribution layer 712, through flip chip bumps 728 and TWV 725.
This figure illustrates one scheme for modulation of photonic signals. Other photonic schemes using multiple lasers to generate multiple wavelength optical signals and alternate modulation schemes, such as those using Mach Zehnder Interferometer or quantum confined stark effect based modulators may also be used.
Silicon waveguides and/or silica waveguides 1060 may be located on SOI wafer 1005. Such waveguides may be used to transmit optical data signals. For example, optical signals from diode lasers 1020 and 1025 may be coupled into SOI waveguide 1061. Modulator section 1030 may include a plurality of modulator rings 1036 to modulate individual wavelength bands of the optical signals from the diode lasers. Modulator section 1030 may be located on SOI wafer 1005. For example, individual modulator rings may modulate a particular wavelength of the optical signal. Such modulation of an individual ring may be based, at least in part, on a particular electrical signal that may be provided to modulator section 1030 by a first via 1032, a second via 1042, and a third via 1052 penetrating dielectric layers 1002, 1004, and 1006. Such vias may be used to interconnect a plurality of electrical connections between electronic and photonic components. A first metal pad 1034 may be located on a surface of module layer 1002 to electrically connect first via 1032 to a third via 1042 penetrating module layer 1004. Similarly, a second metal pad 1044 may be located on a surface of module layer 1004 to electrically connect third via 1042 to a fourth via 1052 penetrating module layer 1006. Fourth via 1052 may be electrically connected to one or more metal pads 1070, for example. This represents one electrical connection between the metal pad 0970 and one contact on the modulator 1030. Similar path is formed from the second terminal 1036 of the modulator and second pad. Of course, such details of a photonic module are merely examples, and claimed subject matter is not so limited.
In addition, diode lasers 1370 may be fabricated on SOI wafer 1305. For example, such diode lasers may comprise germanium diode lasers, which may be formed on SOI wafer 1305 by depositing single crystalline germanium and/or its alloys onto the SOI wafer using semiconductor process technology. In an alternative embodiment, laser built with compound semiconductors may be coupled to the SOI wafer to deliver the desired functionality as stated above. Photodetectors 1380 may similarly be formed on SOI wafer 1305.
Through-silicon-vias (TSVs) 1390 may be formed by etching holes in SOI wafer 1305 and at least partially filling the holes with an electrically conductive material such as copper. Fabrication of TSVs and photonic components may be performed in multiple process sequences to achieve similar performance of photonic elements, and claimed subject matter is not limited in this respect.
In an embodiment, micro-bumps may be added to IC chips that are to be mounted or bonded to photonic layer 1300. For example, micro-bumps may be added to a CMOS processor or hyper-memory cube IC. Such ICs may then be mounted onto photonic layer 1300. A resulting configuration may be similar to SOI wafer 705 of photonic module 700 shown in
In
In
In another embodiment, a process for fabricating a photonic module may comprise etching an SOI wafer to establish locations of a plurality of photonic components and to form silicon optical waveguides, depositing a silicon dioxide film including germanium-oxide doping on the etched SOI layer, annealing the silicon dioxide-based film to form a silica layer, and patterning the silica layer by lithography and etching to form a silica optical waveguide coupled to the silicon optical waveguides. Such a process may further comprise etching portions of the silicon optical waveguides to form bases for the plurality of photonic components. In one implementation, a process may further comprise etching patterns in a silicon layer on the SOI wafer to form the silicon optical waveguides, a plurality of optical modulators, and or a plurality of optical filters, for example. In another implementation, a process may further comprise depositing germanium on the SOI wafer and doping the germanium to form a plurality of photodetectors comprising germanium diodes. Of course, such details of a process for fabricating a photonic module are merely examples, and claimed subject matter is not so limited.
The terms, “and,” “and/or,” and “or” as used herein may include a variety of meanings that also is expected to depend at least in part upon the context in which such terms are used. Typically, “or” as well as “and/or” if used to associate a list, such as A, B or C, is intended to mean A, B, and C, here used in the inclusive sense, as well as A, B or C, here used in the exclusive sense. In addition, the term “one or more” as used herein may be used to describe any feature, structure, or characteristic in the singular or may be used to describe some combination of features, structures, or characteristics. Though, it should be noted that this is merely an illustrative example and claimed subject matter is not limited to this example.
While there has been illustrated and described what are presently considered to be example embodiments, it will be understood by those skilled in the art that various other modifications may be made, and equivalents may be substituted, without departing from claimed subject matter. Additionally, many modifications may be made to adapt a particular situation to the teachings of claimed subject matter without departing from the central concept described herein. Therefore, it is intended that claimed subject matter not be limited to the particular embodiments disclosed, but that such claimed subject matter may also include all embodiments falling within the scope of the appended claims, and equivalents thereof.