Patent Application
20210320102
The present disclosure relates to radio frequency (RF) components and more specifically to an RF integrated circuit (IC) having electro-static discharge (ESD) protection.
Many RF applications require adaptive tuning (e.g., matching) to provide operation over a range of uses and environments. For example, a tunable capacitance can enable an antenna of a mobile phone to operate properly (e.g., efficiently) over multiple frequencies (e.g., different bands) and operate in a variety of environments (e.g., handheld). A capacitor can include a pair of electrodes (i.e., plates) that each have an area (A) and that are separated by a distance (d). A volume is formed between the electrodes that can be filled with insulating material having a dielectric constant (c). Tuning the capacitor can include changing any of these parameters (A, d, c), but a capacitor that can be tuned by changing the dielectric constant (i.e., relative permittivity) of the insulating material may offer advantages in size and simplicity. The tunable dielectric capacitor can be implemented as an integrated circuit, which is well suited for mobile electronics. It is in this context that implementations of the disclosure arise.
In at least one aspect, the present disclosure generally describes a passive tunable integrated circuit. The passive tunable integrated circuit includes a variable capacitor that includes a capacitor array that is coupled between an input electrode and an output electrode. At least one capacitor in the capacitor array has a tunable dielectric coupled to a radio-frequency ground electrode. The passive tunable integrated circuit further includes and input electro-static discharge protection circuit that is coupled between the input electrode and the radio-frequency ground electrode. The input electro-static discharge protection circuit includes at least one spark gap.
In another aspect, the present disclosure generally describes a radio frequency tuner for a mobile device. The radio frequency tuner includes a passive tunable integrated circuit that includes an input and/or output electro-static discharge protection circuit. The electro-static discharge protection circuit is coupled between an input and/or output electrode and a radio-frequency ground electrode. The input and/or output electro-static discharge protection circuit includes at least one spark gap that is configured to couple an electro-static discharge above a trigger field strength to the radio-frequency ground electrode.
In another aspect, the present disclosure generally describes a method to protect a passive tunable integrated circuit from an electro-static discharge. The method includes fabricating a variable capacitor that includes a tunable dielectric material. The method further includes depositing a first metal layer on the variable capacitor, which defines an input electrode, an output electrode, a radio-frequency ground electrode, and at least one spark gap that is coupled between the input electrode and the radio-frequency ground electrode. The method further includes depositing an overcoat on at least a portion the first metal layer. The at least one spark gap of the first metal layer has no overcoat to lower a breakdown voltage of the at least one spark gap to below a breakdown voltage of the variable capacitor so than an electro-static discharge having a voltage that can damage the radio-frequency variable capacitor is routed to the radio-frequency ground electrode.
The foregoing illustrative summary, as well as other exemplary objectives and/or advantages of the disclosure, and the manner in which the same are accomplished, are further explained within the following detailed description and its accompanying drawings.
The components in the drawings are not necessarily to scale relative to each other. Like reference numerals designate corresponding parts throughout the several views.
A wireless device may have an analog RF front-end circuit (i.e., RF front-end) configured just before/after a transmit/receive (T/R) antenna. The RF front-end may be configured to match impedances between the antenna and other circuitry (e.g., RF amplifiers). Because an antenna may be easily loaded (e.g., through capacitive coupling) by an environment, its impedance may not be constant. Accordingly, the RF front-end may require a tuning circuit that can tune the impedance of the antenna to the internal circuitry (and vice versa). In some implementations, the tuning circuit can automatically respond to changes in an environment of the antenna. This, so called, auto-tuning can optimize power efficiency and signal levels to extend battery life and improve performance (e.g., data rate) of a wireless device.
Tuning may be carried out by switching various impedance combinations to find a reasonable match. This type of tuning can utilize active tuning circuits. Active tuning circuits include active switching devices and can be complex and large because numerous switching devices and impedance elements may be required. The resultant size, power-consumption, and complexity may be unwanted in some applications (e.g., mobile devices). In mobile devices, passive tuning circuits may be used for matching. Passive tuning circuits do not require active switches. Instead a passive tuning circuit may include a tunable capacitor having a capacitance that can be adjusted (i.e., tuned) to match the antenna to the internal circuitry.
The variable capacitor 210 (i.e., tunable capacitor, tuning condenser, varactor) can be configured to receive a tuning signal 225 from a tuning bias circuit 230 and change its capacitance in response to the tuning signal 225. The variable capacitor can be tuned using an analog tuning signal rather than using digital switching signals (i.e., for digitally switching a bank of capacitors). For example, an amplitude of the analog tuning signal (e.g., a voltage) can be changed (e.g., increased from zero) to change (e.g., reduce) the capacitance of the variable capacitor 210.
One insulating material that is low loss at RF frequencies and that has a tunable dielectric constant is Barium Strontium Titanate (BST). BST has a dielectric constant that depends on an applied electric field. Accordingly, a DC bias voltage (i.e., bias voltage) may be applied to a BST filled capacitor to set the dielectric constant, and the bias voltage may be changed (i.e., tuned) to change its capacitance. This type of tuning can be referred to as passive tuning because there is no active switching (e.g., using transistors) for tuning.
Barium Strontium Titanate may be used as the tunable dielectric material in a variable capacitor for RF frequencies (e.g., 2.5 Gigahertz (GHz)). BST has a field-dependent permittivity (i.e., dielectric constant) that can be changed with the application of a high voltage (e.g., 10-20 kilovolts (kV) per centimeter (cm)). While BST may have a high breakdown voltage (e.g., 1000 kV/cm), compared with other technologies (e.g., varactor diodes), BST may be still susceptible to breakdown when used in some variable capacitors.
A passive tunable integrated circuit (PTIC) is a BST capacitor that is fabricated as an integrated circuit using semiconductor process steps. Dimensions (e.g., distance (d)) of a PTIC may be very small, making it susceptible to damage from electro-static discharge (ESD). This is especially true when the PTIC is coupled to an antenna of wireless device (e.g., as an antenna tuning element) because the antenna of the wireless device is configured to easily couple energy into the wireless device.
A mobile device 100 (e.g., tablet, cellphone) may require very small variable capacitors for RF tuning of an RF front-end 130. To meet these requirements, a passive tunable integrated circuit 600 can be fabricated using photolithography and semiconductor processing to include small variable capacitors using BST. Further, the PTIC can be in a wafer level chip scale package to minimize packaging size.
The variable capacitor 210 may also be implemented in a non-planar configuration. For example, a PTIC can be fabricated as follows. A conductive metal layer may be used as a bottom layer of a capacitor structure. Next, a first dielectric layer can be added to the bottom layer. Next, a second conductive layer can be added to the first dielectric layer. Next a second dielectric layer can be added to the second conductive layer. Finally, a top metal layer can be added to the second dielectric layer to serve as a top layer of the capacitor structure. Only the top metal layer is appropriate for using in connections and ESD structure. The separation between capacitor plates in the non-planar configuration can be very small because it is the dielectric thickness of the first and/or second dielectric layer. Further, the dielectric itself may be constituted by multiple layers of thinner dielectric (e.g., to improve dielectric leakage along dielectric crystalline boundaries as formed in some BST depositions).
Returning to
A BST variable capacitor can be sensitive to current pulse discharges such as HBM and MM type discharges. These ESDs can cause a high field strength in the dielectric because the electrode to electrode (i.e. plate to plate) separation of the capacitor can be small (e.g., 5 μm). These field strengths can exceed the breakdown of the BST and a current plasma that results can cause conductor migration through the BST and, ultimately, failure of the capacitor. In a passive capacitor structure (i.e., a BST variable capacitor) there are no active devices (e.g., switching devices) available for ESD protection.
Returning to
An ESD protection circuit can be designed to provide a conduction path to ground when a voltage is applied to an input of the ESD protection circuit that exceeds a trigger field strength. The conduction path may provide for a period to conduct current at a current level sufficient to discharge an ESD. Design parameters of a spark gap may be selected to provide this function.
A first spark gap design parameter may be a planar electrode configuration in which a first electrode of a spark gap is in a plane with a second electrode of the spark gap. This configuration may be desirable for its compliance with existing PTIC fabrication processes. The ESD protection circuits shown in
A second spark gap design parameter may be a gap width 510 of the spark gap. The gap witch (i.e., gap) can be selected so that a spark gap conducts at a higher or lower breakdown voltage (i.e., larger or smaller gap). The atmospheric breakdown (e.g., 4V/μm), which is a function of atmospheric properties, can be used to design the gap width to achieve the desired breakdown to protect the PTIC 610.
A third spark gap design parameter may be the shape of the electrodes. Circular electrodes (
A fourth spark gap design parameter may be a number of spark gaps in parallel (or in series). Multiple parallel spark gaps (
A fifth spark gap design parameter may be a material to cover the spark gap and electrodes. A breakdown of a spark gap can be raised by coating the gap width with a layer (i.e., overcoat). For example, a planar spark gap fabricated with existing PTIC fabrication processes may include as a glass dielectric layer added to the electrodes for passivation. It may be desirable to remove, this coating layer to reduce a trigger field strength of an ESD protection circuit. In some implementations, an etch process of the PTIC fabrication may be used for this removal.
In an example, an RF tuner 200 includes a variable capacitor that has a DC voltage rating of 20 volts in order to handle signals associated with the mobile device 100. The variable capacitor for the mobile device is a PTIC with a plurality of capacitors filled with BST. To keep the dimensions of the PTIC small, each of the plurality of capacitors has straight plates (i.e., electrodes) so that the polarity of capacitors can fill a square or rectangular area. In other words, the capacitors may not include curved electrodes, which could offer some ESD protection. Instead, the plurality of capacitors may include a curve-free topology, such as shown in the capacitor implementation of
The capacitor array includes a stack of series-connected capacitors. In one possible implementation, the target capacitance required for a variable capacitor in a mobile application may be approximately 2.7 pico farads (pF). If the target capacitance is 2.7 pF then the effective capacitance of each capacitor in a stack of 32 capacitors is about a 32{circumflex over ( )}2×2.7 pF=2.7 nano farads (nF). The area for the stack in a PTIC can be very small. For example, less than 0.6 square millimeters (mm2) may be provided for the capacitor array (i.e., stack). This small area leads to a capacitance density of 4.6 nF/mm2. The small dimensions of the PTIC and the high capacitor density can make alternative methods to mitigate ESD breakdown difficult. For example, there is not enough area in a PTIC to use geometric optimization (i.e., removal of corners or high field areas) to improve (i.e., increase) a breakdown voltage of each capacitor. The spark gap ESD protection with top passivation removed achieves all the goals of ESD protection without changing the size of the PTIC and without changing the fabrication process of the PTIC.
In the specification and/or figures, typical embodiments have been disclosed. The present disclosure is not limited to such exemplary embodiments. The use of the term “and/or” includes any and all combinations of one or more of the associated listed items. The figures are schematic representations and so are not necessarily drawn to scale. Unless otherwise noted, specific terms have been used in a generic and descriptive sense and not for purposes of limitation.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art. Methods and materials similar or equivalent to those described herein can be used in the practice or testing of the present disclosure. As used in the specification, and in the appended claims, the singular forms “a,” “an,” “the” include plural referents unless the context clearly dictates otherwise. The term “comprising” and variations thereof as used herein is used synonymously with the term “including” and variations thereof and are open, non-limiting terms. The terms “optional” or “optionally” used herein mean that the subsequently described feature, event or circumstance may or may not occur, and that the description includes instances where said feature, event or circumstance occurs and instances where it does not. Ranges may be expressed herein as from “about” one particular value, and/or to “about” another particular value. When such a range is expressed, an aspect includes from the one particular value and/or to the other particular value. Similarly, when values are expressed as approximations, by use of the antecedent “about,” it will be understood that the particular value forms another aspect. It will be further understood that the endpoints of each of the ranges are significant both in relation to the other endpoint, and independently of the other endpoint.
Some implementations may be implemented using various semiconductor processing and/or packaging techniques. Some implementations may be implemented using various types of semiconductor processing techniques associated with semiconductor substrates including, but not limited to, for example, Silicon (Si), Gallium Arsenide (GaAs), Gallium Nitride (GaN), Silicon Carbide (SiC), Aluminum Nitride (AlN), and/or so forth.
While certain features of the described implementations have been illustrated as described herein, many modifications, substitutions, changes and equivalents will now occur to those skilled in the art. It is, therefore, to be understood that the appended claims are intended to cover all such modifications and changes as fall within the scope of the implementations. It should be understood that they have been presented by way of example only, not limitation, and various changes in form and details may be made. Any portion of the apparatus and/or methods described herein may be combined in any combination, except mutually exclusive combinations. The implementations described herein can include various combinations and/or sub-combinations of the functions, components and/or features of the different implementations described.
