Patent Application
20250072149
Photodetectors are sensors that detect the presence of electromagnetic radiation. Semiconductor photodiodes are a category of photodetectors that use a P-N diode to convert incident photons into current. Photodiodes are used by many different technologies to sense one or more frequency of light, to determine the time at which transmitted light is reflected back to the photodiode, etc.
Avalanche photodiodes are a highly biased photodiodes in which photo-generated carriers are multiplied by avalanche breakdown in the device. Single photon avalanche diodes (SPADs) are avalanche photodiodes which are sensitive enough to detect the incidence of a single photon, and have lower noise and jitter than typical photodiodes. As technology progresses, there is an increasing demand for further miniaturization and improvements to photodiode technology.
Embodiments of the present disclosure are directed to a photodiode, a photodetector, and a method for forming a photodiode.
In an embodiment, a photodiode device includes a layer of semiconductor material, a plurality of pixels, each of the pixels including a diode structure on a first side of the layer of semiconductor material and a conductive layer on a second side of the layer of semiconductor material, deep trench isolation (DTI) structures isolating adjacent pixels from one another, a first vertical conductive layer over a first side of each DTI structure, and a second vertical conductive layer over a second side of each DTI structure. The first vertical conductive layer extends from the conductive layer to a first contact on the first side of each DTI structure, and the second vertical conductive layer extends from the conductive layer to a second contact on the second side of each DTI structure.
In an embodiment, a photodetector includes a control circuit and a photodiode device which comprises a layer of semiconductor material, a pixel including a diode structure on a first side of the layer of semiconductor material and a conductive layer on a second side of the layer of semiconductor material, a deep trench isolation (DTI) structure surrounding the pixel, a first vertical conductive layer over a first side of each DTI structure, and a second vertical conductive layer over a second side of each DTI structure. The first vertical conductive layer extends from the conductive layer to a first contact on the first side of each DTI structure, and the second vertical conductive layer extends from the conductive layer to a second contact on the second side of each DTI structure.
In an embodiment, a method of forming a photodiode device including a plurality of pixels includes forming, on a substrate comprising a layer of conductive material and a layer of semiconductor material, a first vertical conductive layer and a second vertical conductive layer that extend through the layer of conductive material and the layer of semiconductor material, forming a diode structure on a first side of the layer of semiconductor material, and forming a deep trench isolation (DTI) structure between the first and second vertical conductive layers, the DTI structure isolating the diode structure from an adjacent diode structure. The first vertical conductive layer extends from the conductive layer to a first contact on the first side of the DTI structure, and the second vertical conductive layer extends from the conductive layer to a second contact on the second side of the DTI structure.
A detailed description of embodiments is provided below along with accompanying figures. The scope of this disclosure encompasses numerous alternatives, modifications and equivalents. Although steps of various processes are presented in a particular order, embodiments are not necessarily limited to being performed in the listed order. In some embodiments, certain operations may be performed simultaneously, in an order other than the described order, or not performed at all.
Numerous specific details are set forth in the following description. These details are provided to promote a thorough understanding of the scope of this disclosure by way of specific examples, and embodiments may be practiced according to the claims without some of these specific details. Accordingly, the specific embodiments of this disclosure are illustrative, and are not intended to be exclusive or limiting. For the purpose of clarity, technical material that is known in the technical fields related to this disclosure has not been described in detail so that the disclosure is not unnecessarily obscured.
Although the terms “first” and/or “second” may be used herein to describe various elements, these elements should not be limited by these terms. These terms may be used merely to distinguish one element from another element. For instance, a first element discussed below could be termed a second element without departing from the teachings of the present disclosure. Similarly, the second element could also be termed the first element.
The drawings are not necessarily to scale and in some instances, proportions may have been exaggerated to clearly illustrate features of the embodiments. When a first element is referred to as being “on” a second element or “on” a substrate, it not only refers to a case where the first element is formed directly on the second element or the substrate but also a case where a third element exists between the first element and the second element or the substrate. An element “connected” or “coupled” to or with another element may be directly connected or coupled to or with the other element or, instead, one or more intervening elements may be present.
An APD is a type of photosensitive semiconductor device in which light is converted to electricity due to the photoelectric effect coupled with electric current multiplication as a result of avalanche breakdown. APDs differ from conventional photodiodes in that incoming photons internally trigger a charge avalanche. APDs can measure low levels of light and are widely used in long-distance optical communications and optical distance measurement where high sensitivity is needed.
SPADs are a type of APD that is sensitive enough to detect the incidence of a single photon. SPADs trigger an avalanche phenomenon with respect to the incidence of a single photon by applying a bias voltage higher than the breakdown voltage, and output a corresponding voltage pulse. The diode of an SPAD may employ a wide band-gap semiconductor material such as SiC, GaN, GaAs, AlN, AlAs, BN, GaP, AlP, ZnTe, MnTe, MgTe, ZnS, MgS, HgS, PbI2, TlPbI3, TlBr, TlBrI, or InAlP. In other embodiments, the SPAD may employ narrow band gap materials such as Ge, InGaAs, etc.
Returning to
The diode structure 106 is disposed in a semiconductor material 114 that may be doped with the second type of dopants. When the first type of dopants are N dopants, the second type of dopants are P dopants. In such an embodiment, doped region 108 may be an N+ doped region, first doped well 110 may be an N well, second doped well 112 may be a P well. The semiconductor material 114 may be an intrinsic material without any doping, or a lightly doped material. The semiconductor material may be an epitaxial silicon material, or another semiconductor material such as germanium. Accordingly, the doped region 108, first doped well 110 and second doped well 112 may be doped silicon or doped germanium structures. The diode structure 106 may be formed of the same semiconductor material as semiconductor material 114 or a different material.
The diode structure 106 is surrounded by DTI structures 104. The DTI structures 104 include a conductive material 116 disposed in a center portion of the structures, and the sidewalls and base of the trenches are lined with an insulating liner layer 118. The conductive material 116 may be a metal material such as tungsten, aluminum or copper, or a highly doped semiconductor material. The insulating liner layer 118 may be an oxide material such as silicon oxide or aluminum oxide.
An anti-reflective coating (ARC) layer 122 is disposed over a conductive layer 120 on a second side of the substrate which is a light-facing side of the device, and a micro-lens 132 is disposed over the anti-reflective coating layer 122. The anti-reflective coating layer 122 may be an oxide material such as titanium oxide, or a similar material as known in the art. A passivation layer (not shown), e.g. an aluminum oxide layer, may be present on the anti-reflective coating layer 122.
The conductive layer 120 may be a buried doped layer that is doped with the first type of dopants that are the same type of dopants as semiconductor material 114. The micro-lens 132 may focus photons toward the diode structure 106, and may be formed of a polymer or fused silica material.
The conductive layer 120 has a higher doping than semiconductor material 114 and is disposed on an opposite side of the semiconductor material 114 from the diode structure 106. In an embodiment in which the first type of dopants are N dopants and the second type are P dopants, the conductive layer 120 is part of an anode pickup of the photodiode device 100.
In another embodiment, the first dopants are P dopants and the second dopants are N dopants. In such an embodiment, the doped region 108 may be a P+ doped region, doped well 110 may be a P-well, doped well 112 may be an N-well, and the semiconductor material 114 may be a depleted epitaxial silicon or N-doped silicon. In such an embodiment, conductive layer 120 may be a buried N-doped layer, and the conductive layer 120 is a cathode pickup or cathode electrode of the device 100. Accordingly, the conductive layer 120 may be an anode electrode or a cathode electrode of the device 100 in different embodiments.
A first vertical conductive layer 134a is on a first side of each DTI structure 104, and a second vertical conductive layer 134b is on a second side of the DTI structure. The vertical conductive layers 134 may be located directly against the insulating liner layer 118 of the DTI structures 104. In another embodiment, a liner layer may be present between the vertical conductive layers 134 and the insulating liner layers 118.
The vertical conductive layers 134a and 134b may be doped semiconductor materials that have the same dopant type as conducive layer 120. For example, when conducive layer 120 is P-doped, the vertical conductive layers 134 are also P-doped, and when conducive layer 120 is N-doped, the vertical conductive layers 134 are also N-doped.
In some embodiments, the vertical conductive layers have a doping concentration from 1E17 to 1E21 atoms/cm3. The semiconductor material of vertical conductive layers 134a and 134b may be polysilicon. In other embodiments, the semiconductor material may be epitaxial silicon, germanium, or other semiconductor materials as known in the art.
The conductive material of vertical conductive layers 134a and 134b is not limited to a doped semiconductor material. In some embodiments, the vertical layers 134a and 134b are a metal material such as tungsten or copper.
First ends of vertical conductive layers 134a and 134b are respectively coupled to first and second metal lines 126a and 126b through first and second contacts 124a, and second ends of vertical conductive layers 134a and 134b are coupled to conductive layer 120. Accordingly, the first and second vertical conductive layers 134a and 134b illustrated in
Also shown in the embodiment of
The embodiment in
The contacts 124 and metal lines 126 are part of a circuit structure of the photodiode device 100. The circuit structure may include circuitry for biasing the diode structure 106 and detecting voltage pulses caused by the incidence of photons. Collectively, the metal lines 126a/b, contacts 124a/b, vertical conductive layers 134a/b and conductive layer 120 may provide an anode structure or a portion of an anode circuit of the photodiode 100.
The contacts 124 extend through, or penetrate, an etch stop layer 128 and a portion of an interlayer dielectric layer 130. The contacts 124 may be a metal material or a doped semiconductor, and the metal lines 126b may be tungsten, for example. The etch stop layer 128 may be a nitride or oxide material, and the interlayer dielectric layer 130 may be an oxide material such as silicon oxide.
A first embodiment of a process of forming a photodiode device 100 will now be explained with respect to
An etch mask is deposited over the semiconductor material 114 and trenches 140 are formed by etching the semiconductor material 114 using the etch mask. Oxide liner layers 136a and 136b may be formed, for example, by depositing an oxide material using a chemical vapor deposition (CVD) process and removing oxide from the upper surface of the semiconductor material 114 and lower surfaces of the trenches 140 using an anisotropic etch. The resulting structure, in which sidewalls of trenches 140 are covered with oxide liner layers 136, is shown in
Subsequently, the trenches 140 are filled with a conductive material 134 using a damascene process to form the structure shown in
The diode structure 106 is formed by performing a series of masking and doping processes as known in the art, and an etch stop layer 128 and a dielectric layer are formed over the diode structure 106. The etch stop layer 128 and dielectric layer are etched using a mask pattern, and a conductive material is deposited and leveled to form first and second contacts 124a and 124b on opposite sides of the conductive material 134. Third contact 126c, which is coupled to diode structure 106, is formed by the same process.
First, second and third metal lines 126a, 126b and 126c are respectively formed over first, second and third contacts 124a, 124b and 126c. The metal lines 126 are disposed in a dielectric material of interlayer dielectric layer 130. Additional conductive and dielectric structures are formed over dielectric layer 130 to form BEOL structures as known in the art.
The wafer is flipped to expose the doped silicon substrate 120a, and a thinning operation is performed to form conductive layer 120 with an appropriate thickness. The thinning operation may be an etch-back operation or a backgrinding operation. The anti-reflective coating layer 122 is formed over the thinned conductive layer 120, e.g. by a vapor deposition process, to form the structure shown in
Next, trenches 142 are formed around diode structure 106. The trenches 142 may be formed by patterning a photoresist layer and performing an etch process in which the etch stop layer 128 and contacts 124 are used as etch stop materials. When trenches 142 are etched, first and second vertical conductive layers 134a and 134b are formed on opposite sides of the trenches from the remaining portions of conductive material 134. An insulation liner material 118 is deposited over exposed surfaces of the entire structure, including sidewalls and bases of the trenches 140 and the exposed surfaces of ARC layer 122 to form the structure shown in
Material 116a is deposited to fill trenches 136 as shown in
The embodiment of
A third embodiment of a pixel 102 is illustrated by
The materials of Bragg reflectors 144 are not particularly limited so long as each layer has a different refractive index from the adjacent layers. In one embodiment, the vertical layers 134 and 138 are polysilicon, and the oxide liner layers are silicon oxide. Of course, other materials are possible as known in the art. In addition, although the Bragg reflectors 144 in the embodiment of
The Bragg reflectors may be formed using the same techniques described above. For example, the third and fourth oxide layers 136c and 136d may be formed by oxidizing sidewalls of a trench formed in semiconductor material 114. Subsequently, the base of the trench may be etched, and a second layer of semiconductor material may be formed over the entire structure. The second layer of semiconductor material may be removed from the base of the trench, and a second oxidation process may be performed to form first and second oxide layers 136c and 136d and first and second reflective layers 138a and 138b from a non-oxidized part of the second semiconductor material. Another etch process may be performed to remove material from the base of the trench, and the trenches may be filled with a conductive material 134 as illustrated in
Embodiments of the present disclosure have multiple advantages compared to conventional structures.
Because the embodiment in
On the other hand, it is possible to shrink the size of the intrinsic space while maintaining the same active area. Reducing the intrinsic space decreases the size (pitch) of a pixel, leading to increased pixel density on a device. It is possible to adjust both the intrinsic space and active area individually or simultaneously to achieve one or both of a higher fill factor and a higher pixel pitch compared to a conventional device.
There is a tradeoff between pixel pitch and fill factor depending on the size of the active area and the intrinsic space. In embodiments of the present disclosure, photon detection probability is maintained or increased and dark current is not substantially degraded compared to conventional devices.
In some embodiments, the photodiode device 100 is on a separate die from the control circuit 200, and the dies may be stacked in a three-dimensional structure and/or coupled to control circuit 200 by an interposer substrate. Accordingly, the photodetector 300 in
The resulting photodiode 100 is suitable for use in a variety of electronic devices, including imaging devices and focusing aides, optical devices including fiber-optic communication devices, cell phones, computer devices, security equipment, detection equipment including LiDAR, IoT and general household equipment, etc. The photodiode may be an avalanche photodiode or a single photon avalanche photodiode, for example.
Aspects of the present disclosure have been described in conjunction with the specific embodiments thereof that are proposed as examples. Numerous alternatives, modifications, and variations to the embodiments as set forth herein may be made without departing from the scope of the claims set forth below. Accordingly, embodiments as set forth herein are intended to be illustrative and not limiting.
