Claims
- 1. An isolation structure for an integrated circuit device, comprising:
- a substrate having a substantially planar upper surface;
- a cavity formed in the substrate, extending from the upper surface into the substrate, wherein the cavity has a U-shaped cross section, with a bottom portion substantially parallel to the substrate upper surface, and with sidewalls perpendicular to the substrate upper surface;
- a first layer of oxide covering lower portions of the sidewalls and the bottom portion of the cavity leaving a thin upper portion of the sidewalls uncovered by the first layer of oxide, wherein the first layer has the physical characteristics of thermally grown oxide;
- a second layer of oxide contacting the first layer of oxide and covering the cavity to define, along with the first oxide layer, an internal region within the cavity, wherein the second layer of oxide contacts the substrate sidewalls in the thin upper portion uncovered by the first layer of oxide and has an upper surface coplanar with the substrate upper surface, and further wherein the second layer of oxide has the physical characteristics of an undoped oxide; and
- a region of glass completely filling the internal region within the cavity, wherein the region of glass has the physical characteristics of a reflowable glass.
- 2. The isolation structure of claim 1, wherein the first oxide layer has a thickness of between 1000 .ANG. and 3000 .ANG..
- 3. The isolation structure of claim 1, further comprising a channel stop region within the substrate and immediately below the cavity.
- 4. An isolation structure for an integrated circuit device, comprising:
- a substrate having a substantially planar upper surface;
- a cavity formed in the substrate, extending from the upper surface into the substrate, wherein the cavity has a U-shaped cross section, with a bottom portion substantially parallel to the substrate upper surface, and with sidewalls perpendicular to the substrate upper surface;
- a first layer of oxide covering lower portions of the sidewalls and the bottom portion of the cavity leaving a thin upper portion of the sidewalls uncovered by the first layer of oxide, wherein the first layer has the physical characteristics of thermally grown oxide;
- a second layer of oxide contacting the first layer of oxide and covering the cavity to define, along with the first oxide layer, an internal region within the cavity, wherein the second layer of oxide contacts the substrate sidewalls in the thin upper portion uncovered by the first layer of oxide and has an upper surface coplanar with the substrate upper surface, and further wherein the second layer of oxide has the physical characteristics of an undoped oxide; and
- a region of glass completely filling the internal region within the cavity, wherein the region of glass has the physical characteristics of a spin on glass.
- 5. The isolation structure of claim 4, wherein the first oxide layer has a thickness of between 1000 .ANG. and 3000 .ANG..
- 6. The isolation structure of claim 4, further comprising a channel stop region within the substrate and immediately below the cavity.
Parent Case Info
This application is a continuation of Ser. No. 08/052,886, filed Apr. 26, 1993 and now abandoned, which is a division of Ser. No. 07/785,774, filed Oct. 31, 1991 and now U.S. Pat. No. 5,244,827.
US Referenced Citations (6)
Foreign Referenced Citations (6)
Number |
Date |
Country |
0147626 |
Jul 1985 |
EPX |
0101289 |
Aug 1979 |
JPX |
0140137 |
Aug 1983 |
JPX |
0040741 |
Feb 1987 |
JPX |
0062061 |
Mar 1990 |
JPX |
0229443 |
Oct 1991 |
JPX |
Non-Patent Literature Citations (1)
Entry |
S. M. Sze, Semiconductor Devices/Phys. & Tech., Part of Chapter 9, Oxidation & Film Dep. pp. 341-363, 1985. |
Divisions (1)
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Number |
Date |
Country |
Parent |
785774 |
Oct 1991 |
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Continuations (1)
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Number |
Date |
Country |
Parent |
52886 |
Apr 1993 |
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