Patent Application
20220361328
Modern computer systems may employ voltage regulator circuits (VRs) and/or voltage regulator modules (VRMs) to regulate the voltage levels supplied to various system components, such as a central processing unit (CPU) or System on a Chip (SoC) including a CPU.
Historically, most VR implementations employ one or more VRMs that are directly soldered to the motherboard with a package having a specific pin configuration. The pin configuration is based on voltage input/output, output power rating of the VR, number of distinct voltage output rails, and voltage regulator control requirements. The system OEM (Original Equipment Manufacturer) selects the VR supplier and CPU supplier for a particular platform and designs the motherboard for the exact combination of the two. Once that motherboard is designed, it is used throughout the product service lifetime. During the product service lifetime, if the supply chain is disrupted for the VR company(ies) or CPU company(ies), the OEM is forced to redesign the motherboard, resulting in product discontinuity.
The foregoing aspects and many of the attendant advantages of this invention will become more readily appreciated as the same becomes better understood by reference to the following detailed description, when taken in conjunction with the accompanying drawings, wherein like reference numerals refer to like parts throughout the various views unless otherwise specified:
Embodiments of power conversion modules using compression mount technology (CMT) connectors and associated apparatus and methods are described herein. In the following description, numerous specific details are set forth to provide a thorough understanding of embodiments of the invention. One skilled in the relevant art will recognize, however, that the invention can be practiced without one or more of the specific details, or with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of the invention.
Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
For clarity, individual components in the Figures herein may also be referred to by their labels in the Figures, rather than by a particular reference number. Additionally, reference numbers referring to a particular type of component (as opposed to a particular component) may be shown with a reference number followed by “(typ)” meaning “typical.” It will be understood that the configuration of these components will be typical of similar components that may exist but are not shown in the drawing Figures for simplicity and clarity or otherwise similar components that are not labeled with separate reference numbers. Conversely, “(typ)” is not to be construed as meaning the component, element, etc. is typically used for its disclosed function, implement, purpose, etc.
In accordance with an aspect of the embodiments described and illustrated herein, modularized power conversion and VR solutions are provided. The power conversion modules and VR module cards disclosed herein employ a compression mount technology (CMT) connector that includes dedicated pin locations to support a wide variety of configurations required to support different power conversion and VR suppliers and CPU companies. The power conversion and VR solutions enables a standardized modularized assemblies including a CMT connector to be used across motherboard SKUs for system OEMs and integrators.
VR module card 202 includes various voltage regulation circuitry and chips collectively depicted as VRM 208 coupled to a PCB 210. In one embodiment, VRM 208 is an encapsulated package or chip coupled to solder pads on the top surface of PCB 210 (not shown) using solder bumps. Other types of packaging technologies may also be used. For illustrative purposes, components labeled “VRM” are shown in some of the Figures herein; however, it shall be recognized that some embodiments may employ discrete power conversion circuitry that does not include a packaged VRM such as VRM 208 and/or a combination of a VRM and discrete power conversion circuitry may be used. Exemplary and non-limiting discrete power conversion circuitry include capacitors and inductors, which are depicted in silhouette as components 209 in
CMT connector 206 includes an array of CMT pins 212 that are spring-loaded at opposing ends and include lobes that contact respective CMT contact pads 213 on the top layer of motherboard 204 and CMT contact pads 214 on the underside of PCB 210. As shown in
In some platforms, such as laptops, notebooks, Chromebooks, and “all-in-ones,” the overall thickness of the platform is reduced, with the result being there is limited space for power conversion components. This may also be true in some server platforms (e.g., 1U rack chassis, server blades, and server modules). To address this consideration, some embodiments invert some or all the power conversion circuitry such that the orientation of the VR module card or power conversion module board is flipped relative to that shown in
Under an assembly 200c shown in
Under some circumstances, it may be advantageous to mount VR modules and/or power conversion circuitry to both sides of a VR module card or power conversion module board. An example of such a configuration is shown by an assembly 200d in
In instances, power conversion circuitry may generate a significant amount of heat. This is due to the fact that power conversion circuitry is not 100% efficient, and may generally generate heat that is approximately proportion to the power output(s) of the circuitry (observing this heat generation portion may have a non-linear relationship). To address this issue, a VR module card or power conversion module board may include a heatsink, such as shown by a heatsink 218 in an assembly 200e illustrated in
A way to further reduce the stack height for embodiments employing power conversion circuitry with a moderate to tall stack height is to have the power conversion module extending downward past the top surface plane of the motherboard, such as shown in the embodiments of
Assembly 200f shown in
For CMT connector 306 shown in
Signal traces (e.g., wiring) in PCB 502 are used to provide signal paths between pads 508 and voltage regulation circuitry and components in VRM 504. Upon installation of VR module card 500 in a platform (e.g., desktop computer, server, laptop, notebook computer, all-in-one, etc.), pads 508 are electrically coupled to respective pins 212 or contacts 312 in the CMT connector (206 or 306), which in turn are coupled to CMT contact pads 213 on motherboard 204.
The number of pads, dimensions of the array, size of the pads, and pitch are all parameters that may be varied to suit the needs of a given platform. This enables support for a larger number of configurations and increases flexibility. In one embodiment, the array of pads will include pads with standardized voltage levels and control pin assignment, allowing the platform to connect to the appropriate pins as required.
SoC 604 is illustrative of a processor SoC including a core 628, an integrated GPU 630, memory controller 632, and a core IO (input-output) block 634. In addition, circuitry and blocks that are separate from these blocks is generally referred to as “uncore” circuitry and blocks. Core 628, which may be referred to as a CPU core when SoC 604 includes a CPU includes one or more processor/CPU cores. Core 628 may also include cache levels associated with the processor/CPU cores, such as Level 1 and Level 2 (L1 and L2) caches (not shown). In some embodiments, an L3 or last level cache (LLC) (not shown) may be shared across processor/CPU cores.
Integrated GPU 630 is illustrative of an SoC that includes integrated graphics circuitry, such as but not limited to a GPU. The integrated GPU may be implemented using a variety of GPU architectures and may support various graphics and/or accelerator libraries, including open-source and proprietary libraries.
Core IO block 634 is illustrative of various IO components and or blocks that are included in an SoC. For example, the IO components may support standardized and/or propriety IO interfaces and protocols, such as but not limited to Peripheral Component Interconnect Express (PCIe) and Compute Express Link (CXL) interfaces and protocols. Other IO interfaces may also be supported.
As further shown in
Core VR input 636 is shown as supporting 1-4 phases. For supply voltages, multiple phases may be combined to provide additional voltage levels. For example, depending on the workload for the cores in core 628, a variably amount of regulated voltage may be provided, with the increase in voltages resulting in higher performance, higher energy consumption, and greater heat generation (by SoC 604). In some embodiments, one or more cores in core 628 may support a boosted performance mode such as a so-called “turbo” mode under which the core is operated at a higher voltage. It will also be recognized that a processor or CPU may employ different types of cores, such as a mixture of higher power, higher performance cores and lower power, lower performance cores. Although shown as a single power input for convenience, core VR input 636 may provided different voltage level inputs to be used by different cores.
In the illustrated embodiment, integrated graphics VR input also is a multi-phase input (in this non-limiting example 1-2 phases). Like processor/CPU cores, a GPU may operate at different performance levels based on its input voltage, which may be varied by using 1 or 2 phases. In some embodiments, additional phases may be provided.
As further shown, both uncore VR input 640 and core IO VR input are single phase inputs. Generally, the uncore and IO circuitry may operate in a power domain that is separate from that employed by the processor/CPU cores and GPU and consume less power.
Additional voltage inputs provided by power conversion module 602 include memory VR 2 input 648, 1.8V input 650, and 3.3V input 652. Memory VR 1 input 648 is used to support memory subsystem components including memory controller 632 and memory 606, which is representative of one or more memory devices and associated memory buses/channels. Although SoC 604 shows a single memory controller 632, a given SoC may include one or more memory controllers (which are sometimes referred to as integrated memory controllers or IMCs). As further shown, one or both of 1.8V input 650, and 3.3V input 652 may be used to provide input to other platform components 608, which are representative of various platform components that are separate from the platform SoC and memory subsystem.
Power conversion module 602 further shows two optional voltage inputs: a memory VR 2 input 654 and a 5V input 656. Memory VR 2 input 654 may be used to provide additional power to memory 606. Generally, 5V input 656 may provide input to other platform components that may employ a 5V input voltage.
A power conversion module may also provide additional signals to one or more components, such as but not limited to signals for a CPU, GPU, XPU, SoC, and/or other platform component. For example, additional signals may include signaling for power state monitoring, power state control, and signaling supporting communication with various IO components. Under one non-limiting example, additional signals may be employed to enable communication between the power conversion module and the CPU/SoC and an embedded controller (EC), such as for standby mode enable, putting the CPU/SoC into a deep sleep mode and for power gating etc. A CPU/SoC cores may support a “turbo” or “boost” mode under which the CPU/SoC operates one or more cores at a higher frequency requiring increased input voltage—the additional signals may be used to support CPU/SoC and EC communication with the power conversion module to change its input voltage(s).
For simplicity and lack of space, the CMT contact pads for these additional signals are shown in the Figures herein including
Example Compute Platform
Compute platform 900 includes a processor 910, which provides processing, operation management, and execution of instructions for compute platform 900. Processor 910 can include any type of microprocessor, central processing unit (CPU), graphics processing unit (GPU), processing core, or other processing hardware to provide processing for compute platform 900, or a combination of processors. Processor 910 controls the overall operation of compute platform 900, and can be or include, one or more programmable general-purpose or special-purpose microprocessors, digital signal processors (DSPs), programmable controllers, application specific integrated circuits (ASICs), programmable logic devices (PLDs), or the like, or a combination of such devices.
In one example, compute platform 900 includes interface 912 coupled to processor 910, which can represent a higher speed interface or a high throughput interface for system components that needs higher bandwidth connections, such as memory subsystem 920 or graphics interface components 940. Interface 912 represents an interface circuit, which can be a standalone component or integrated onto a processor die. Where present, graphics interface 940 interfaces to graphics components for providing a visual display to a user of compute platform 900. In one example, graphics interface 940 can drive a high definition (HD) display that provides an output to a user. High definition can refer to a display having a pixel density of approximately 100 PPI (pixels per inch) or greater and can include formats such as full HD (e.g., 1080p), retina displays, 4K (ultra-high definition or UHD), or others. In one example, the display can include a touchscreen display. In one example, graphics interface 940 generates a display based on data stored in memory 930 or based on operations executed by processor 910 or both.
Memory subsystem 920 represents the main memory of compute platform 900 and provides storage for code to be executed by processor 910, or data values to be used in executing a routine. Memory 930 of memory subsystem 920 may include one or more memory devices such as DRAM DIMMs, read-only memory (ROM), flash memory, or other memory devices, or a combination of such devices. Memory 930 stores and hosts, among other things, operating system (OS) 932 to provide a software platform for execution of instructions in compute platform 900. Additionally, applications 934 can execute on the software platform of OS 932 from memory 930. Applications 934 represent programs that have their own operational logic to perform execution of one or more functions. Processes 936 represent agents or routines that provide auxiliary functions to OS 932 or one or more applications 934 or a combination. OS 932, applications 934, and processes 936 provide software logic to provide functions for compute platform 900. In one example, memory subsystem 920 includes memory controller 922, which is a memory controller to generate and issue commands to memory 930. It will be understood that memory controller 922 could be a physical part of processor 910 or a physical part of interface 912. For example, memory controller 922 can be an integrated memory controller, integrated onto a circuit with processor 910.
While not specifically illustrated, it will be understood that compute platform 900 can include one or more buses or bus systems between devices, such as a memory bus, a graphics bus, interface buses, or others. Buses or other signal lines can communicatively or electrically couple components together, or both communicatively and electrically couple the components. Buses can include physical communication lines, point-to-point connections, bridges, adapters, controllers, or other circuitry or a combination. Buses can include, for example, one or more of a system bus, a Peripheral Component Interconnect (PCI) bus, a HyperTransport or industry standard architecture (ISA) bus, a small computer system interface (SCSI) bus, a universal serial bus (USB), or an Institute of Electrical and Electronics Engineers (IEEE) standard 1394 bus.
In one example, compute platform 900 includes interface 914, which can be coupled to interface 912. Interface 914 can be a lower speed interface than interface 912. In one example, interface 914 represents an interface circuit, which can include standalone components and integrated circuitry. In one example, multiple user interface components or peripheral components, or both, couple to interface 914. Network interface 950 provides compute platform 900 the ability to communicate with remote devices (e.g., servers or other computing devices) over one or more networks. Network interface 950 can include an Ethernet adapter, wireless interconnection components, cellular network interconnection components, USB (universal serial bus), or other wired or wireless standards-based or proprietary interfaces. Network interface 950 can exchange data with a remote device, which can include sending data stored in memory or receiving data to be stored in memory.
In one example, compute platform 900 includes one or more IO interface(s) 960. IO interface(s) 960 can include one or more interface components through which a user interacts with compute platform 900 (e.g., audio, alphanumeric, tactile/touch, or other interfacing). Peripheral interface 970 can include any hardware interface not specifically mentioned above. Peripherals refer generally to devices that connect dependently to compute platform 900. A dependent connection is one where compute platform 900 provides the software platform or hardware platform or both on which operation executes, and with which a user interacts.
In one example, compute platform 900 includes storage subsystem 980 to store data in a nonvolatile manner. In one example, in certain system implementations, at least certain components of storage subsystem 980 can overlap with components of memory subsystem 920. Storage subsystem 980 includes storage device(s) 984, which can be or include any conventional medium for storing large amounts of data in a nonvolatile manner, such as one or more magnetic, solid state, or optical based disks, or a combination. Storage device(s) 984 holds code or instructions and data 986 in a persistent state (i.e., the value is retained despite interruption of power to compute platform 900). A portion of the code or instructions may comprise platform firmware that is executed on processor 910. Storage device(s) 984 can be generically considered to be a “memory,” although memory 930 is typically the executing or operating memory to provide instructions to processor 910. Whereas storage device(s) 984 is nonvolatile, memory 930 can include volatile memory (i.e., the value or state of the data is indeterminate if power is interrupted to compute platform 900). In one example, storage subsystem 980 includes controller 982 to interface with storage device(s) 984. In one example controller 982 is a physical part of interface 914 or processor 910 or can include circuits or logic in both processor 910 and interface 914. In one example, a storage device 984 may comprise an AIC such as an NVMe SSD that is mounted to the motherboard using a CMT connector using the assemble architecture shows in the Figures herein and discussed above.
Compute platform 900 may include an optional Baseboard Management Controller (BMC) 990 that is configured to effect the operations and logic corresponding to the flowcharts disclosed herein. BMC 990 may include a microcontroller or other type of processing element such as a processor core, engine or micro-engine, that is used to execute instructions to effect functionality performed by the BMC. Optionally, another management component (standalone or comprising embedded logic that is part of another component) may be used.
Power source 902 provides power to the components of compute platform 900. More specifically, power source 902 typically interfaces to one or multiple power supplies 904 in compute platform 900 to provide power to the components of compute platform 900. Power a power supply 904 provides input power to one or more power conversion modules 906 (and/or VR module card(s)), which provides regulated power to one or more platform components including processor 910. In one example, power supply 904 includes an AC to DC (alternating current to direct current) adapter to plug into a wall outlet. Such AC power can be renewable energy (e.g., solar power) power source 902. In one example, power source 902 includes a DC power source, such as an external AC to DC converter. In one example, power source 902 can include an internal battery or fuel cell source.
Generally, in addition to solutions for providing regulated power to CPUs, the teaching and principles disclosed herein may be applied to Other Processing Units (collectively termed XPUs) including one or more of Graphic Processor Units (GPUs) or General Purpose GPUs (GP-GPUs), Tensor Processing Units (TPUs), Data Processor Units (DPUs), Infrastructure Processing Units (IPUs), Artificial Intelligence (AI) processors or AI inference units and/or other accelerators, Vision Processing Units (VPUs), FPGAs and/or other programmable logic (used for compute purposes), etc. While some of the diagrams herein show the use of CPUs, this is merely exemplary and non-limiting. Generally, any type of XPU may be used in place of a CPU in the illustrated embodiments. Moreover, as used in the following claims, the term “processor” is used to generically cover CPUs, GPUs, and various forms of other XPUs.
The VR module card solutions and power conversion module solutions described and illustrated herein provide several advantages over current approaches. These include:
Although some embodiments have been described in reference to particular implementations, other implementations are possible according to some embodiments. Additionally, the arrangement and/or order of elements or other features illustrated in the drawings and/or described herein need not be arranged in the particular way illustrated and described. Many other arrangements are possible according to some embodiments.
In each system shown in a figure, the elements in some cases may each have a same reference number or a different reference number to suggest that the elements represented could be different and/or similar. However, an element may be flexible enough to have different implementations and work with some or all of the systems shown or described herein. The various elements shown in the figures may be the same or different. Which one is referred to as a first element and which is called a second element is arbitrary.
In the description and claims, the terms “coupled” and “connected,” along with their derivatives, may be used. It should be understood that these terms are not intended as synonyms for each other. Rather, in particular embodiments, “connected” may be used to indicate that two or more elements are in direct physical or electrical contact with each other. “Coupled” may mean that two or more elements are in direct physical or electrical contact. However, “coupled” may also mean that two or more elements are not in direct contact with each other, but yet still co-operate or interact with each other. Additionally, “communicatively coupled” means that two or more elements that may or may not be in direct contact with each other, are enabled to communicate with each other. For example, if component A is connected to component B, which in turn is connected to component C, component A may be communicatively coupled to component C using component B as an intermediary component.
An embodiment is an implementation or example of the inventions. Reference in the specification to “an embodiment,” “one embodiment,” “some embodiments,” or “other embodiments” means that a particular feature, structure, or characteristic described in connection with the embodiments is included in at least some embodiments, but not necessarily all embodiments, of the inventions. The various appearances “an embodiment,” “one embodiment,” or “some embodiments” are not necessarily all referring to the same embodiments.
Not all components, features, structures, characteristics, etc. described and illustrated herein need be included in a particular embodiment or embodiments. If the specification states a component, feature, structure, or characteristic “may”, “might”, “can” or “could” be included, for example, that particular component, feature, structure, or characteristic is not required to be included. If the specification or claim refers to “a” or “an” element, that does not mean there is only one of the element. If the specification or claims refer to “an additional” element, that does not preclude there being more than one of the additional element.
As used herein, a list of items joined by the term “at least one of” can mean any combination of the listed terms. For example, the phrase “at least one of A, B or C” can mean A; B; C; A and B; A and C; B and C; or A, B and C.
The above description of illustrated embodiments of the invention, including what is described in the Abstract, is not intended to be exhaustive or to limit the invention to the precise forms disclosed. While specific embodiments of, and examples for, the invention are described herein for illustrative purposes, various equivalent modifications are possible within the scope of the invention, as those skilled in the relevant art will recognize.
These modifications can be made to the invention in light of the above detailed description. The terms used in the following claims should not be construed to limit the invention to the specific embodiments disclosed in the specification and the drawings. Rather, the scope of the invention is to be determined entirely by the following claims, which are to be construed in accordance with established doctrines of claim interpretation.
This application claims the benefit of the filing date of U.S. Provisional Application No. 63/348,999, filed Jun. 3, 2022, entitled “POWER CONVERSION MODULE USING CMT CONNECTOR” under 35 U. S.C. § 119(e). U.S. Provisional Application No. 63/348,999 is further incorporated herein in its entirety for all purposes.
| Number | Date | Country | |
|---|---|---|---|
| 63348999 | Jun 2022 | US |
