The present invention relates to a structure of a power module.
In recent years, there is a demand for small power modules in the fields of vehicles, industrial machines, or equipment for consumer use. A technique that enables miniaturization by using a relay substrate in which conductor layers do not have a single-layer structure, but instead have a layered structure, has been proposed. For example, Patent Literature 1 (JP 2013-21371 A) discloses a structure for causing a current to flow using a relay substrate, which makes it possible to provide a power module smaller than that having a single-layer structure.
However, in a semiconductor device disclosed in Patent Literature 1, semiconductor devices are respectively connected to a plurality of conductive posts and the plurality of conductive posts are respectively connected to through-holes. When a split flow ratio varies due to variations in the contact resistance between the semiconductor devices and the plurality of conductive posts and between the plurality of conductive posts and the through-holes, a variation in the magnitude of the current flowing through the conductive posts occurs and the current-carrying capability of the conductive posts through which a maximum current flows becomes insufficient, which causes a problem that the magnitude of the entire current is limited.
The present invention has been made to solve the above-mentioned problem, and an object of the present invention is to provide a power module that prevents the occurrence of variations in the magnitude of a current flowing through each conductive post due to a difference in split flow ratio.
According to the present invention, a power module includes: a relay substrate including a first conductor layer provided on a front surface and a second conductor layer provided on a back surface; copper blocks provided in holes penetrating through the relay substrate in a thickness direction and connecting the first conductor layer to the second conductor layer; semiconductor devices wherein each semiconductor device includes a main electrode provided at a location facing an end face of the corresponding copper block and only one copper block is electrically connected to one main electrode; an insulating substrate connected to back-surfaces of the semiconductor devices via joining materials; and a sealer sealing the relay substrate, the copper blocks, and the semiconductor devices.
The power module according to the present invention has a configuration in which each semiconductor device and the relay substrate are connected through a single copper block. This configuration provides an advantageous effect of preventing the occurrence of variations in the magnitude of the current flowing through each copper block due to a difference in split flow ratio.
Other and further objects, features and advantages of the invention will appear more fully from the following description.
A power module according to a first embodiment will be described.
In the power module shown in
The insulating substrate 3 includes a base plate 3a, an insulating layer 3b, and a circuit pattern 3c. The base plate 3a and the circuit pattern 3c are each formed of, for example, copper. The insulating layer 3b may be formed of, for example, an inorganic ceramic material, or a material in which ceramic powder is dispersed in a thermosetting resin such as an epoxy resin. A back-surface electrode of each semiconductor device 1, which is a collector electrode if the semiconductor device is an IGBT, is connected to the insulating substrate 3 through the solder, thereby ensuring the electric insulation on the outside of the power module 100.
The relay substrate 4 includes an insulating plate 4b, a front-surface conductor layer 4a, which is a first conductor layer formed on the front surface of the insulating plate 4b, and a back-surface conductor layer 4c, which is a second conductor layer formed on the back surface of the insulating plate 4b. For example, both surfaces of the insulating plate formed of a glass epoxy substrate are provided with a conductive member having a thickness equal to or greater than 0.2 mm. Note that the relay substrate 4 can be modified in various ways, as long as three-dimensional wiring is implemented. For example, the degree of freedom of wiring may be increased by using conductors having three or more layers in the relay substrate. In this case, two or more insulating plates are prepared and each of the insulating plates is sandwiched between conductors, thereby forming the relay substrate formed of conductors having three or more layers.
The relay substrate 4 is provided with a hole penetrating through the relay substrate in the thickness direction thereof. A connecting part 20 that connects the conductor layers formed on the both surfaces of the insulating plate 4b is formed in the hole. The connecting part 20 is not particularly limited, as long as the connecting part electrically connects the conductor layers formed on the both surfaces of the insulating plate 4b. For example, the connecting part 20 is a copper plating layer. Each copper block 6 is pressure-welded to the connecting part 20, thereby ensuring a conduction area between the semiconductor devices 1 and the relay substrate 4. A main electrode 11 of each semiconductor device 1 is provided at a location facing an end face of the corresponding copper block 6. The main electrode 11 of each semiconductor device 1 and the back surface of the corresponding copper block 6 are electrically connected through the solder. In this case, only one copper block 6 is electrically connected to one main electrode 11. That is, the copper blocks and the main electrodes are connected in a one-to-one correspondence. Note that as illustrated in
An external terminal 7a is electrically connected to the circuit pattern 3c and is used to exchange an electric signal with an external device. Note that the external terminal 7a may be subjected to insert molding in a case 8. Further, the external terminal 7a may be formed so as to penetrate through the relay substrate. In this case, at least one through-hole through which an external electrode is caused to penetrate may be formed at a predetermined position on the relay substrate.
External terminals 7b and 7c are electrically connected to the front-surface conductor layer 4a of the relay substrate 4 and are used to exchange an electric signal with an external device.
The insulating substrate 3, the semiconductor devices 1, and the relay substrate 4 are surrounded by the case 8. The case 8 is formed of a plastic resin or the like. A sealer 9 is filled in the case 8. The sealer 9 is not particularly limited, as long as a material having insulating properties is used. For example, an epoxy resin is used. The copper blocks, the relay substrate 4, and the semiconductor devices 1 are surrounded by the sealer 9. A part of the external terminals is covered with the sealer 9, while a part of the terminals extends to the outside of the sealer 9 so as to exchange signals with an external device. Further, the back surface of the insulating substrate 3 is exposed from the sealer 9 and is cooled by a heat sink (not illustrated).
Referring to
The power module according to the first embodiment has a configuration in which each semiconductor device and the relay substrate are connected to a single main electrode through a single copper block. This configuration provides an advantageous effect of preventing the occurrence of variations in the magnitude of the current flowing through each copper block due to a difference in split flow ratio. In the case of using a plurality of copper blocks, instead of using a single copper block, there is a need to set an interval between the plurality of copper blocks. However, the use of a single copper block eliminates the need for setting a certain interval between copper blocks, and provides an advantageous effect of miniaturizing the power module. Further, each semiconductor device and the relay substrate are connected to a single main electrode through a single copper block, thereby eliminating the need for setting an interval between copper blocks, unlike in the case of using a plurality of copper blocks. This configuration provides an advantageous effect that members having a large heat capacity can be joined and the radiation performance can be improved within a transient time range.
A power module according to a second embodiment will be described.
The power module according to the second embodiment has a configuration in which the back surface of each copper block 6 is located so as to project below the back surface of the relay substrate 4. This configuration provides an advantageous effect of facilitating the adjustment of the thickness of the solder used for joining the copper blocks 6 and the semiconductor devices 1 together. Further, as illustrated in
A power module according to a third embodiment will be described.
In the power module according to the third embodiment, the front surface of each copper block 6 is located so as to project above the front surface of the relay substrate 4 and the front surface of each copper block 6 is exposed from the sealer 9, thereby making it possible to heat each copper block 6 from the part where the copper block is exposed. This configuration provides an advantageous effect of facilitating soldering between the copper blocks 6 and the semiconductor devices 1 from the outside of the power module. As illustrated in
A power module according to a fourth embodiment will be described.
In the power module according to the fourth embodiment, the back surface of each copper block 6 has a recess, which provides an advantageous effect of preventing the solder used for joining the copper blocks 6 and the semiconductor devices 1 together from protruding.
Note that the present invention includes arbitrary combinations of embodiments and modified examples, and also includes modifications or omissions which can be made, as needed, to the embodiments, within the scope of the invention.
Further, means for joining the components is not limited to solder, and any conductive joining material can be used. As the conductive joining material, a metal having a low electric resistance, such as solder, a metallic paste using a metal filler, or a sintered metal which is metallized by heat, is preferably used.
Obviously many modifications and variations of the present invention are possible in the light of the above teachings. It is therefore to be understood that within the scope of the appended claims the invention may be practiced otherwise than as specifically described.
The entire disclosure of Japanese Patent Application No. 2017-038878, filed on Mar. 2, 2017 including specification, claims, drawings and summary, on which the Convention priority of the present application is based, is incorporated herein by reference in its entirety.
Number | Date | Country | Kind |
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2017-038878 | Mar 2017 | JP | national |
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