Process for forming schottky rectifier with PtNi silicide schottky barrier

Abstract

A process for forming a Schottky barrier to silicon to a barrier height selected at a value between 640 meV and 840 meV employs the deposition of a platinum or nickel film atop the silicon surface followed by the deposition of the other of a platinum or nickel film atop the first film. The two films are then exposed to anneal steps at suitable temperatures to cause their interdiffusion and a ultimate formation of Ni2Si and Pt2Si contacts to the silicon surface. The final silicide has a barrier height between that of the Pt and Ni, and will depend on the initial thicknesses of the Pt and Ni films and annealing temperature and time. Oxygen is injected into the system to form an SiO2 passivation layer to improve the self aligned process.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a silicon wafer having layers or films of platinum and nickel sequentially deposited thereon.

FIG. 2 shows the wafer of FIG. 1 after an anneal process at 200° C. for a given time to cause the formation of a platinum silicide at the silicon surface.

FIG. 3 shows another silicide process formation of the invention with the anneal temperature at 300° C. for a given time to cause the Ni to penetrate the fully formed Pt₂Si layer and reaching the silicon surface at spaced locations.

FIG. 4 shows another process using an anneal temperature of 400° C. with a NiSi layer reaching the silicon surface and a mixture of Pt₂Si/NiSi at the top of the wafer.

FIG. 5 shows another process of forming the silicide in which the anneal temperature is raised to 500° C. for a given time in which both NiS and Pt₂Si layers are at the silicon surface to create the desired Schottky barrier height (790 to 800 meV) and (optionally) a SiO₂ layer is grown atop the silicide film to protect the silicon surface since; continuing the reaction will form a homogeneous SiNiPt film (700 meV).

FIG. 6 shows the step of applying the anode and cathode metals to the top and bottom respectively of the wafer.

Claims

1. The process of forming a Pt/Ni Schottky barrier, comprising the steps of depositing one of a Pt or Ni film of given thickness atop a silicon wafer surface; then depositing the other of a Pt or Ni film of given thickness atop the first deposited film and thereafter annealing said films to cause the inter diffusion of Pt and Ni, and the growth of areas of nickel and platinum silicides at the silicon surface to define a Schottky junction barrier in the range of 640 meV to 840 meV.

2. The process of claim 1, wherein said given thicknesses of said Pt and Ni films are in the range of 100 Å to 5000 Å, and wherein the barrier height of said junction depends on the thicknesses chosen for said Ni and Pt films and annealing temperature and time.

3. The process of claim 1, wherein said annealing of said films comprises the anneal a selected temperature and time.

4. The process of claim 1, which includes the formation of a passivation coating atop said silicide film to improve the silicide self aligned process.

5. The process of claim 3, wherein said anneal is in the range of 200° C. to 650° C. to obtain the desired barrier height.

6. The process of claim 5, which includes the formation of a passivation coating atop said silicide film to improve the silicide self aligned process.

7. The process of claim 3, which further comprises the step of forming a SiO2 passivation layer atop said silicide after said annealing process, to improve the silicide self aligned process.

8. The process of claim 1, which comprises the further step of applying a layer of an anode metal diffusion barrier atop said silicide and applying an anode contact layer atop said layer of TiW.

9. The process of claim 7, which further comprises to removal of said SiO2 passivation layer to expose the top surface of said silicide and thereafter applying a layer of TiW atop said silicide and applying an anode contact layer atop said layer of TiW.

10. The process of forming a Schottky barrier to the surface of a silicon wafer comprising the steps of depositing a first barrier forming metal of thickness between 500 Å to 5000 Å atop said surface of said silicon wafer; depositing a second barrier forming metal of thickness between 100 Å to 5000 Å atop said first barrier forming metal; and thereafter annealing said first and second metal films to cause their interdiffusion and the growth of areas of silicides of said first and second metals on said silicon surface to define a Schottky junction barrier of a height dependent on the initial thicknesses chosen for said first and second films and their thermal treatment.

11. The process of claim 10, wherein said first and second films are Pt and Ni respectively, and wherein said barrier height is in the range of 640 meV to 840 meV.

12. The process of claim 10, wherein said annealing of said films is carried out at a preselected temperature for a preselected time to produce a predetermined barrier height.

13. The process of claim 10, which includes the formation of a passivation coating atop said silicide film to improve the self aligned silicide process.

14. The process of claim 12, which includes the formation of a passivation coating atop said silicide film to improve the self aligned silicide process.

15. The process of claim 12, wherein said anneal steps are carried out at a temperature range of 200° C. to 650° C. respectively.

16. The process of claim 12, which includes the formation of a passivation coating atop said silicide film to improved the self aligned process.

17. The process of claim 10, which further comprises the step of forming a SiO2 passivation layer atop said silicide after said anneal process to improve the silicide self aligned process.