Claims
- 1. A method of forming an integrated semiconductor device, comprising the steps of:
- placing an etch-resist upon a substrate and about conductors of first semiconductor device having a first substrate and conductors.
- bonding the conductors of the first semiconductor device to conductors on a second semiconductor device having a second substrate;
- flowing cement to fill a space between the etch-resist on the first semiconductor device and the second semiconductor device;
- allowing the cement to cure; and
- removing the substrate from the first semiconductor device.
- 2. A method as in claim 1 wherein the cement is an epoxy.
- 3. A method as in claim 1, wherein the step of flowing includes flowing the uncured cement between and around said conductors around said conductors on said second semiconductor device.
- 4. A method as in claim 1, wherein the step of bonding includes forming surfaces of any one of a group consisting of In, Au, and mixtures of In, Au, Sn, and Pb on the conductors of one of said first semiconductor device and said second semiconductor device.
- 5. A method as in claim 3, wherein the cement is an epoxy and the step of flowing includes wicking the uncured cement between the etch resist on the first substrate and the second substrate while the conductors of said first semiconductor device and said second semiconductor device are at temperatures above room temperature.
- 6. A method as in claim 1, wherein the step of flowing includes flowing sufficient cement so that said cement and said etch-resist, when dried, form a structural support from one of the semiconductor devices to the other.
- 7. A method as in claim 1, wherein the second semiconductor device is a photonic device and the first semiconductor device is a Si device.
- 8. A method as in claim 1, wherein the first semiconductor device includes a modulator having a GaAs/AlGaAs multiple quantum well modulator unit and said second semiconductor device includes a Si integrated circuit chip.
- 9. A method as in claim 1, wherein said first semiconductor device includes a plurality of GaAs structures on said substrate of said first semiconductor device, said conductors on said first device including a plurality of terminals on each of said GaAs structures, said second semiconductor device includes a plurality of GaAs structures on said substrate of said second semiconductor device, said conductors on said second device including a plurality of terminals on each of said GaAs structures;
- said step of placing an etch-resist includes placing an etch-resist on the substrate of said first structures and about the terminals of each of said structures on said first semiconductor device;
- said step of bonding the conductors includes bonding said terminals of said first structures to said terminals of said second structures.
- 10. A method as in claim 3, wherein the cement is an epoxy and the step of flowing includes wicking the uncured cement between the first and second substrates at room temperature.
REFERENCE TO RELATED APPLICATIONS
This application is a continuation-in-part of U.S. application Ser. No. 08/366,864 filed Dec. 30, 1994, U.S. Pat. No. 5,778,162, which is a continuation-in-part of divisional U.S. application Ser. No. 08/236,307, filed May 2, 1994, abandoned, and of U.S. application Ser. No. 083,742, filed Jun. 25, 1993, now U.S. Pat. No. 5,385,632, all assigned to the same assignee as this application.
US Referenced Citations (4)
Related Publications (1)
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Date |
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083742 |
Jun 1993 |
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Continuation in Parts (2)
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Number |
Date |
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366864 |
Dec 1994 |
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Parent |
236307 |
May 1994 |
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