Claims
- 1. A process for producing a semiconductor integrated circuit device, comprising the steps of:
(a) emitting sputtered particles by colliding inert gas ions under a vacuum condition with a first surface of a high-dielectric or ferroelectric sputtering target having a first chemical composition and having a density of said first chemical composition which is not less than 90% of a theoretical density thereof; (b) forming a high-dielectric or ferroelectric film by depositing the sputtered particles under the vacuum condition over a lower electrode overlying a first major surface of a semiconductor wafer, said high-dielectric or ferroelectric film having a second chemical composition substantially the same as the first chemical composition; and (c) after step (b), improving crystalline characteristics of the high-electric or ferroelectric film by performing an annealing treatment thereto in a gas ambient including an oxygen gas.
- 2. A process for producing a semiconductor integrated circuit device according to claim 1, wherein the high-dielectric or ferroelectric film and the lower electrode constitute a memory capacitor of a memory cell.
- 3. A process for producing a semiconductor integrated circuit device according to claim 2, wherein the first chemical composition, of the target, is shifted from a stoichiometric composition.
- 4. A process for producing a semiconductor integrated circuit device according to claim 3, further comprising the step of:
(d) prior to step (a), planarizing the first major surface of the semiconductor wafer by a treatment including chemical mechanical polishing.
- 5. A process for producing a semiconductor integrated circuit device, comprising the steps of:
(a) emitting sputtered particles by colliding inert gas ions under a vacuum condition with a first surface of a highdielectric or ferroelectric sputtering target, which is made of a double oxide and has a density not less than 90% of its theoretical density; and (b) forming a high-dielectric or ferroelectric film by depositing the sputtered particles under the vacuum condition over a lower electrode overlying a first major surface of a semiconductor wafer.
- 6. A process for producing a semiconductor integrated circuit device, comprising the steps of:
(a) emitting sputtered particles by colliding inert gas ions under a vacuum condition with a first surface of a highdielectric or ferroelectric sputtering target having a density not less than 90% of its theoretical density, a relative dielectric constant of said target being not less than 100; and (b) forming a high-dielectric or ferroelectric film by depositing the sputtered particles under the vacuum condition over a lower electrode overlying a first major surface of a semiconductor wafer.
- 7. A process for producing a semiconductor integrated circuit device according to claim 6, wherein the high-dielectric or ferroelectric film is made of BST, PZT, PLT, PLZT, SBT, PbTiO3, SrTiO3, or BaTiO3.
- 8. A process for producing a semiconductor integrated circuit device, comprising the steps of:
(a) emitting sputtered particles by colliding inert gas ions under a vacuum condition with a first surface of a high-dielectric or ferroelectric sputtering target having a density not less than 90% of its theoretical density, the crystalline structure of said target including a perovskite structure; and (b) forming a high-dielectric or ferroelectric film by depositing the sputtered particles under the vacuum condition over a lower electrode overlying a first major surface of a semiconductor wafer.
- 9. A process for producing a semiconductor integrated circuit device according to claim 8, wherein the high-dielectric or ferroelectric film is made of BST, PZT, PLT, PLZT, SBT, PbTiO3, SrTiO3, or BaTiO3.
- 10. A process for producing a semiconductor integrated circuit device, comprising the steps of:
(a) emitting sputtered particles by colliding inert gas ions under a vacuum condition with a first surface of a high-dielectric or ferroelectric sputtering target having a density not less than 90% of its theoretical density; and (b) forming a high-dielectric or ferroelectric film by depositing the sputtered particles under the vacuum condition over a lower electrode overlying a first major surface of a semiconductor wafer.
- 11. A process for producing a semiconductor integrated circuit device according to claim 10, wherein the ferroelectric film and the lower electrode constitute a memory capacitor of a nonvolatile memory cell.
- 12. A process for producing a semiconductor integrated circuit device, comprising the steps of:
(a) emitting sputtered particles by colliding inert gas ions under a vacuum condition with a first surface of a highdielectric or ferroelectric sputtering target having a density not less than 90% of its theoretical density, a crystalline structure of said target being a perovskite structure including Pb; and (b) forming a high-dielectric or ferroelectric film by depositing the sputtered particles under the vacuum condition over a lower electrode overlying a first major surface of a semiconductor wafer.
- 13. A process for producing a semiconductor integrated circuit device according to claim 12, wherein the high-dielectric or ferroelectric film and the lower electrode constitute a memory capacitor of a nonvolatile memory cell.
- 14. A process for producing a semiconductor integrated circuit device, comprising the steps of:
(a) emitting sputtered particles by colliding inert gas ions under a vacuum condition with a first surface of a high-dielectric or ferroelectric sputtering target having a first chemical composition and having a density of said first chemical composition which is not less than 90% of its theoretical density thereof, at the portion of the first surface of the target to be sputtered; and (b) forming a high-dielectric or ferroelectric film by depositing the sputtered particles under the vacuum condition over a lower electrode overlying a first major surface of a semiconductor wafer, said high-dielectric or ferroelectric film having a second chemical composition substantially the same as the first chemical composition.
- 15. A process for producing a semiconductor integrated circuit device, comprising the steps of:
(a) emitting sputtered particles by colliding inert gas ions under a vacuum condition with a first surface of a high-dielectric or ferroelectric sputtering target, which is made of a double oxide and has a density not less than 90% of its theoretical density at a portion of the first surface of the target to be sputtered, and (b) forming a high-dielectric or ferroelectric film by depositing the sputtered particles under the vacuum condition over a lower electrode overlying a first major surface of a semiconductor wafer.
- 16. A process for producing a semiconductor integrated circuit device according to claim 15, further comprising the steps of:
(c) after step (b), improving crystalline characteristics of the high-dielectric or ferroelectric film by performing an annealing treatment thereto in a gas ambient including an oxygen gas.
- 17. A process for producing a semiconductor integrated circuit device according to claim 16, further comprising the step of:
(d) prior to step (a), planarizing the first major surface of the semiconductor wafer by a treatment including chemical mechanical polishing.
- 18. A process for producing a semiconductor integrated circuit device according to claim 17, wherein the high-dielectric or ferroelectric film and the lower electrode constitute a memory capacitor of a memory cell.
- 19. A process for producing a semiconductor integrated circuit device according to claim 18, wherein the lower electrode includes at least one material selected from the group consisting of platinum, ruthenium, and iridium, and oxides thereof.
- 20. A process for producing a semiconductor integrated circuit device according to claim 18, wherein the lower electrode includes at least one material selected from the group consisting of platinum, ruthenium, rhodium, osmium, rhenium, palladium, gold and iridium, and oxides thereof.
- 21. A process for producing a semiconductor integrated circuit device, comprising the steps of:
(a) emitting sputtered particles by colliding inert gas ions under a vacuum condition with a first surface of a high-dielectric or ferroelectric sputtering target having a density not less than 90% of its theoretical density at a portion of the first surface of the target to be sputtered, a relative dielectric constant of said target being not less than 100; and (b) forming a high-dielectric or ferroelectric film by depositing the sputtered particles under the vacuum condition over a lower electrode overlying a first major surface of a semiconductor wafer.
- 22. A process for producing a semiconductor integrated circuit device, comprising the steps of:
(a) emitting sputtered particles by colliding inert gas ions under a vacuum condition with a first surface of a highdielectric or ferroelectric sputtering target having a density not less than 90% of its theoretical density at a portion of the first surface of the target to be sputtered, a crystalline structure of said target including a perovskite structure; and (b) forming a high-dielectric or ferroelectric film by depositing the sputtered particles under the vacuum condition over a lower electrode overlying a first major surface of a semiconductor wafer.
- 23. A process for producing a semiconductor integrated circuit device, comprising the steps of:
(a) emitting sputtered particles by colliding inert gas ions under a vacuum condition with a first surface of a high-dielectric or ferroelectric sputtering target having a density not less than 90% of its theoretical density at a portion of the first surface of the target to be sputtered; and (b) forming a high-dielectric or ferroelectric film by depositing the sputtered particles under the vacuum condition over a lower electrode overlying a first major surface of a semiconductor wafer.
- 24. A process for producing a semiconductor integrated circuit device, comprising the steps of:
(a) emitting sputtered particles by colliding inert gas ions under a vacuum condition with a first surface of a high-dielectric or ferroelectric sputtering target having a density not less than 90% of its theoretical density at a portion of the first surface of the target to be sputtered, a crystalline structure of said target being a perovskite structure including Pb; and (b) forming a high-dielectric or ferroelectric film by depositing the sputtered particles under the vacuum condition over a lower electrode overlying a first major surface of a semiconductor wafer.
Priority Claims (1)
Number |
Date |
Country |
Kind |
8-208657 |
Aug 1996 |
JP |
|
CROSS REFERENCE TO RELATED APPLICATION
[0001] This application is a Continuation of application Ser. No. 09/906,102, filed Aug. 5, 1997, the contents of which are incorporated herein by reference.
Continuations (1)
|
Number |
Date |
Country |
Parent |
08906102 |
Aug 1997 |
US |
Child |
09987850 |
Nov 2001 |
US |